22 static void assert_fdi_tx(struct drm_i915_private *dev_priv,  in assert_fdi_tx()  argument
27 	if (HAS_DDI(dev_priv)) {  in assert_fdi_tx()
35 		cur_state = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE;  in assert_fdi_tx()
37 		cur_state = intel_de_read(dev_priv, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE;  in assert_fdi_tx()
39 	I915_STATE_WARN(dev_priv, cur_state != state,  in assert_fdi_tx()
54 static void assert_fdi_rx(struct drm_i915_private *dev_priv,  in assert_fdi_rx()  argument
59 	cur_state = intel_de_read(dev_priv, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE;  in assert_fdi_rx()
60 	I915_STATE_WARN(dev_priv, cur_state != state,  in assert_fdi_rx()
117 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in intel_fdi_link_train()  local
119 	dev_priv->display.funcs.fdi->fdi_link_train(crtc, crtc_state);  in intel_fdi_link_train()
134 	struct drm_i915_private *dev_priv = to_i915(dev);  in ilk_check_fdi_lanes()  local
139 	drm_dbg_kms(&dev_priv->drm,  in ilk_check_fdi_lanes()
143 		drm_dbg_kms(&dev_priv->drm,  in ilk_check_fdi_lanes()
149 	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {  in ilk_check_fdi_lanes()
151 			drm_dbg_kms(&dev_priv->drm,  in ilk_check_fdi_lanes()
160 	if (INTEL_NUM_PIPES(dev_priv) == 2)  in ilk_check_fdi_lanes()
171 		other_crtc = intel_crtc_for_pipe(dev_priv, PIPE_C);  in ilk_check_fdi_lanes()
178 			drm_dbg_kms(&dev_priv->drm,  in ilk_check_fdi_lanes()
186 			drm_dbg_kms(&dev_priv->drm,  in ilk_check_fdi_lanes()
192 		other_crtc = intel_crtc_for_pipe(dev_priv, PIPE_B);  in ilk_check_fdi_lanes()
199 			drm_dbg_kms(&dev_priv->drm,  in ilk_check_fdi_lanes()
285 static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool enable)  in cpt_set_fdi_bc_bifurcation()  argument
289 	temp = intel_de_read(dev_priv, SOUTH_CHICKEN1);  in cpt_set_fdi_bc_bifurcation()
293 	drm_WARN_ON(&dev_priv->drm,  in cpt_set_fdi_bc_bifurcation()
294 		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_B)) &  in cpt_set_fdi_bc_bifurcation()
296 	drm_WARN_ON(&dev_priv->drm,  in cpt_set_fdi_bc_bifurcation()
297 		    intel_de_read(dev_priv, FDI_RX_CTL(PIPE_C)) &  in cpt_set_fdi_bc_bifurcation()
304 	drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n",  in cpt_set_fdi_bc_bifurcation()
306 	intel_de_write(dev_priv, SOUTH_CHICKEN1, temp);  in cpt_set_fdi_bc_bifurcation()
307 	intel_de_posting_read(dev_priv, SOUTH_CHICKEN1);  in cpt_set_fdi_bc_bifurcation()
313 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in ivb_update_fdi_bc_bifurcation()  local
320 			cpt_set_fdi_bc_bifurcation(dev_priv, false);  in ivb_update_fdi_bc_bifurcation()
322 			cpt_set_fdi_bc_bifurcation(dev_priv, true);  in ivb_update_fdi_bc_bifurcation()
326 		cpt_set_fdi_bc_bifurcation(dev_priv, true);  in ivb_update_fdi_bc_bifurcation()
337 	struct drm_i915_private *dev_priv = to_i915(dev);  in intel_fdi_normal_train()  local
344 	temp = intel_de_read(dev_priv, reg);  in intel_fdi_normal_train()
345 	if (IS_IVYBRIDGE(dev_priv)) {  in intel_fdi_normal_train()
352 	intel_de_write(dev_priv, reg, temp);  in intel_fdi_normal_train()
355 	temp = intel_de_read(dev_priv, reg);  in intel_fdi_normal_train()
356 	if (HAS_PCH_CPT(dev_priv)) {  in intel_fdi_normal_train()
363 	intel_de_write(dev_priv, reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE);  in intel_fdi_normal_train()
366 	intel_de_posting_read(dev_priv, reg);  in intel_fdi_normal_train()
370 	if (IS_IVYBRIDGE(dev_priv))  in intel_fdi_normal_train()
371 		intel_de_rmw(dev_priv, reg, 0, FDI_FS_ERRC_ENABLE | FDI_FE_ERRC_ENABLE);  in intel_fdi_normal_train()
379 	struct drm_i915_private *dev_priv = to_i915(dev);  in ilk_fdi_link_train()  local
388 	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),  in ilk_fdi_link_train()
389 		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);  in ilk_fdi_link_train()
392 	assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder);  in ilk_fdi_link_train()
397 	temp = intel_de_read(dev_priv, reg);  in ilk_fdi_link_train()
400 	intel_de_write(dev_priv, reg, temp);  in ilk_fdi_link_train()
401 	intel_de_read(dev_priv, reg);  in ilk_fdi_link_train()
406 	temp = intel_de_read(dev_priv, reg);  in ilk_fdi_link_train()
411 	intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE);  in ilk_fdi_link_train()
414 	temp = intel_de_read(dev_priv, reg);  in ilk_fdi_link_train()
417 	intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE);  in ilk_fdi_link_train()
419 	intel_de_posting_read(dev_priv, reg);  in ilk_fdi_link_train()
423 	intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe),  in ilk_fdi_link_train()
425 	intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe),  in ilk_fdi_link_train()
430 		temp = intel_de_read(dev_priv, reg);  in ilk_fdi_link_train()
431 		drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);  in ilk_fdi_link_train()
434 			drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n");  in ilk_fdi_link_train()
435 			intel_de_write(dev_priv, reg, temp | FDI_RX_BIT_LOCK);  in ilk_fdi_link_train()
440 		drm_err(&dev_priv->drm, "FDI train 1 fail!\n");  in ilk_fdi_link_train()
443 	intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),  in ilk_fdi_link_train()
445 	intel_de_rmw(dev_priv, FDI_RX_CTL(pipe),  in ilk_fdi_link_train()
447 	intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe));  in ilk_fdi_link_train()
452 		temp = intel_de_read(dev_priv, reg);  in ilk_fdi_link_train()
453 		drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);  in ilk_fdi_link_train()
456 			intel_de_write(dev_priv, reg,  in ilk_fdi_link_train()
458 			drm_dbg_kms(&dev_priv->drm, "FDI train 2 done.\n");  in ilk_fdi_link_train()
463 		drm_err(&dev_priv->drm, "FDI train 2 fail!\n");  in ilk_fdi_link_train()
465 	drm_dbg_kms(&dev_priv->drm, "FDI train done\n");  in ilk_fdi_link_train()
481 	struct drm_i915_private *dev_priv = to_i915(dev);  in gen6_fdi_link_train()  local
490 	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),  in gen6_fdi_link_train()
491 		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);  in gen6_fdi_link_train()
496 	temp = intel_de_read(dev_priv, reg);  in gen6_fdi_link_train()
499 	intel_de_write(dev_priv, reg, temp);  in gen6_fdi_link_train()
501 	intel_de_posting_read(dev_priv, reg);  in gen6_fdi_link_train()
506 	temp = intel_de_read(dev_priv, reg);  in gen6_fdi_link_train()
514 	intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE);  in gen6_fdi_link_train()
516 	intel_de_write(dev_priv, FDI_RX_MISC(pipe),  in gen6_fdi_link_train()
520 	temp = intel_de_read(dev_priv, reg);  in gen6_fdi_link_train()
521 	if (HAS_PCH_CPT(dev_priv)) {  in gen6_fdi_link_train()
528 	intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE);  in gen6_fdi_link_train()
530 	intel_de_posting_read(dev_priv, reg);  in gen6_fdi_link_train()
534 		intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),  in gen6_fdi_link_train()
536 		intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe));  in gen6_fdi_link_train()
541 			temp = intel_de_read(dev_priv, reg);  in gen6_fdi_link_train()
542 			drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);  in gen6_fdi_link_train()
544 				intel_de_write(dev_priv, reg,  in gen6_fdi_link_train()
546 				drm_dbg_kms(&dev_priv->drm,  in gen6_fdi_link_train()
556 		drm_err(&dev_priv->drm, "FDI train 1 fail!\n");  in gen6_fdi_link_train()
560 	temp = intel_de_read(dev_priv, reg);  in gen6_fdi_link_train()
563 	if (IS_SANDYBRIDGE(dev_priv)) {  in gen6_fdi_link_train()
568 	intel_de_write(dev_priv, reg, temp);  in gen6_fdi_link_train()
571 	temp = intel_de_read(dev_priv, reg);  in gen6_fdi_link_train()
572 	if (HAS_PCH_CPT(dev_priv)) {  in gen6_fdi_link_train()
579 	intel_de_write(dev_priv, reg, temp);  in gen6_fdi_link_train()
581 	intel_de_posting_read(dev_priv, reg);  in gen6_fdi_link_train()
585 		intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),  in gen6_fdi_link_train()
587 		intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe));  in gen6_fdi_link_train()
592 			temp = intel_de_read(dev_priv, reg);  in gen6_fdi_link_train()
593 			drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);  in gen6_fdi_link_train()
595 				intel_de_write(dev_priv, reg,  in gen6_fdi_link_train()
597 				drm_dbg_kms(&dev_priv->drm,  in gen6_fdi_link_train()
607 		drm_err(&dev_priv->drm, "FDI train 2 fail!\n");  in gen6_fdi_link_train()
609 	drm_dbg_kms(&dev_priv->drm, "FDI train done.\n");  in gen6_fdi_link_train()
617 	struct drm_i915_private *dev_priv = to_i915(dev);  in ivb_manual_fdi_link_train()  local
628 	intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),  in ivb_manual_fdi_link_train()
629 		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);  in ivb_manual_fdi_link_train()
634 	temp = intel_de_read(dev_priv, reg);  in ivb_manual_fdi_link_train()
637 	intel_de_write(dev_priv, reg, temp);  in ivb_manual_fdi_link_train()
639 	intel_de_posting_read(dev_priv, reg);  in ivb_manual_fdi_link_train()
642 	drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR before link train 0x%x\n",  in ivb_manual_fdi_link_train()
643 		    intel_de_read(dev_priv, FDI_RX_IIR(pipe)));  in ivb_manual_fdi_link_train()
649 		temp = intel_de_read(dev_priv, reg);  in ivb_manual_fdi_link_train()
652 		intel_de_write(dev_priv, reg, temp);  in ivb_manual_fdi_link_train()
655 		temp = intel_de_read(dev_priv, reg);  in ivb_manual_fdi_link_train()
659 		intel_de_write(dev_priv, reg, temp);  in ivb_manual_fdi_link_train()
663 		temp = intel_de_read(dev_priv, reg);  in ivb_manual_fdi_link_train()
670 		intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE);  in ivb_manual_fdi_link_train()
672 		intel_de_write(dev_priv, FDI_RX_MISC(pipe),  in ivb_manual_fdi_link_train()
676 		temp = intel_de_read(dev_priv, reg);  in ivb_manual_fdi_link_train()
679 		intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE);  in ivb_manual_fdi_link_train()
681 		intel_de_posting_read(dev_priv, reg);  in ivb_manual_fdi_link_train()
686 			temp = intel_de_read(dev_priv, reg);  in ivb_manual_fdi_link_train()
687 			drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);  in ivb_manual_fdi_link_train()
690 			    (intel_de_read(dev_priv, reg) & FDI_RX_BIT_LOCK)) {  in ivb_manual_fdi_link_train()
691 				intel_de_write(dev_priv, reg,  in ivb_manual_fdi_link_train()
693 				drm_dbg_kms(&dev_priv->drm,  in ivb_manual_fdi_link_train()
701 			drm_dbg_kms(&dev_priv->drm,  in ivb_manual_fdi_link_train()
707 		intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),  in ivb_manual_fdi_link_train()
710 		intel_de_rmw(dev_priv, FDI_RX_CTL(pipe),  in ivb_manual_fdi_link_train()
713 		intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe));  in ivb_manual_fdi_link_train()
718 			temp = intel_de_read(dev_priv, reg);  in ivb_manual_fdi_link_train()
719 			drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);  in ivb_manual_fdi_link_train()
722 			    (intel_de_read(dev_priv, reg) & FDI_RX_SYMBOL_LOCK)) {  in ivb_manual_fdi_link_train()
723 				intel_de_write(dev_priv, reg,  in ivb_manual_fdi_link_train()
725 				drm_dbg_kms(&dev_priv->drm,  in ivb_manual_fdi_link_train()
733 			drm_dbg_kms(&dev_priv->drm,  in ivb_manual_fdi_link_train()
738 	drm_dbg_kms(&dev_priv->drm, "FDI train done.\n");  in ivb_manual_fdi_link_train()
753 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in hsw_fdi_link_train()  local
768 	intel_de_write(dev_priv, FDI_RX_MISC(PIPE_A),  in hsw_fdi_link_train()
772 	rx_ctl_val = dev_priv->display.fdi.rx_config | FDI_RX_ENHANCE_FRAME_ENABLE |  in hsw_fdi_link_train()
775 	intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val);  in hsw_fdi_link_train()
776 	intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A));  in hsw_fdi_link_train()
781 	intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val);  in hsw_fdi_link_train()
784 	drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL);  in hsw_fdi_link_train()
791 		intel_de_write(dev_priv, DP_TP_CTL(PORT_E),  in hsw_fdi_link_train()
801 		intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E),  in hsw_fdi_link_train()
803 		intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E));  in hsw_fdi_link_train()
808 		intel_de_write(dev_priv, FDI_RX_TUSIZE1(PIPE_A), TU_SIZE(64));  in hsw_fdi_link_train()
812 		intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val);  in hsw_fdi_link_train()
813 		intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A));  in hsw_fdi_link_train()
819 		intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A),  in hsw_fdi_link_train()
821 		intel_de_posting_read(dev_priv, FDI_RX_MISC(PIPE_A));  in hsw_fdi_link_train()
826 		temp = intel_de_read(dev_priv, DP_TP_STATUS(PORT_E));  in hsw_fdi_link_train()
828 			drm_dbg_kms(&dev_priv->drm,  in hsw_fdi_link_train()
838 			drm_err(&dev_priv->drm, "FDI link training failed!\n");  in hsw_fdi_link_train()
843 		intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val);  in hsw_fdi_link_train()
844 		intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A));  in hsw_fdi_link_train()
846 		intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);  in hsw_fdi_link_train()
847 		intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E));  in hsw_fdi_link_train()
850 		intel_de_rmw(dev_priv, DP_TP_CTL(PORT_E), DP_TP_CTL_ENABLE, 0);  in hsw_fdi_link_train()
851 		intel_de_posting_read(dev_priv, DP_TP_CTL(PORT_E));  in hsw_fdi_link_train()
853 		intel_wait_ddi_buf_idle(dev_priv, PORT_E);  in hsw_fdi_link_train()
856 		intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A),  in hsw_fdi_link_train()
859 		intel_de_posting_read(dev_priv, FDI_RX_MISC(PIPE_A));  in hsw_fdi_link_train()
863 	intel_de_write(dev_priv, DP_TP_CTL(PORT_E),  in hsw_fdi_link_train()
872 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);  in hsw_fdi_disable()  local
880 	intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_RX_ENABLE, 0);  in hsw_fdi_disable()
881 	intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);  in hsw_fdi_disable()
882 	intel_wait_ddi_buf_idle(dev_priv, PORT_E);  in hsw_fdi_disable()
884 	intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A),  in hsw_fdi_disable()
887 	intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_PCDCLK, 0);  in hsw_fdi_disable()
888 	intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_RX_PLL_ENABLE, 0);  in hsw_fdi_disable()
894 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in ilk_fdi_pll_enable()  local
901 	temp = intel_de_read(dev_priv, reg);  in ilk_fdi_pll_enable()
904 	temp |= (intel_de_read(dev_priv, TRANSCONF(pipe)) & TRANSCONF_BPC_MASK) << 11;  in ilk_fdi_pll_enable()
905 	intel_de_write(dev_priv, reg, temp | FDI_RX_PLL_ENABLE);  in ilk_fdi_pll_enable()
907 	intel_de_posting_read(dev_priv, reg);  in ilk_fdi_pll_enable()
911 	intel_de_rmw(dev_priv, reg, 0, FDI_PCDCLK);  in ilk_fdi_pll_enable()
912 	intel_de_posting_read(dev_priv, reg);  in ilk_fdi_pll_enable()
917 	temp = intel_de_read(dev_priv, reg);  in ilk_fdi_pll_enable()
919 		intel_de_write(dev_priv, reg, temp | FDI_TX_PLL_ENABLE);  in ilk_fdi_pll_enable()
921 		intel_de_posting_read(dev_priv, reg);  in ilk_fdi_pll_enable()
929 	struct drm_i915_private *dev_priv = to_i915(dev);  in ilk_fdi_pll_disable()  local
933 	intel_de_rmw(dev_priv, FDI_RX_CTL(pipe), FDI_PCDCLK, 0);  in ilk_fdi_pll_disable()
936 	intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), FDI_TX_PLL_ENABLE, 0);  in ilk_fdi_pll_disable()
937 	intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe));  in ilk_fdi_pll_disable()
941 	intel_de_rmw(dev_priv, FDI_RX_CTL(pipe), FDI_RX_PLL_ENABLE, 0);  in ilk_fdi_pll_disable()
942 	intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe));  in ilk_fdi_pll_disable()
948 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);  in ilk_fdi_disable()  local
954 	intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), FDI_TX_ENABLE, 0);  in ilk_fdi_disable()
955 	intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe));  in ilk_fdi_disable()
958 	temp = intel_de_read(dev_priv, reg);  in ilk_fdi_disable()
960 	temp |= (intel_de_read(dev_priv, TRANSCONF(pipe)) & TRANSCONF_BPC_MASK) << 11;  in ilk_fdi_disable()
961 	intel_de_write(dev_priv, reg, temp & ~FDI_RX_ENABLE);  in ilk_fdi_disable()
963 	intel_de_posting_read(dev_priv, reg);  in ilk_fdi_disable()
967 	if (HAS_PCH_IBX(dev_priv))  in ilk_fdi_disable()
968 		intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe),  in ilk_fdi_disable()
972 	intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),  in ilk_fdi_disable()
976 	temp = intel_de_read(dev_priv, reg);  in ilk_fdi_disable()
977 	if (HAS_PCH_CPT(dev_priv)) {  in ilk_fdi_disable()
986 	temp |= (intel_de_read(dev_priv, TRANSCONF(pipe)) & TRANSCONF_BPC_MASK) << 11;  in ilk_fdi_disable()
987 	intel_de_write(dev_priv, reg, temp);  in ilk_fdi_disable()
989 	intel_de_posting_read(dev_priv, reg);  in ilk_fdi_disable()
1006 intel_fdi_init_hook(struct drm_i915_private *dev_priv)  in intel_fdi_init_hook()  argument
1008 	if (IS_IRONLAKE(dev_priv)) {  in intel_fdi_init_hook()
1009 		dev_priv->display.funcs.fdi = &ilk_funcs;  in intel_fdi_init_hook()
1010 	} else if (IS_SANDYBRIDGE(dev_priv)) {  in intel_fdi_init_hook()
1011 		dev_priv->display.funcs.fdi = &gen6_funcs;  in intel_fdi_init_hook()
1012 	} else if (IS_IVYBRIDGE(dev_priv)) {  in intel_fdi_init_hook()
1014 		dev_priv->display.funcs.fdi = &ivb_funcs;  in intel_fdi_init_hook()