Lines Matching refs:IS_VALLEYVIEW
174 if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))) in intel_update_czclk()
2059 else if (IS_VALLEYVIEW(dev_priv)) in i9xx_crtc_disable()
2704 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_set_pipeconf()
2738 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_set_pipeconf()
2915 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_get_pipe_config()
2933 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_get_pipe_config()
2941 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_get_pipe_config()
2984 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { in i9xx_get_pipe_config()
2998 else if (IS_VALLEYVIEW(dev_priv)) in i9xx_get_pipe_config()
4398 if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in compute_baseline_pipe_bpp()
4631 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_prepare_cleared_state()
4995 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in fastboot_enabled()
5252 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pipe_config_compare()
5616 IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv) || in active_planes_affects_min_cdclk()
7458 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_setup_outputs()
7461 if (IS_VALLEYVIEW(dev_priv) && dev_priv->display.vbt.int_crt_support) in intel_setup_outputs()
7778 IS_VALLEYVIEW(dev_priv)) { in intel_init_display_hooks()