Lines Matching refs:DPLL
370 dpll_reg = DPLL(0); in vlv_wait_port_ready()
374 dpll_reg = DPLL(0); in vlv_wait_port_ready()
2972 tmp = intel_de_read(dev_priv, DPLL(crtc->pipe)); in i9xx_get_pipe_config()
2983 DPLL(crtc->pipe)); in i9xx_get_pipe_config()
7909 intel_de_write(dev_priv, DPLL(pipe), dpll & ~DPLL_VGA_MODE_DIS); in i830_enable_pipe()
7910 intel_de_write(dev_priv, DPLL(pipe), dpll); in i830_enable_pipe()
7913 intel_de_posting_read(dev_priv, DPLL(pipe)); in i830_enable_pipe()
7921 intel_de_write(dev_priv, DPLL(pipe), dpll); in i830_enable_pipe()
7925 intel_de_write(dev_priv, DPLL(pipe), dpll); in i830_enable_pipe()
7926 intel_de_posting_read(dev_priv, DPLL(pipe)); in i830_enable_pipe()
7959 intel_de_write(dev_priv, DPLL(pipe), DPLL_VGA_MODE_DIS); in i830_disable_pipe()
7960 intel_de_posting_read(dev_priv, DPLL(pipe)); in i830_disable_pipe()