955 	u32 signal_levels = 0;  in g4x_signal_levels()  local
960 		signal_levels |= DP_VOLTAGE_0_4;  in g4x_signal_levels()
963 		signal_levels |= DP_VOLTAGE_0_6;  in g4x_signal_levels()
966 		signal_levels |= DP_VOLTAGE_0_8;  in g4x_signal_levels()
969 		signal_levels |= DP_VOLTAGE_1_2;  in g4x_signal_levels()
975 		signal_levels |= DP_PRE_EMPHASIS_0;  in g4x_signal_levels()
978 		signal_levels |= DP_PRE_EMPHASIS_3_5;  in g4x_signal_levels()
981 		signal_levels |= DP_PRE_EMPHASIS_6;  in g4x_signal_levels()
984 		signal_levels |= DP_PRE_EMPHASIS_9_5;  in g4x_signal_levels()
987 	return signal_levels;  in g4x_signal_levels()
997 	u32 signal_levels;  in g4x_set_signal_levels()  local
999 	signal_levels = g4x_signal_levels(train_set);  in g4x_set_signal_levels()
1002 		    signal_levels);  in g4x_set_signal_levels()
1005 	intel_dp->DP |= signal_levels;  in g4x_set_signal_levels()
1014 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in snb_cpu_edp_signal_levels()  local
1017 	switch (signal_levels) {  in snb_cpu_edp_signal_levels()
1033 		MISSING_CASE(signal_levels);  in snb_cpu_edp_signal_levels()
1045 	u32 signal_levels;  in snb_cpu_edp_set_signal_levels()  local
1047 	signal_levels = snb_cpu_edp_signal_levels(train_set);  in snb_cpu_edp_set_signal_levels()
1050 		    signal_levels);  in snb_cpu_edp_set_signal_levels()
1053 	intel_dp->DP |= signal_levels;  in snb_cpu_edp_set_signal_levels()
1062 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in ivb_cpu_edp_signal_levels()  local
1065 	switch (signal_levels) {  in ivb_cpu_edp_signal_levels()
1085 		MISSING_CASE(signal_levels);  in ivb_cpu_edp_signal_levels()
1097 	u32 signal_levels;  in ivb_cpu_edp_set_signal_levels()  local
1099 	signal_levels = ivb_cpu_edp_signal_levels(train_set);  in ivb_cpu_edp_set_signal_levels()
1102 		    signal_levels);  in ivb_cpu_edp_set_signal_levels()
1105 	intel_dp->DP |= signal_levels;  in ivb_cpu_edp_set_signal_levels()