Lines Matching +full:aux +full:- +full:bus
1 // SPDX-License-Identifier: GPL-2.0
134 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver.
135 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality.
136 * @gpio_aux: AUX-bus sub device for GPIO controller functionality.
137 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality.
138 * @pwm_aux: AUX-bus sub device for PWM controller functionality.
142 * @aux: Our aux channel.
153 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
154 * @comms_enabled: If true then communication over the aux channel is enabled.
159 * serves double-duty of keeping track of the direction and
165 * each other's read-modify-write.
180 struct drm_dp_aux aux; member
230 ret = regmap_bulk_read(pdata->regmap, reg, buf, ARRAY_SIZE(buf)); in ti_sn65dsi86_read_u16()
244 regmap_bulk_write(pdata->regmap, reg, buf, ARRAY_SIZE(buf)); in ti_sn65dsi86_write_u16()
251 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_get_dsi_freq()
253 bit_rate_khz = mode->clock * in ti_sn_bridge_get_dsi_freq()
254 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_get_dsi_freq()
255 clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2); in ti_sn_bridge_get_dsi_freq()
285 if (pdata->refclk) { in ti_sn_bridge_set_refclk_freq()
286 refclk_rate = clk_get_rate(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
289 clk_prepare_enable(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
305 regmap_update_bits(pdata->regmap, SN_DPPLL_SRC_REG, REFCLK_FREQ_MASK, in ti_sn_bridge_set_refclk_freq()
312 pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; in ti_sn_bridge_set_refclk_freq()
317 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
327 * voltage, and temperate--I measured it at about 200 ms). One in ti_sn65dsi86_enable_comms()
338 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE, in ti_sn65dsi86_enable_comms()
341 pdata->comms_enabled = true; in ti_sn65dsi86_enable_comms()
343 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
348 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
350 pdata->comms_enabled = false; in ti_sn65dsi86_disable_comms()
351 clk_disable_unprepare(pdata->refclk); in ti_sn65dsi86_disable_comms()
353 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
361 ret = regulator_bulk_enable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_resume()
370 gpiod_set_value_cansleep(pdata->enable_gpio, 1); in ti_sn65dsi86_resume()
374 * panel (including the aux channel) w/out any need for an input clock in ti_sn65dsi86_resume()
379 if (pdata->refclk) in ti_sn65dsi86_resume()
390 if (pdata->refclk) in ti_sn65dsi86_suspend()
393 gpiod_set_value_cansleep(pdata->enable_gpio, 0); in ti_sn65dsi86_suspend()
395 ret = regulator_bulk_disable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_suspend()
410 struct ti_sn65dsi86 *pdata = s->private; in status_show()
415 pm_runtime_get_sync(pdata->dev); in status_show()
419 regmap_read(pdata->regmap, reg, &val); in status_show()
423 pm_runtime_put_autosuspend(pdata->dev); in status_show()
437 struct device *dev = pdata->dev; in ti_sn65dsi86_debugfs_init()
457 /* -----------------------------------------------------------------------------
458 * Auxiliary Devices (*not* AUX)
473 struct auxiliary_device *aux = container_of(dev, struct auxiliary_device, dev); in ti_sn65dsi86_aux_device_release() local
475 kfree(aux); in ti_sn65dsi86_aux_device_release()
482 struct device *dev = pdata->dev; in ti_sn65dsi86_add_aux_device()
483 struct auxiliary_device *aux; in ti_sn65dsi86_add_aux_device() local
486 aux = kzalloc(sizeof(*aux), GFP_KERNEL); in ti_sn65dsi86_add_aux_device()
487 if (!aux) in ti_sn65dsi86_add_aux_device()
488 return -ENOMEM; in ti_sn65dsi86_add_aux_device()
490 aux->name = name; in ti_sn65dsi86_add_aux_device()
491 aux->dev.parent = dev; in ti_sn65dsi86_add_aux_device()
492 aux->dev.release = ti_sn65dsi86_aux_device_release; in ti_sn65dsi86_add_aux_device()
493 device_set_of_node_from_dev(&aux->dev, dev); in ti_sn65dsi86_add_aux_device()
494 ret = auxiliary_device_init(aux); in ti_sn65dsi86_add_aux_device()
496 kfree(aux); in ti_sn65dsi86_add_aux_device()
499 ret = devm_add_action_or_reset(dev, ti_sn65dsi86_uninit_aux, aux); in ti_sn65dsi86_add_aux_device()
503 ret = auxiliary_device_add(aux); in ti_sn65dsi86_add_aux_device()
506 ret = devm_add_action_or_reset(dev, ti_sn65dsi86_delete_aux, aux); in ti_sn65dsi86_add_aux_device()
508 *aux_out = aux; in ti_sn65dsi86_add_aux_device()
513 /* -----------------------------------------------------------------------------
514 * AUX Adapter
517 static struct ti_sn65dsi86 *aux_to_ti_sn65dsi86(struct drm_dp_aux *aux) in aux_to_ti_sn65dsi86() argument
519 return container_of(aux, struct ti_sn65dsi86, aux); in aux_to_ti_sn65dsi86()
522 static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux, in ti_sn_aux_transfer() argument
525 struct ti_sn65dsi86 *pdata = aux_to_ti_sn65dsi86(aux); in ti_sn_aux_transfer()
526 u32 request = msg->request & ~(DP_AUX_I2C_MOT | DP_AUX_I2C_WRITE_STATUS_UPDATE); in ti_sn_aux_transfer()
527 u32 request_val = AUX_CMD_REQ(msg->request); in ti_sn_aux_transfer()
528 u8 *buf = msg->buffer; in ti_sn_aux_transfer()
529 unsigned int len = msg->size; in ti_sn_aux_transfer()
532 u8 addr_len[SN_AUX_LENGTH_REG + 1 - SN_AUX_ADDR_19_16_REG]; in ti_sn_aux_transfer()
535 return -EINVAL; in ti_sn_aux_transfer()
537 pm_runtime_get_sync(pdata->dev); in ti_sn_aux_transfer()
538 mutex_lock(&pdata->comms_mutex); in ti_sn_aux_transfer()
541 * If someone tries to do a DDC over AUX transaction before pre_enable() in ti_sn_aux_transfer()
543 * do it. Fail right away. This prevents non-refclk users from reading in ti_sn_aux_transfer()
546 if (!pdata->comms_enabled) { in ti_sn_aux_transfer()
547 ret = -EIO; in ti_sn_aux_transfer()
556 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val); in ti_sn_aux_transfer()
558 msg->reply = 0; in ti_sn_aux_transfer()
561 ret = -EINVAL; in ti_sn_aux_transfer()
566 put_unaligned_be32((msg->address & SN_AUX_ADDR_MASK) << 8 | len, in ti_sn_aux_transfer()
568 regmap_bulk_write(pdata->regmap, SN_AUX_ADDR_19_16_REG, addr_len, in ti_sn_aux_transfer()
572 regmap_bulk_write(pdata->regmap, SN_AUX_WDATA_REG(0), buf, len); in ti_sn_aux_transfer()
575 regmap_write(pdata->regmap, SN_AUX_CMD_STATUS_REG, in ti_sn_aux_transfer()
580 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val | AUX_CMD_SEND); in ti_sn_aux_transfer()
583 ret = regmap_read_poll_timeout(pdata->regmap, SN_AUX_CMD_REG, val, in ti_sn_aux_transfer()
588 ret = regmap_read(pdata->regmap, SN_AUX_CMD_STATUS_REG, &val); in ti_sn_aux_transfer()
598 ret = -ETIMEDOUT; in ti_sn_aux_transfer()
603 ret = regmap_read(pdata->regmap, SN_AUX_LENGTH_REG, &len); in ti_sn_aux_transfer()
610 msg->reply |= DP_AUX_I2C_REPLY_NACK; in ti_sn_aux_transfer()
614 msg->reply |= DP_AUX_NATIVE_REPLY_NACK; in ti_sn_aux_transfer()
622 ret = regmap_bulk_read(pdata->regmap, SN_AUX_RDATA_REG(0), buf, len); in ti_sn_aux_transfer()
625 mutex_unlock(&pdata->comms_mutex); in ti_sn_aux_transfer()
626 pm_runtime_mark_last_busy(pdata->dev); in ti_sn_aux_transfer()
627 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_aux_transfer()
634 static int ti_sn_aux_wait_hpd_asserted(struct drm_dp_aux *aux, unsigned long wait_us) in ti_sn_aux_wait_hpd_asserted() argument
655 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_aux_probe()
658 pdata->aux.name = "ti-sn65dsi86-aux"; in ti_sn_aux_probe()
659 pdata->aux.dev = &adev->dev; in ti_sn_aux_probe()
660 pdata->aux.transfer = ti_sn_aux_transfer; in ti_sn_aux_probe()
661 pdata->aux.wait_hpd_asserted = ti_sn_aux_wait_hpd_asserted; in ti_sn_aux_probe()
662 drm_dp_aux_init(&pdata->aux); in ti_sn_aux_probe()
664 ret = devm_of_dp_aux_populate_ep_devices(&pdata->aux); in ti_sn_aux_probe()
669 * The eDP to MIPI bridge parts don't work until the AUX channel is in ti_sn_aux_probe()
672 return ti_sn65dsi86_add_aux_device(pdata, &pdata->bridge_aux, "bridge"); in ti_sn_aux_probe()
676 { .name = "ti_sn65dsi86.aux", },
681 .name = "aux",
686 /*------------------------------------------------------------------------------
700 struct device *dev = pdata->dev; in ti_sn_attach_host()
706 host = of_find_mipi_dsi_host_by_node(pdata->host_node); in ti_sn_attach_host()
708 return -EPROBE_DEFER; in ti_sn_attach_host()
710 dsi = devm_mipi_dsi_device_register_full(&adev->dev, host, &info); in ti_sn_attach_host()
715 dsi->lanes = 4; in ti_sn_attach_host()
716 dsi->format = MIPI_DSI_FMT_RGB888; in ti_sn_attach_host()
717 dsi->mode_flags = MIPI_DSI_MODE_VIDEO; in ti_sn_attach_host()
721 regmap_read(pdata->regmap, SN_DPPLL_SRC_REG, &val); in ti_sn_attach_host()
724 dsi->mode_flags |= MIPI_DSI_CLOCK_NON_CONTINUOUS; in ti_sn_attach_host()
726 pdata->dsi = dsi; in ti_sn_attach_host()
728 return devm_mipi_dsi_attach(&adev->dev, dsi); in ti_sn_attach_host()
737 pdata->aux.drm_dev = bridge->dev; in ti_sn_bridge_attach()
738 ret = drm_dp_aux_register(&pdata->aux); in ti_sn_bridge_attach()
740 drm_err(bridge->dev, "Failed to register DP AUX channel: %d\n", ret); in ti_sn_bridge_attach()
748 ret = drm_bridge_attach(bridge->encoder, pdata->next_bridge, in ti_sn_bridge_attach()
749 &pdata->bridge, flags | DRM_BRIDGE_ATTACH_NO_CONNECTOR); in ti_sn_bridge_attach()
756 pdata->connector = drm_bridge_connector_init(pdata->bridge.dev, in ti_sn_bridge_attach()
757 pdata->bridge.encoder); in ti_sn_bridge_attach()
758 if (IS_ERR(pdata->connector)) { in ti_sn_bridge_attach()
759 ret = PTR_ERR(pdata->connector); in ti_sn_bridge_attach()
763 drm_connector_attach_encoder(pdata->connector, pdata->bridge.encoder); in ti_sn_bridge_attach()
768 drm_dp_aux_unregister(&pdata->aux); in ti_sn_bridge_attach()
774 drm_dp_aux_unregister(&bridge_to_ti_sn65dsi86(bridge)->aux); in ti_sn_bridge_detach()
783 if (mode->clock > 594000) in ti_sn_bridge_mode_valid()
791 if ((mode->hsync_start - mode->hdisplay) > 0xff) in ti_sn_bridge_mode_valid()
794 if ((mode->vsync_start - mode->vdisplay) > 0xff) in ti_sn_bridge_mode_valid()
797 if ((mode->hsync_end - mode->hsync_start) > 0x7fff) in ti_sn_bridge_mode_valid()
800 if ((mode->vsync_end - mode->vsync_start) > 0x7fff) in ti_sn_bridge_mode_valid()
803 if ((mode->htotal - mode->hsync_end) > 0xff) in ti_sn_bridge_mode_valid()
806 if ((mode->vtotal - mode->vsync_end) > 0xff) in ti_sn_bridge_mode_valid()
818 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, 0); in ti_sn_bridge_atomic_disable()
826 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_set_dsi_rate()
829 bit_rate_mhz = (mode->clock / 1000) * in ti_sn_bridge_set_dsi_rate()
830 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_set_dsi_rate()
831 clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); in ti_sn_bridge_set_dsi_rate()
835 (((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF); in ti_sn_bridge_set_dsi_rate()
836 regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val); in ti_sn_bridge_set_dsi_rate()
841 if (connector->display_info.bpc <= 6) in ti_sn_bridge_get_bpp()
861 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_calc_min_dp_rate_idx()
864 bit_rate_khz = mode->clock * bpp; in ti_sn_bridge_calc_min_dp_rate_idx()
868 1000 * pdata->dp_lanes * DP_CLK_FUDGE_DEN); in ti_sn_bridge_calc_min_dp_rate_idx()
870 for (i = 1; i < ARRAY_SIZE(ti_sn_bridge_dp_rate_lut) - 1; i++) in ti_sn_bridge_calc_min_dp_rate_idx()
886 ret = drm_dp_dpcd_readb(&pdata->aux, DP_EDP_DPCD_REV, &dpcd_val); in ti_sn_bridge_read_valid_rates()
888 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
897 ret = drm_dp_dpcd_read(&pdata->aux, DP_SUPPORTED_LINK_RATES, in ti_sn_bridge_read_valid_rates()
901 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
927 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
932 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LINK_RATE, &dpcd_val); in ti_sn_bridge_read_valid_rates()
934 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
942 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
963 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_set_video_timings()
966 if (mode->flags & DRM_MODE_FLAG_NHSYNC) in ti_sn_bridge_set_video_timings()
968 if (mode->flags & DRM_MODE_FLAG_NVSYNC) in ti_sn_bridge_set_video_timings()
972 mode->hdisplay); in ti_sn_bridge_set_video_timings()
974 mode->vdisplay); in ti_sn_bridge_set_video_timings()
975 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
976 (mode->hsync_end - mode->hsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
977 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
978 (((mode->hsync_end - mode->hsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
980 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
981 (mode->vsync_end - mode->vsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
982 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
983 (((mode->vsync_end - mode->vsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
986 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
987 (mode->htotal - mode->hsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
988 regmap_write(pdata->regmap, SN_CHA_VERTICAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
989 (mode->vtotal - mode->vsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
991 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
992 (mode->hsync_start - mode->hdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
993 regmap_write(pdata->regmap, SN_CHA_VERTICAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
994 (mode->vsync_start - mode->vdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
1004 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LANE_COUNT, &data); in ti_sn_get_max_lanes()
1006 DRM_DEV_ERROR(pdata->dev, in ti_sn_get_max_lanes()
1022 regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG, in ti_sn_link_training()
1026 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1); in ti_sn_link_training()
1028 ret = regmap_read_poll_timeout(pdata->regmap, SN_DPPLL_SRC_REG, val, in ti_sn_link_training()
1044 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A); in ti_sn_link_training()
1045 ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val, in ti_sn_link_training()
1053 ret = -EIO; in ti_sn_link_training()
1062 DRM_DEV_INFO(pdata->dev, "Link training needed %d retries\n", i); in ti_sn_link_training()
1067 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_link_training()
1081 int ret = -EINVAL; in ti_sn_bridge_atomic_enable()
1085 connector = drm_atomic_get_new_connector_for_encoder(old_bridge_state->base.state, in ti_sn_bridge_atomic_enable()
1086 bridge->encoder); in ti_sn_bridge_atomic_enable()
1088 dev_err_ratelimited(pdata->dev, "Could not get the connector\n"); in ti_sn_bridge_atomic_enable()
1093 pdata->dp_lanes = min(pdata->dp_lanes, max_dp_lanes); in ti_sn_bridge_atomic_enable()
1096 val = CHA_DSI_LANES(SN_MAX_DP_LANES - pdata->dsi->lanes); in ti_sn_bridge_atomic_enable()
1097 regmap_update_bits(pdata->regmap, SN_DSI_LANES_REG, in ti_sn_bridge_atomic_enable()
1100 regmap_write(pdata->regmap, SN_LN_ASSIGN_REG, pdata->ln_assign); in ti_sn_bridge_atomic_enable()
1101 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, LN_POLRS_MASK, in ti_sn_bridge_atomic_enable()
1102 pdata->ln_polrs << LN_POLRS_OFFSET); in ti_sn_bridge_atomic_enable()
1116 if (pdata->bridge.type == DRM_MODE_CONNECTOR_eDP) { in ti_sn_bridge_atomic_enable()
1117 drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET, in ti_sn_bridge_atomic_enable()
1120 regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG, in ti_sn_bridge_atomic_enable()
1123 regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG, in ti_sn_bridge_atomic_enable()
1130 regmap_update_bits(pdata->regmap, SN_DATA_FORMAT_REG, BPP_18_RGB, val); in ti_sn_bridge_atomic_enable()
1133 val = DP_NUM_LANES(min(pdata->dp_lanes, 3)); in ti_sn_bridge_atomic_enable()
1134 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, in ti_sn_bridge_atomic_enable()
1151 DRM_DEV_ERROR(pdata->dev, "%s (%d)\n", last_err_str, ret); in ti_sn_bridge_atomic_enable()
1159 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, in ti_sn_bridge_atomic_enable()
1168 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_atomic_pre_enable()
1170 if (!pdata->refclk) in ti_sn_bridge_atomic_pre_enable()
1183 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0); in ti_sn_bridge_atomic_post_disable()
1185 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, 0); in ti_sn_bridge_atomic_post_disable()
1187 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_bridge_atomic_post_disable()
1189 if (!pdata->refclk) in ti_sn_bridge_atomic_post_disable()
1192 pm_runtime_put_sync(pdata->dev); in ti_sn_bridge_atomic_post_disable()
1200 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_detect()
1201 regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val); in ti_sn_bridge_detect()
1202 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_detect()
1213 return drm_get_edid(connector, &pdata->aux.ddc); in ti_sn_bridge_get_edid()
1246 * data-lanes but not lane-polarities but not vice versa. in ti_sn_bridge_parse_lanes()
1252 endpoint = of_graph_get_endpoint_by_regs(np, 1, -1); in ti_sn_bridge_parse_lanes()
1255 of_property_read_u32_array(endpoint, "data-lanes", in ti_sn_bridge_parse_lanes()
1257 of_property_read_u32_array(endpoint, "lane-polarities", in ti_sn_bridge_parse_lanes()
1266 * data-lanes had fewer elements so that we nicely initialize in ti_sn_bridge_parse_lanes()
1269 for (i = SN_MAX_DP_LANES - 1; i >= 0; i--) { in ti_sn_bridge_parse_lanes()
1275 pdata->dp_lanes = dp_lanes; in ti_sn_bridge_parse_lanes()
1276 pdata->ln_assign = ln_assign; in ti_sn_bridge_parse_lanes()
1277 pdata->ln_polrs = ln_polrs; in ti_sn_bridge_parse_lanes()
1282 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_parse_dsi_host()
1284 pdata->host_node = of_graph_get_remote_node(np, 0, 0); in ti_sn_bridge_parse_dsi_host()
1286 if (!pdata->host_node) { in ti_sn_bridge_parse_dsi_host()
1288 return -ENODEV; in ti_sn_bridge_parse_dsi_host()
1297 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_probe()
1298 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_probe()
1301 pdata->next_bridge = devm_drm_of_get_bridge(&adev->dev, np, 1, 0); in ti_sn_bridge_probe()
1302 if (IS_ERR(pdata->next_bridge)) in ti_sn_bridge_probe()
1303 return dev_err_probe(&adev->dev, PTR_ERR(pdata->next_bridge), in ti_sn_bridge_probe()
1312 pdata->bridge.funcs = &ti_sn_bridge_funcs; in ti_sn_bridge_probe()
1313 pdata->bridge.of_node = np; in ti_sn_bridge_probe()
1314 pdata->bridge.type = pdata->next_bridge->type == DRM_MODE_CONNECTOR_DisplayPort in ti_sn_bridge_probe()
1317 if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort) in ti_sn_bridge_probe()
1318 pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT; in ti_sn_bridge_probe()
1320 drm_bridge_add(&pdata->bridge); in ti_sn_bridge_probe()
1324 dev_err_probe(&adev->dev, ret, "failed to attach dsi host\n"); in ti_sn_bridge_probe()
1331 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_probe()
1337 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_remove()
1342 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_remove()
1344 of_node_put(pdata->host_node); in ti_sn_bridge_remove()
1359 /* -----------------------------------------------------------------------------
1365 return atomic_xchg(&pdata->pwm_pin_busy, 1) ? -EBUSY : 0; in ti_sn_pwm_pin_request()
1370 atomic_set(&pdata->pwm_pin_busy, 0); in ti_sn_pwm_pin_release()
1394 * - The PWM signal is not driven when the chip is powered down, or in its
1396 * described in the documentation. In order to save power, state->enabled is
1399 * - Changing both period and duty_cycle is not done atomically, neither is the
1400 * multi-byte register updates, so the output might briefly be undefined
1415 if (!pdata->pwm_enabled) { in ti_sn_pwm_apply()
1416 ret = pm_runtime_get_sync(pdata->dev); in ti_sn_pwm_apply()
1418 pm_runtime_put_sync(pdata->dev); in ti_sn_pwm_apply()
1423 if (state->enabled) { in ti_sn_pwm_apply()
1424 if (!pdata->pwm_enabled) { in ti_sn_pwm_apply()
1430 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_pwm_apply()
1434 dev_err(pdata->dev, "failed to mux in PWM function\n"); in ti_sn_pwm_apply()
1443 * PWM_FREQ = ----------------------------------- in ti_sn_pwm_apply()
1458 * PWM_PRE_DIV >= ------------------------- in ti_sn_pwm_apply()
1467 * BACKLIGHT_SCALE = ---------------------- - 1 in ti_sn_pwm_apply()
1475 if (state->period <= NSEC_PER_SEC / pdata->pwm_refclk_freq) { in ti_sn_pwm_apply()
1476 ret = -EINVAL; in ti_sn_pwm_apply()
1485 pdata->pwm_refclk_freq); in ti_sn_pwm_apply()
1486 period = min(state->period, period_max); in ti_sn_pwm_apply()
1488 pre_div = DIV64_U64_ROUND_UP(period * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1490 scale = div64_u64(period * pdata->pwm_refclk_freq, (u64)NSEC_PER_SEC * pre_div) - 1; in ti_sn_pwm_apply()
1496 * ------- = --------------------- in ti_sn_pwm_apply()
1503 backlight = div64_u64(state->duty_cycle * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1508 ret = regmap_write(pdata->regmap, SN_PWM_PRE_DIV_REG, pre_div); in ti_sn_pwm_apply()
1510 dev_err(pdata->dev, "failed to update PWM_PRE_DIV\n"); in ti_sn_pwm_apply()
1518 pwm_en_inv = FIELD_PREP(SN_PWM_EN_MASK, state->enabled) | in ti_sn_pwm_apply()
1519 FIELD_PREP(SN_PWM_INV_MASK, state->polarity == PWM_POLARITY_INVERSED); in ti_sn_pwm_apply()
1520 ret = regmap_write(pdata->regmap, SN_PWM_EN_INV_REG, pwm_en_inv); in ti_sn_pwm_apply()
1522 dev_err(pdata->dev, "failed to update PWM_EN/PWM_INV\n"); in ti_sn_pwm_apply()
1526 pdata->pwm_enabled = state->enabled; in ti_sn_pwm_apply()
1529 if (!pdata->pwm_enabled) in ti_sn_pwm_apply()
1530 pm_runtime_put_sync(pdata->dev); in ti_sn_pwm_apply()
1545 ret = regmap_read(pdata->regmap, SN_PWM_EN_INV_REG, &pwm_en_inv); in ti_sn_pwm_get_state()
1557 ret = regmap_read(pdata->regmap, SN_PWM_PRE_DIV_REG, &pre_div); in ti_sn_pwm_get_state()
1561 state->enabled = FIELD_GET(SN_PWM_EN_MASK, pwm_en_inv); in ti_sn_pwm_get_state()
1563 state->polarity = PWM_POLARITY_INVERSED; in ti_sn_pwm_get_state()
1565 state->polarity = PWM_POLARITY_NORMAL; in ti_sn_pwm_get_state()
1567 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * (scale + 1), in ti_sn_pwm_get_state()
1568 pdata->pwm_refclk_freq); in ti_sn_pwm_get_state()
1569 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * backlight, in ti_sn_pwm_get_state()
1570 pdata->pwm_refclk_freq); in ti_sn_pwm_get_state()
1572 if (state->duty_cycle > state->period) in ti_sn_pwm_get_state()
1573 state->duty_cycle = state->period; in ti_sn_pwm_get_state()
1589 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_pwm_probe()
1591 pdata->pchip.dev = pdata->dev; in ti_sn_pwm_probe()
1592 pdata->pchip.ops = &ti_sn_pwm_ops; in ti_sn_pwm_probe()
1593 pdata->pchip.npwm = 1; in ti_sn_pwm_probe()
1594 pdata->pchip.of_xlate = of_pwm_single_xlate; in ti_sn_pwm_probe()
1595 pdata->pchip.of_pwm_n_cells = 1; in ti_sn_pwm_probe()
1597 return pwmchip_add(&pdata->pchip); in ti_sn_pwm_probe()
1602 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_pwm_remove()
1604 pwmchip_remove(&pdata->pchip); in ti_sn_pwm_remove()
1606 if (pdata->pwm_enabled) in ti_sn_pwm_remove()
1607 pm_runtime_put_sync(pdata->dev); in ti_sn_pwm_remove()
1640 /* -----------------------------------------------------------------------------
1649 if (WARN_ON(gpiospec->args_count < chip->of_gpio_n_cells)) in tn_sn_bridge_of_xlate()
1650 return -EINVAL; in tn_sn_bridge_of_xlate()
1652 if (gpiospec->args[0] > chip->ngpio || gpiospec->args[0] < 1) in tn_sn_bridge_of_xlate()
1653 return -EINVAL; in tn_sn_bridge_of_xlate()
1656 *flags = gpiospec->args[1]; in tn_sn_bridge_of_xlate()
1658 return gpiospec->args[0] - SN_GPIO_PHYSICAL_OFFSET; in tn_sn_bridge_of_xlate()
1672 return test_bit(offset, pdata->gchip_output) ? in ti_sn_bridge_gpio_get_direction()
1684 * powered--we just power it on to read the pin. NOTE: part of in ti_sn_bridge_gpio_get()
1690 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_get()
1691 ret = regmap_read(pdata->regmap, SN_GPIO_IO_REG, &val); in ti_sn_bridge_gpio_get()
1692 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_get()
1706 if (!test_bit(offset, pdata->gchip_output)) { in ti_sn_bridge_gpio_set()
1707 dev_err(pdata->dev, "Ignoring GPIO set while input\n"); in ti_sn_bridge_gpio_set()
1712 ret = regmap_update_bits(pdata->regmap, SN_GPIO_IO_REG, in ti_sn_bridge_gpio_set()
1716 dev_warn(pdata->dev, in ti_sn_bridge_gpio_set()
1727 if (!test_and_clear_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_input()
1730 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_input()
1734 set_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_input()
1743 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_input()
1755 if (test_and_set_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_output()
1758 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1764 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_output()
1768 clear_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_output()
1769 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1803 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_gpio_probe()
1807 if (!of_property_read_bool(pdata->dev->of_node, "gpio-controller")) in ti_sn_gpio_probe()
1810 pdata->gchip.label = dev_name(pdata->dev); in ti_sn_gpio_probe()
1811 pdata->gchip.parent = pdata->dev; in ti_sn_gpio_probe()
1812 pdata->gchip.owner = THIS_MODULE; in ti_sn_gpio_probe()
1813 pdata->gchip.of_xlate = tn_sn_bridge_of_xlate; in ti_sn_gpio_probe()
1814 pdata->gchip.of_gpio_n_cells = 2; in ti_sn_gpio_probe()
1815 pdata->gchip.request = ti_sn_bridge_gpio_request; in ti_sn_gpio_probe()
1816 pdata->gchip.free = ti_sn_bridge_gpio_free; in ti_sn_gpio_probe()
1817 pdata->gchip.get_direction = ti_sn_bridge_gpio_get_direction; in ti_sn_gpio_probe()
1818 pdata->gchip.direction_input = ti_sn_bridge_gpio_direction_input; in ti_sn_gpio_probe()
1819 pdata->gchip.direction_output = ti_sn_bridge_gpio_direction_output; in ti_sn_gpio_probe()
1820 pdata->gchip.get = ti_sn_bridge_gpio_get; in ti_sn_gpio_probe()
1821 pdata->gchip.set = ti_sn_bridge_gpio_set; in ti_sn_gpio_probe()
1822 pdata->gchip.can_sleep = true; in ti_sn_gpio_probe()
1823 pdata->gchip.names = ti_sn_bridge_gpio_names; in ti_sn_gpio_probe()
1824 pdata->gchip.ngpio = SN_NUM_GPIOS; in ti_sn_gpio_probe()
1825 pdata->gchip.base = -1; in ti_sn_gpio_probe()
1826 ret = devm_gpiochip_add_data(&adev->dev, &pdata->gchip, pdata); in ti_sn_gpio_probe()
1828 dev_err(pdata->dev, "can't add gpio chip\n"); in ti_sn_gpio_probe()
1863 /* -----------------------------------------------------------------------------
1881 pdata->supplies[i].supply = ti_sn_bridge_supply_names[i]; in ti_sn65dsi86_parse_regulators()
1883 return devm_regulator_bulk_get(pdata->dev, SN_REGULATOR_SUPPLY_NUM, in ti_sn65dsi86_parse_regulators()
1884 pdata->supplies); in ti_sn65dsi86_parse_regulators()
1889 struct device *dev = &client->dev; in ti_sn65dsi86_probe()
1893 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { in ti_sn65dsi86_probe()
1895 return -ENODEV; in ti_sn65dsi86_probe()
1900 return -ENOMEM; in ti_sn65dsi86_probe()
1902 pdata->dev = dev; in ti_sn65dsi86_probe()
1904 mutex_init(&pdata->comms_mutex); in ti_sn65dsi86_probe()
1906 pdata->regmap = devm_regmap_init_i2c(client, in ti_sn65dsi86_probe()
1908 if (IS_ERR(pdata->regmap)) in ti_sn65dsi86_probe()
1909 return dev_err_probe(dev, PTR_ERR(pdata->regmap), in ti_sn65dsi86_probe()
1912 pdata->enable_gpio = devm_gpiod_get_optional(dev, "enable", in ti_sn65dsi86_probe()
1914 if (IS_ERR(pdata->enable_gpio)) in ti_sn65dsi86_probe()
1915 return dev_err_probe(dev, PTR_ERR(pdata->enable_gpio), in ti_sn65dsi86_probe()
1922 pdata->refclk = devm_clk_get_optional(dev, "refclk"); in ti_sn65dsi86_probe()
1923 if (IS_ERR(pdata->refclk)) in ti_sn65dsi86_probe()
1924 return dev_err_probe(dev, PTR_ERR(pdata->refclk), in ti_sn65dsi86_probe()
1928 pm_runtime_set_autosuspend_delay(pdata->dev, 500); in ti_sn65dsi86_probe()
1929 pm_runtime_use_autosuspend(pdata->dev); in ti_sn65dsi86_probe()
1937 * Break ourselves up into a collection of aux devices. The only real in ti_sn65dsi86_probe()
1938 * motiviation here is to solve the chicken-and-egg problem of probe in ti_sn65dsi86_probe()
1942 * bus or the pwm_chip. Having sub-devices allows the some sub devices in ti_sn65dsi86_probe()
1943 * to finish probing even if others return -EPROBE_DEFER and gets us in ti_sn65dsi86_probe()
1948 ret = ti_sn65dsi86_add_aux_device(pdata, &pdata->gpio_aux, "gpio"); in ti_sn65dsi86_probe()
1954 ret = ti_sn65dsi86_add_aux_device(pdata, &pdata->pwm_aux, "pwm"); in ti_sn65dsi86_probe()
1960 * NOTE: At the end of the AUX channel probe we'll add the aux device in ti_sn65dsi86_probe()
1962 * AUX channel is there and this is a very simple solution to the in ti_sn65dsi86_probe()
1965 return ti_sn65dsi86_add_aux_device(pdata, &pdata->aux_aux, "aux"); in ti_sn65dsi86_probe()