155 	u32 prd;	/* PLL input divider */  member
310 	u32 prd, target_pll, i, max_pll, min_pll;  in tc358768_calc_pll()  local
335 	for (prd = 0; prd < 16; ++prd) {  in tc358768_calc_pll()
336 		u32 divisor = (prd + 1) * (1 << frs);  in tc358768_calc_pll()
347 			pll_in = (u32)div_u64((u64)refclk, prd + 1);  in tc358768_calc_pll()
356 				best_prd = prd;  in tc358768_calc_pll()
375 	priv->prd = best_prd;  in tc358768_calc_pll()
588 	u32 fbd, prd, frs;  in tc358768_setup_pll()  local
598 	prd = priv->prd;  in tc358768_setup_pll()
602 		clk_get_rate(priv->refclk), fbd, prd, frs);  in tc358768_setup_pll()
610 	tc358768_write(priv, TC358768_PLLCTL0, (prd << 12) | fbd);  in tc358768_setup_pll()