1808 static void ddr3_init_2500(struct ast_device *ast, const u32 *ddr_table)  in ddr3_init_2500()  argument
1812 	ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]);  in ddr3_init_2500()
1813 	ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]);  in ddr3_init_2500()
1814 	ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]);  in ddr3_init_2500()
1815 	ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]);	     /* MODEREG4/6 */  in ddr3_init_2500()
1816 	ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]);	     /* MODEREG5 */  in ddr3_init_2500()
1817 	ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */  in ddr3_init_2500()
1818 	ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]);	     /* MODEREG1/3 */  in ddr3_init_2500()
1825 	ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]);  in ddr3_init_2500()
1826 	ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]);  in ddr3_init_2500()
1827 	ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]);  in ddr3_init_2500()
1828 	ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]);  in ddr3_init_2500()
1829 	ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]);  in ddr3_init_2500()
1830 	ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]);  in ddr3_init_2500()
1831 	ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]);  in ddr3_init_2500()
1832 	ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]);  in ddr3_init_2500()
1842 	ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]);  in ddr3_init_2500()
1846 	check_dram_size_2500(ast, ddr_table[REGIDX_RFC]);  in ddr3_init_2500()
1852 static void ddr4_init_2500(struct ast_device *ast, const u32 *ddr_table)  in ddr4_init_2500()  argument
1860 	ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]);  in ddr4_init_2500()
1861 	ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]);  in ddr4_init_2500()
1862 	ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]);  in ddr4_init_2500()
1863 	ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]);	     /* MODEREG4/6 */  in ddr4_init_2500()
1864 	ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]);	     /* MODEREG5 */  in ddr4_init_2500()
1865 	ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */  in ddr4_init_2500()
1866 	ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]);	     /* MODEREG1/3 */  in ddr4_init_2500()
1873 	ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]);  in ddr4_init_2500()
1874 	ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]);  in ddr4_init_2500()
1875 	ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]);  in ddr4_init_2500()
1876 	ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]);  in ddr4_init_2500()
1877 	ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]);  in ddr4_init_2500()
1878 	ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]);  in ddr4_init_2500()
1879 	ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]);  in ddr4_init_2500()
1880 	ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]);  in ddr4_init_2500()
1952 	ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]);  in ddr4_init_2500()
1956 	check_dram_size_2500(ast, ddr_table[REGIDX_RFC]);  in ddr4_init_2500()