Lines Matching +full:needs +full:- +full:hpd
2 * Copyright 2012-2023 Advanced Micro Devices, Inc.
99 // for example, 1080p -> 8K is 4.0, or 4000 raw value
107 // for example, 8K -> 1080p is 0.25, or 250 raw value
119 * DOC: color-management-caps
124 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
131 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
147 * struct dpp_color_caps - color pipeline capabilities for display pipe and
152 * just plain 256-entry lookup
161 * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
162 * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT
163 * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
183 * struct mpc_color_caps - color pipeline capabilities for multiple pipe and
192 * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
204 * struct dc_color_caps - color pipes capabilities for DPP and MPC hw blocks
345 * re-programming however do not affect bandwidth consumption or clock
354 * gamma need to be adjusted or pipe needs to be turned on (or disconnected) we do
458 * enum pipe_split_policy - Pipe split strategy supported by DCN
466 * pipe in order to bring the best trade-off between performance and
498 DCN_PWR_STATE_UNKNOWN = -1,
513 * struct dc_clocks - DC pipe clocks
581 unsigned long long start_tick = dc->debug.bw_val_profile.enable ? \
582 dm_get_timestamp(dc->ctx) : 0
585 if (dc->debug.bw_val_profile.enable) \
586 dc->debug.bw_val_profile.total_count++
589 if (dc->debug.bw_val_profile.enable) { \
591 voltage_level_tick = dm_get_timestamp(dc->ctx); \
592 dc->debug.bw_val_profile.skip_ ## status ## _count++; \
596 if (dc->debug.bw_val_profile.enable) \
597 voltage_level_tick = dm_get_timestamp(dc->ctx)
600 if (dc->debug.bw_val_profile.enable) \
601 watermark_tick = dm_get_timestamp(dc->ctx)
604 if (dc->debug.bw_val_profile.enable) { \
605 end_tick = dm_get_timestamp(dc->ctx); \
606 dc->debug.bw_val_profile.total_ticks += end_tick - start_tick; \
607 dc->debug.bw_val_profile.voltage_level_ticks += voltage_level_tick - start_tick; \
609 dc->debug.bw_val_profile.watermark_ticks += watermark_tick - voltage_level_tick; \
610 dc->debug.bw_val_profile.rq_dlg_ticks += end_tick - watermark_tick; \
661 * 15-2: reserved
662 * 31-16: timeout in ms
735 * struct dc_debug_options - DC debug struct
842 /* TODO - remove once tested */
1341 * struct dc_validation_set - Struct to store surface/stream associations for validation
1428 * return - minimum required timing bandwidth in kbps.
1437 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
1466 bool hpd_status; /* HPD status of link without physical HPD pin. */
1467 bool is_hpd_pending; /* Indicates a new received hpd */
1600 * recommended to call this function as the first link operation upon HPD event
1606 * @reason - Indicate which event triggers this detection. dc may customize
1608 * return false - if detection is not fully completed. This could happen when
1611 * link->connection_type == dc_connection_mst_branch when returning false).
1612 * return true - detection is completed, link has been fully updated with latest
1624 * @dc_link - link the remote sink will be added to.
1625 * @edid - byte array of EDID raw data.
1626 * @len - size of the edid in byte
1627 * @init_data -
1636 * @link - link the sink should be removed from
1637 * @sink - sink to be removed.
1643 /* Enable HPD interrupt handler for a given link */
1646 /* Disable HPD interrupt handler for a given link */
1651 * @type - dc_connection_single if connected, dc_connection_none otherwise.
1652 * return - false if an unexpected error occurs, true otherwise.
1662 /* query current hpd pin value
1663 * return - true HPD is asserted (HPD high), false otherwise (HPD low)
1671 /* enable/disable hardware HPD filter.
1673 * @link - The link the HPD pin is associated with.
1674 * @enable = true - enable hardware HPD filter. HPD event will only queued to irq
1675 * handler once after no HPD change has been detected within dc default HPD
1676 * filtering interval since last HPD event. i.e if display keeps toggling hpd
1677 * pulses within default HPD interval, no HPD event will be received until HPD
1678 * toggles have stopped. Then HPD event will be queued to irq handler once after
1679 * dc default HPD filtering interval since last HPD event.
1681 * @enable = false - disable hardware HPD filter. HPD event will be queued
1682 * immediately to irq handler after no HPD change has been detected within
1683 * IRQ_HPD (aka HPD short pulse) interval (i.e 2ms).
1688 * @link_index - index to a link with ddc in i2c mode
1689 * @cmd - i2c command structure
1690 * return - true if success, false otherwise.
1698 * @link_index - index to a link with ddc in i2c mode
1699 * @cmd - i2c command structure
1700 * return - true if success, false otherwise.
1708 * retries or handle error states. The reply is returned in the payload->reply
1710 * transferred,or -1 on a failure.
1727 * TODO - When defer_handling is true the function will have a different purpose.
1728 * It no longer does complete hpd rx irq handling. We should create a separate
1732 * true - Downstream port status changed. DM should call DC to do the
1734 * false - no change in Downstream port status. No further action required
1748 /* Determine if hpd rx irq should be handled or ignored
1749 * return true - hpd rx irq should be handled.
1750 * return false - it is safe to ignore hpd rx irq event
1755 * @link - link the hpd irq data associated with
1756 * @hpd_irq_dpcd_data - input hpd irq data
1757 * return - true if hpd irq data indicates a link lost
1762 /* Read hpd rx irq data from a given link
1763 * @link - link where the hpd irq data should be read from
1764 * @irq_data - output hpd irq data
1765 * return - DC_OK if hpd irq data is read successfully, otherwise hpd irq data
1775 * TODO - in the future we should consider to expand link resume interface to
1790 * return - total effective link bandwidth in kbps.
1800 * DM needs to capture a snapshot of current link resource allocation mapping
1816 * DM needs to call this function after initial link detection on boot and
1830 * interface i.e stream_update->dsc_config
1838 * @link - current detected link
1839 * @req_bw - requested bandwidth in kbps
1840 * @link_settings - returned most optimal link settings that can fit the
1842 * return - false if link can't support requested bandwidth, true if link
1856 * format will be used. The decision will remain unchanged until next HPD event.
1858 * @link - a link with DP RX connection
1859 * return - if stream is committed to this link with MST signal type, type of
1868 * @link - a link with DP RX connection
1869 * return - max dp link settings the link can enable.
1877 * @link - a link with DP RX connection
1878 * return - highest encoding format link supports.
1884 * @link - a link with dp connector signal type
1885 * return - true if connected, false otherwise
1889 /* Force DP lane settings update to main-link video signal and notify the change
1894 * @lt_settings - a container structure with desired hw_lane_settings
1901 * test or debugging purpose. The test pattern will remain until next un-plug.
1903 * @link - active link with DP signal output enabled.
1904 * @test_pattern - desired test pattern to output.
1906 * @test_pattern_color_space - for video test pattern choose a desired color
1908 * @p_link_settings - For PHY pattern choose a desired link settings
1909 * @p_custom_pattern - some test pattern will require a custom input to
1911 * @cust_pattern_size - size of the custom pattern input.
1936 * @link_settings - if not NULL, force preferred link settings to the link.
1937 * @lt_override - a set of override pointers. If any pointer is none NULL, dc
1949 /* return - true if FEC is supported with connected DP RX, false otherwise */
1954 * return - true if FEC should be enabled, false otherwise.
1965 * NOTE: this interface doesn't update dp main-link. Calling this function will
1966 * cause DP TX main-link and DP RX power states out of sync. DM has to restore
1969 * @on - true to set DP RX in D0 power state, false to set DP RX in D3 power
1974 /* Force link to read base dp receiver caps from dpcd 000h - 00Fh and overwrite
1975 * current value read from extended receiver cap from 02200h - 0220Fh.
1993 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
2025 * return - true if trace is initialized and has valid data. False dp trace
2046 * @in_detection - true to get link training end time stamp of last link
2054 * @in_detection - true to get link training count of last link
2068 * Send a request from DP-Tx requesting to allocate BW remotely after
2095 * Unplug => de-allocate bw
2118 /* Sink Interfaces - A sink corresponds to a display output device */
2123 // 8 byte port ID -> ELD.PortID
2125 // 128bit GUID in binary formufacturer name -> ELD.ManufacturerName
2127 // 2 byte product code -> ELD.ProductCode