443 		return sysfs_show_str_val(buffer, offs, dev->node_props.name);  in node_show()
451 			      dev->node_props.cpu_cores_count);  in node_show()
453 			      dev->gpu ? dev->node_props.simd_count : 0);  in node_show()
455 			      dev->node_props.mem_banks_count);  in node_show()
457 			      dev->node_props.caches_count);  in node_show()
459 			      dev->node_props.io_links_count);  in node_show()
461 			      dev->node_props.p2p_links_count);  in node_show()
463 			      dev->node_props.cpu_core_id_base);  in node_show()
465 			      dev->node_props.simd_id_base);  in node_show()
467 			      dev->node_props.max_waves_per_simd);  in node_show()
469 			      dev->node_props.lds_size_in_kb);  in node_show()
471 			      dev->node_props.gds_size_in_kb);  in node_show()
473 			      dev->node_props.num_gws);  in node_show()
475 			      dev->node_props.wave_front_size);  in node_show()
477 			      dev->gpu ? (dev->node_props.array_count *  in node_show()
480 			      dev->node_props.simd_arrays_per_engine);  in node_show()
482 			      dev->node_props.cu_per_simd_array);  in node_show()
484 			      dev->node_props.simd_per_cu);  in node_show()
486 			      dev->node_props.max_slots_scratch_cu);  in node_show()
488 			      dev->node_props.gfx_target_version);  in node_show()
490 			      dev->node_props.vendor_id);  in node_show()
492 			      dev->node_props.device_id);  in node_show()
494 			      dev->node_props.location_id);  in node_show()
496 			      dev->node_props.domain);  in node_show()
498 			      dev->node_props.drm_render_minor);  in node_show()
500 			      dev->node_props.hive_id);  in node_show()
502 			      dev->node_props.num_sdma_engines);  in node_show()
504 			      dev->node_props.num_sdma_xgmi_engines);  in node_show()
506 			      dev->node_props.num_sdma_queues_per_engine);  in node_show()
508 			      dev->node_props.num_cp_queues);  in node_show()
515 			dev->node_props.capability |=  in node_show()
518 			dev->node_props.capability |=  in node_show()
525 			dev->node_props.capability |=  in node_show()
529 			dev->node_props.max_engine_clk_fcompute);  in node_show()
536 				      dev->node_props.capability);  in node_show()
538 				      dev->node_props.debug_prop);  in node_show()
935 		if (dev->node_props.cpu_cores_count &&  in kfd_debug_print_topology()
936 				dev->node_props.simd_count) {  in kfd_debug_print_topology()
938 				dev->node_props.device_id,  in kfd_debug_print_topology()
939 				dev->node_props.vendor_id);  in kfd_debug_print_topology()
940 		} else if (dev->node_props.cpu_cores_count)  in kfd_debug_print_topology()
942 		else if (dev->node_props.simd_count)  in kfd_debug_print_topology()
944 				dev->node_props.device_id,  in kfd_debug_print_topology()
945 				dev->node_props.vendor_id);  in kfd_debug_print_topology()
1138 		if (dev->node_props.cpu_cores_count)  in kfd_assign_gpu()
1141 		if (!dev->gpu && (dev->node_props.simd_count > 0)) {  in kfd_assign_gpu()
1266 			if (!dev->node_props.hive_id)  in kfd_fill_iolink_non_crat_info()
1267 				dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev);  in kfd_fill_iolink_non_crat_info()
1268 			peer_dev->node_props.hive_id = dev->node_props.hive_id;  in kfd_fill_iolink_non_crat_info()
1314 			dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1);  in kfd_build_p2p_node_entry()
1385 		kdev->node_props.p2p_links_count++;  in kfd_create_indirect_link_prop()
1402 			cpu_dev->node_props.p2p_links_count++;  in kfd_create_indirect_link_prop()
1470 	peer->node_props.p2p_links_count++;  in kfd_add_peer_prop()
1689 	gpu_processor_id = dev->node_props.simd_id_base;  in kfd_fill_cache_non_crat_info()
1753 	dev->node_props.caches_count += num_of_entries;  in kfd_fill_cache_non_crat_info()
1876 		dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED;  in kfd_topology_set_dbg_firmware_support()
1881 	dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<  in kfd_topology_set_capabilities()
1885 	dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_SUPPORT |  in kfd_topology_set_capabilities()
1890 		dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID;  in kfd_topology_set_capabilities()
1894 			dev->node_props.debug_prop |=  in kfd_topology_set_capabilities()
1898 			dev->node_props.debug_prop |=  in kfd_topology_set_capabilities()
1903 			dev->node_props.capability |=  in kfd_topology_set_capabilities()
1906 		dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 |  in kfd_topology_set_capabilities()
1910 			dev->node_props.capability |=  in kfd_topology_set_capabilities()
1966 		dev->node_props.name[i] = __tolower(asic_name[i]);  in kfd_topology_add_device()
1970 	dev->node_props.name[i] = '\0';  in kfd_topology_add_device()
1972 	dev->node_props.simd_arrays_per_engine =  in kfd_topology_add_device()
1975 	dev->node_props.gfx_target_version =  in kfd_topology_add_device()
1977 	dev->node_props.vendor_id = gpu->adev->pdev->vendor;  in kfd_topology_add_device()
1978 	dev->node_props.device_id = gpu->adev->pdev->device;  in kfd_topology_add_device()
1979 	dev->node_props.capability |=  in kfd_topology_add_device()
1983 	dev->node_props.location_id = pci_dev_id(gpu->adev->pdev);  in kfd_topology_add_device()
1985 		dev->node_props.location_id |= dev->gpu->node_id;  in kfd_topology_add_device()
1987 	dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus);  in kfd_topology_add_device()
1988 	dev->node_props.max_engine_clk_fcompute =  in kfd_topology_add_device()
1990 	dev->node_props.max_engine_clk_ccompute =  in kfd_topology_add_device()
1994 		dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index;  in kfd_topology_add_device()
1996 		dev->node_props.drm_render_minor =  in kfd_topology_add_device()
1999 	dev->node_props.hive_id = gpu->kfd->hive_id;  in kfd_topology_add_device()
2000 	dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu);  in kfd_topology_add_device()
2001 	dev->node_props.num_sdma_xgmi_engines =  in kfd_topology_add_device()
2003 	dev->node_props.num_sdma_queues_per_engine =  in kfd_topology_add_device()
2006 	dev->node_props.num_gws = (dev->gpu->gws &&  in kfd_topology_add_device()
2009 	dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm);  in kfd_topology_add_device()
2018 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 <<  in kfd_topology_add_device()
2029 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 <<  in kfd_topology_add_device()
2045 	dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;  in kfd_topology_add_device()
2053 		dev->node_props.simd_count =  in kfd_topology_add_device()
2055 		dev->node_props.max_waves_per_simd = 10;  in kfd_topology_add_device()
2059 	dev->node_props.capability |=  in kfd_topology_add_device()
2062 	dev->node_props.capability |=  in kfd_topology_add_device()
2067 		dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ?  in kfd_topology_add_device()
2071 		dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED;  in kfd_topology_add_device()
2075 		dev->node_props.capability |= HSA_CAP_FLAGS_COHERENTHOSTACCESS;  in kfd_topology_add_device()
2119 				dev->node_props.io_links_count--;  in kfd_topology_update_io_links()
2135 				dev->node_props.p2p_links_count--;  in kfd_topology_update_io_links()