34 static bool sienna_cichlid_is_mode2_default(struct amdgpu_reset_control *reset_ctl)  in sienna_cichlid_is_mode2_default()  argument
37 	struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle;  in sienna_cichlid_is_mode2_default()
47 sienna_cichlid_get_reset_handler(struct amdgpu_reset_control *reset_ctl,  in sienna_cichlid_get_reset_handler()  argument
53 		list_for_each_entry(handler, &reset_ctl->reset_handlers,  in sienna_cichlid_get_reset_handler()
60 	if (sienna_cichlid_is_mode2_default(reset_ctl)) {  in sienna_cichlid_get_reset_handler()
61 		list_for_each_entry (handler, &reset_ctl->reset_handlers,  in sienna_cichlid_get_reset_handler()
100 sienna_cichlid_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl,  in sienna_cichlid_mode2_prepare_hwcontext()  argument
104 	struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle;  in sienna_cichlid_mode2_prepare_hwcontext()
120 	struct amdgpu_reset_control *reset_ctl =  in sienna_cichlid_async_reset()  local
122 	struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle;  in sienna_cichlid_async_reset()
124 	list_for_each_entry(handler, &reset_ctl->reset_handlers,  in sienna_cichlid_async_reset()
126 		if (handler->reset_method == reset_ctl->active_reset) {  in sienna_cichlid_async_reset()
142 sienna_cichlid_mode2_perform_reset(struct amdgpu_reset_control *reset_ctl,  in sienna_cichlid_mode2_perform_reset()  argument
145 	struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle;  in sienna_cichlid_mode2_perform_reset()
236 sienna_cichlid_mode2_restore_hwcontext(struct amdgpu_reset_control *reset_ctl,  in sienna_cichlid_mode2_restore_hwcontext()  argument
240 	struct amdgpu_device *tmp_adev = (struct amdgpu_device *)reset_ctl->handle;  in sienna_cichlid_mode2_restore_hwcontext()
286 	struct amdgpu_reset_control *reset_ctl;  in sienna_cichlid_reset_init()  local
288 	reset_ctl = kzalloc(sizeof(*reset_ctl), GFP_KERNEL);  in sienna_cichlid_reset_init()
289 	if (!reset_ctl)  in sienna_cichlid_reset_init()
292 	reset_ctl->handle = adev;  in sienna_cichlid_reset_init()
293 	reset_ctl->async_reset = sienna_cichlid_async_reset;  in sienna_cichlid_reset_init()
294 	reset_ctl->active_reset = AMD_RESET_METHOD_NONE;  in sienna_cichlid_reset_init()
295 	reset_ctl->get_reset_handler = sienna_cichlid_get_reset_handler;  in sienna_cichlid_reset_init()
297 	INIT_LIST_HEAD(&reset_ctl->reset_handlers);  in sienna_cichlid_reset_init()
298 	INIT_WORK(&reset_ctl->reset_work, reset_ctl->async_reset);  in sienna_cichlid_reset_init()
300 	amdgpu_reset_add_handler(reset_ctl, &sienna_cichlid_mode2_handler);  in sienna_cichlid_reset_init()
302 	adev->reset_cntl = reset_ctl;  in sienna_cichlid_reset_init()