68 static u32 sdma_v5_2_get_reg_offset(struct amdgpu_device *adev, u32 instance, u32 internal_offset)  in sdma_v5_2_get_reg_offset()
148 	struct amdgpu_device *adev = ring->adev;  in sdma_v5_2_ring_get_wptr()  local
174 	struct amdgpu_device *adev = ring->adev;  in sdma_v5_2_ring_set_wptr()  local
291 	struct amdgpu_device *adev = ring->adev;  in sdma_v5_2_ring_emit_hdp_flush()  local
362 static void sdma_v5_2_gfx_stop(struct amdgpu_device *adev)  in sdma_v5_2_gfx_stop()
386 static void sdma_v5_2_rlc_stop(struct amdgpu_device *adev)  in sdma_v5_2_rlc_stop()
399 static void sdma_v5_2_ctx_switch_enable(struct amdgpu_device *adev, bool enable)  in sdma_v5_2_ctx_switch_enable()
456 static void sdma_v5_2_enable(struct amdgpu_device *adev, bool enable)  in sdma_v5_2_enable()
483 static int sdma_v5_2_gfx_resume(struct amdgpu_device *adev)  in sdma_v5_2_gfx_resume()
644 static int sdma_v5_2_rlc_resume(struct amdgpu_device *adev)  in sdma_v5_2_rlc_resume()
657 static int sdma_v5_2_load_microcode(struct amdgpu_device *adev)  in sdma_v5_2_load_microcode()
695 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_soft_reset()  local
732 static int sdma_v5_2_start(struct amdgpu_device *adev)  in sdma_v5_2_start()
770 static int sdma_v5_2_mqd_init(struct amdgpu_device *adev, void *mqd,  in sdma_v5_2_mqd_init()
807 static void sdma_v5_2_set_mqd_funcs(struct amdgpu_device *adev)  in sdma_v5_2_set_mqd_funcs()
824 	struct amdgpu_device *adev = ring->adev;  in sdma_v5_2_ring_test_ring()  local
900 	struct amdgpu_device *adev = ring->adev;  in sdma_v5_2_ring_test_ib()  local
1174 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_early_init()  local
1223 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_sw_init()  local
1266 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_sw_fini()  local
1279 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_hw_init()  local
1286 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_hw_fini()  local
1302 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_suspend()  local
1309 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_resume()  local
1316 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_is_idle()  local
1333 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_wait_for_idle()  local
1351 	struct amdgpu_device *adev = ring->adev;  in sdma_v5_2_ring_preempt_ib()  local
1393 static int sdma_v5_2_set_trap_irq_state(struct amdgpu_device *adev,  in sdma_v5_2_set_trap_irq_state()
1411 static int sdma_v5_2_process_trap_irq(struct amdgpu_device *adev,  in sdma_v5_2_process_trap_irq()
1503 static int sdma_v5_2_process_illegal_inst_irq(struct amdgpu_device *adev,  in sdma_v5_2_process_illegal_inst_irq()
1510 static bool sdma_v5_2_firmware_mgcg_support(struct amdgpu_device *adev,  in sdma_v5_2_firmware_mgcg_support()
1534 static void sdma_v5_2_update_medium_grain_clock_gating(struct amdgpu_device *adev,  in sdma_v5_2_update_medium_grain_clock_gating()
1571 static void sdma_v5_2_update_medium_grain_light_sleep(struct amdgpu_device *adev,  in sdma_v5_2_update_medium_grain_light_sleep()
1603 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_set_clockgating_state()  local
1637 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in sdma_v5_2_get_clockgating_state()  local
1709 static void sdma_v5_2_set_ring_funcs(struct amdgpu_device *adev)  in sdma_v5_2_set_ring_funcs()
1728 static void sdma_v5_2_set_irq_funcs(struct amdgpu_device *adev)  in sdma_v5_2_set_irq_funcs()
1798 static void sdma_v5_2_set_buffer_funcs(struct amdgpu_device *adev)  in sdma_v5_2_set_buffer_funcs()
1813 static void sdma_v5_2_set_vm_pte_funcs(struct amdgpu_device *adev)  in sdma_v5_2_set_vm_pte_funcs()