Lines Matching refs:def
237 uint32_t def, data; in nbio_v7_2_update_medium_grain_clock_gating() local
239 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regCPM_CONTROL)); in nbio_v7_2_update_medium_grain_clock_gating()
256 if (def != data) in nbio_v7_2_update_medium_grain_clock_gating()
263 uint32_t def, data; in nbio_v7_2_update_medium_grain_light_sleep() local
269 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CNTL2)); in nbio_v7_2_update_medium_grain_light_sleep()
275 if (def != data) in nbio_v7_2_update_medium_grain_light_sleep()
278 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, in nbio_v7_2_update_medium_grain_light_sleep()
287 if (def != data) in nbio_v7_2_update_medium_grain_light_sleep()
292 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CNTL2)); in nbio_v7_2_update_medium_grain_light_sleep()
302 if (def != data) in nbio_v7_2_update_medium_grain_light_sleep()
371 uint32_t def, data; in nbio_v7_2_init_registers() local
376 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regBIF1_PCIE_MST_CTRL_3)); in nbio_v7_2_init_registers()
382 if (def != data) in nbio_v7_2_init_registers()
386 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CONFIG_CNTL)); in nbio_v7_2_init_registers()
392 if (def != data) in nbio_v7_2_init_registers()