51 	adev->jpeg.num_jpeg_inst = 1;  in jpeg_v2_0_early_init()
52 	adev->jpeg.num_jpeg_rings = 1;  in jpeg_v2_0_early_init()
75 		VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq);  in jpeg_v2_0_sw_init()
87 	ring = adev->jpeg.inst->ring_dec;  in jpeg_v2_0_sw_init()
92 	r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq,  in jpeg_v2_0_sw_init()
97 	adev->jpeg.internal.jpeg_pitch[0] = mmUVD_JPEG_PITCH_INTERNAL_OFFSET;  in jpeg_v2_0_sw_init()
98 	adev->jpeg.inst->external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH);  in jpeg_v2_0_sw_init()
133 	struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;  in jpeg_v2_0_hw_init()
159 	if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&  in jpeg_v2_0_hw_fini()
316 	struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;  in jpeg_v2_0_start()
703 	if (state == adev->jpeg.cur_state)  in jpeg_v2_0_set_powergating_state()
712 		adev->jpeg.cur_state = state;  in jpeg_v2_0_set_powergating_state()
733 		amdgpu_fence_process(adev->jpeg.inst->ring_dec);  in jpeg_v2_0_process_interrupt()
795 	adev->jpeg.inst->ring_dec->funcs = &jpeg_v2_0_dec_ring_vm_funcs;  in jpeg_v2_0_set_dec_ring_funcs()
806 	adev->jpeg.inst->irq.num_types = 1;  in jpeg_v2_0_set_irq_funcs()
807 	adev->jpeg.inst->irq.funcs = &jpeg_v2_0_irq_funcs;  in jpeg_v2_0_set_irq_funcs()