Lines Matching refs:GC
39 return (u64)RREG32_SOC15(GC, GET_INST(GC, 0), regMC_VM_FB_OFFSET) << 24; in gfxhub_v1_2_get_mc_fb_offset()
52 WREG32_SOC15_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_setup_vm_pt_regs()
57 WREG32_SOC15_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_setup_vm_pt_regs()
92 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
95 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
99 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
102 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
106 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
109 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
113 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
116 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
133 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_AGP_BASE, 0); in gfxhub_v1_2_xcc_init_system_aperture_regs()
134 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v1_2_xcc_init_system_aperture_regs()
135 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v1_2_xcc_init_system_aperture_regs()
139 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v1_2_xcc_init_system_aperture_regs()
150 WREG32_SOC15_RLC(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_system_aperture_regs()
155 WREG32_SOC15_RLC(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_system_aperture_regs()
161 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v1_2_xcc_init_system_aperture_regs()
163 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in gfxhub_v1_2_xcc_init_system_aperture_regs()
167 WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, in gfxhub_v1_2_xcc_init_system_aperture_regs()
169 WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, in gfxhub_v1_2_xcc_init_system_aperture_regs()
172 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL2); in gfxhub_v1_2_xcc_init_system_aperture_regs()
175 WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL2, tmp); in gfxhub_v1_2_xcc_init_system_aperture_regs()
182 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_TOP, 0); in gfxhub_v1_2_xcc_init_system_aperture_regs()
183 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_BASE, 0x00FFFFFF); in gfxhub_v1_2_xcc_init_system_aperture_regs()
184 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_AGP_TOP, 0); in gfxhub_v1_2_xcc_init_system_aperture_regs()
185 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_AGP_BOT, 0xFFFFFF); in gfxhub_v1_2_xcc_init_system_aperture_regs()
186 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF); in gfxhub_v1_2_xcc_init_system_aperture_regs()
187 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0); in gfxhub_v1_2_xcc_init_system_aperture_regs()
200 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_MX_L1_TLB_CNTL); in gfxhub_v1_2_xcc_init_tlb_regs()
214 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v1_2_xcc_init_tlb_regs()
226 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_CNTL); in gfxhub_v1_2_xcc_init_cache_regs()
235 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
237 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_CNTL2); in gfxhub_v1_2_xcc_init_cache_regs()
240 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL2, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
252 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL3, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
263 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL4, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
274 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL); in gfxhub_v1_2_xcc_enable_system_domain()
282 WREG32_SOC15(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL, tmp); in gfxhub_v1_2_xcc_enable_system_domain()
293 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
296 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
300 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
303 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
307 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
309 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
332 tmp = RREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT1_CNTL, i); in gfxhub_v1_2_xcc_setup_vmid_config()
364 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config()
366 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config()
369 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config()
372 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config()
376 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config()
394 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v1_2_xcc_program_invalidation()
396 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v1_2_xcc_program_invalidation()
440 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT0_CNTL, in gfxhub_v1_2_xcc_gart_disable()
444 tmp = RREG32_SOC15(GC, GET_INST(GC, j), regMC_VM_MX_L1_TLB_CNTL); in gfxhub_v1_2_xcc_gart_disable()
450 WREG32_SOC15_RLC(GC, GET_INST(GC, j), regMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v1_2_xcc_gart_disable()
453 tmp = RREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL); in gfxhub_v1_2_xcc_gart_disable()
455 WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL, tmp); in gfxhub_v1_2_xcc_gart_disable()
456 WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL3, 0); in gfxhub_v1_2_xcc_gart_disable()
476 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v1_2_xcc_set_fault_enable_default()
507 WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL, tmp); in gfxhub_v1_2_xcc_set_fault_enable_default()
535 SOC15_REG_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init()
538 SOC15_REG_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init()
541 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_INVALIDATE_ENG0_SEM); in gfxhub_v1_2_xcc_init()
543 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_INVALIDATE_ENG0_REQ); in gfxhub_v1_2_xcc_init()
545 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_INVALIDATE_ENG0_ACK); in gfxhub_v1_2_xcc_init()
547 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL); in gfxhub_v1_2_xcc_init()
549 SOC15_REG_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init()
552 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v1_2_xcc_init()
583 xgmi_lfb_cntl = RREG32_SOC15(GC, GET_INST(GC, 0), regMC_VM_XGMI_LFB_CNTL); in gfxhub_v1_2_get_xgmi_info()
585 RREG32_SOC15(GC, GET_INST(GC, 0), regMC_VM_XGMI_LFB_SIZE), in gfxhub_v1_2_get_xgmi_info()