771 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));  in gfx_v9_0_kiq_set_resources()
793 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));  in gfx_v9_0_kiq_map_queues()
823 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));  in gfx_v9_0_kiq_unmap_queues()
851 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));  in gfx_v9_0_kiq_query_status()
870 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));  in gfx_v9_0_kiq_invalidate_tlbs()
963 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v9_0_write_data_to_reg()
977 	amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in gfx_v9_0_wait_reg_mem()
1007 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in gfx_v9_0_ring_test_ring()
1047 	ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);  in gfx_v9_0_ring_test_ib()
1449 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v9_0_get_csb_buffer()
1452 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v9_0_get_csb_buffer()
1460 					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));  in gfx_v9_0_get_csb_buffer()
1471 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v9_0_get_csb_buffer()
1474 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));  in gfx_v9_0_get_csb_buffer()
3042 	amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v9_0_cp_gfx_start()
3045 	amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v9_0_cp_gfx_start()
3053 				       PACKET3(PACKET3_SET_CONTEXT_REG,  in gfx_v9_0_cp_gfx_start()
3063 	amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v9_0_cp_gfx_start()
3066 	amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));  in gfx_v9_0_cp_gfx_start()
3069 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));  in gfx_v9_0_cp_gfx_start()
3074 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG,1));  in gfx_v9_0_cp_gfx_start()
3928 	amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));  in gfx_v9_0_kiq_read_clock()
4306 	amdgpu_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5));  in gfx_v9_0_do_edc_gds_workarounds()
4404 		ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);  in gfx_v9_0_do_edc_gpr_workarounds()
4411 	ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);  in gfx_v9_0_do_edc_gpr_workarounds()
4418 	ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);  in gfx_v9_0_do_edc_gpr_workarounds()
4426 	ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);  in gfx_v9_0_do_edc_gpr_workarounds()
4432 		ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);  in gfx_v9_0_do_edc_gpr_workarounds()
4439 	ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);  in gfx_v9_0_do_edc_gpr_workarounds()
4446 	ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);  in gfx_v9_0_do_edc_gpr_workarounds()
4454 	ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);  in gfx_v9_0_do_edc_gpr_workarounds()
4460 		ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);  in gfx_v9_0_do_edc_gpr_workarounds()
4467 	ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);  in gfx_v9_0_do_edc_gpr_workarounds()
4474 	ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);  in gfx_v9_0_do_edc_gpr_workarounds()
4482 	ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);  in gfx_v9_0_do_edc_gpr_workarounds()
5136 		header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);  in gfx_v9_0_ring_emit_ib_gfx()
5138 		header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);  in gfx_v9_0_ring_emit_ib_gfx()
5263 		amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));  in gfx_v9_0_ring_emit_ib_compute()
5268 	amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));  in gfx_v9_0_ring_emit_ib_compute()
5289 	amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));  in gfx_v9_0_ring_emit_fence()
5339 		amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in gfx_v9_0_ring_emit_vm_flush()
5383 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v9_0_ring_emit_fence_kiq()
5392 		amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v9_0_ring_emit_fence_kiq()
5403 	amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in gfx_v9_ring_emit_sb()
5431 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));  in gfx_v9_0_ring_emit_ce_meta()
5544 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));  in gfx_v9_0_ring_emit_de_meta()
5566 	amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));  in gfx_v9_0_ring_emit_frame_cntl()
5598 	amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v9_ring_emit_cntxcntl()
5606 	amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));  in gfx_v9_0_ring_emit_init_cond_exec()
5633 	amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));  in gfx_v9_0_ring_emit_rreg()
5661 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v9_0_ring_emit_wreg()
6772 	amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5));  in gfx_v9_0_emit_mem_sync()
6861 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),
6914 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),
6971 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),
7009 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),