Lines Matching +full:gfx +full:- +full:mem
29 #include <linux/dma-fence-array.h>
32 #include <linux/dma-buf.h>
68 * Each GPUVM is represented by a 1-2 or 1-5 level page table, depending
89 #define START(node) ((node)->start)
90 #define LAST(node) ((node)->last)
99 * struct amdgpu_prt_cb - Helper to disable partial resident texture feature from a fence callback
115 * struct amdgpu_vm_tlb_seq_struct - Helper to increment the TLB flush sequence
130 * amdgpu_vm_set_pasid - manage pasid and vm ptr mapping
145 if (vm->pasid == pasid) in amdgpu_vm_set_pasid()
148 if (vm->pasid) { in amdgpu_vm_set_pasid()
149 r = xa_err(xa_erase_irq(&adev->vm_manager.pasids, vm->pasid)); in amdgpu_vm_set_pasid()
153 vm->pasid = 0; in amdgpu_vm_set_pasid()
157 r = xa_err(xa_store_irq(&adev->vm_manager.pasids, pasid, vm, in amdgpu_vm_set_pasid()
162 vm->pasid = pasid; in amdgpu_vm_set_pasid()
170 * amdgpu_vm_bo_evicted - vm_bo is evicted
179 struct amdgpu_vm *vm = vm_bo->vm; in amdgpu_vm_bo_evicted()
180 struct amdgpu_bo *bo = vm_bo->bo; in amdgpu_vm_bo_evicted()
182 vm_bo->moved = true; in amdgpu_vm_bo_evicted()
183 spin_lock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_evicted()
184 if (bo->tbo.type == ttm_bo_type_kernel) in amdgpu_vm_bo_evicted()
185 list_move(&vm_bo->vm_status, &vm->evicted); in amdgpu_vm_bo_evicted()
187 list_move_tail(&vm_bo->vm_status, &vm->evicted); in amdgpu_vm_bo_evicted()
188 spin_unlock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_evicted()
191 * amdgpu_vm_bo_moved - vm_bo is moved
200 spin_lock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_moved()
201 list_move(&vm_bo->vm_status, &vm_bo->vm->moved); in amdgpu_vm_bo_moved()
202 spin_unlock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_moved()
206 * amdgpu_vm_bo_idle - vm_bo is idle
215 spin_lock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_idle()
216 list_move(&vm_bo->vm_status, &vm_bo->vm->idle); in amdgpu_vm_bo_idle()
217 spin_unlock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_idle()
218 vm_bo->moved = false; in amdgpu_vm_bo_idle()
222 * amdgpu_vm_bo_invalidated - vm_bo is invalidated
231 spin_lock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_invalidated()
232 list_move(&vm_bo->vm_status, &vm_bo->vm->invalidated); in amdgpu_vm_bo_invalidated()
233 spin_unlock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_invalidated()
237 * amdgpu_vm_bo_relocated - vm_bo is reloacted
246 if (vm_bo->bo->parent) { in amdgpu_vm_bo_relocated()
247 spin_lock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_relocated()
248 list_move(&vm_bo->vm_status, &vm_bo->vm->relocated); in amdgpu_vm_bo_relocated()
249 spin_unlock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_relocated()
256 * amdgpu_vm_bo_done - vm_bo is done
265 spin_lock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_done()
266 list_move(&vm_bo->vm_status, &vm_bo->vm->done); in amdgpu_vm_bo_done()
267 spin_unlock(&vm_bo->vm->status_lock); in amdgpu_vm_bo_done()
271 * amdgpu_vm_bo_reset_state_machine - reset the vm_bo state machine
281 spin_lock(&vm->status_lock); in amdgpu_vm_bo_reset_state_machine()
282 list_splice_init(&vm->done, &vm->invalidated); in amdgpu_vm_bo_reset_state_machine()
283 list_for_each_entry(vm_bo, &vm->invalidated, vm_status) in amdgpu_vm_bo_reset_state_machine()
284 vm_bo->moved = true; in amdgpu_vm_bo_reset_state_machine()
285 list_for_each_entry_safe(vm_bo, tmp, &vm->idle, vm_status) { in amdgpu_vm_bo_reset_state_machine()
286 struct amdgpu_bo *bo = vm_bo->bo; in amdgpu_vm_bo_reset_state_machine()
288 if (!bo || bo->tbo.type != ttm_bo_type_kernel) in amdgpu_vm_bo_reset_state_machine()
289 list_move(&vm_bo->vm_status, &vm_bo->vm->moved); in amdgpu_vm_bo_reset_state_machine()
290 else if (bo->parent) in amdgpu_vm_bo_reset_state_machine()
291 list_move(&vm_bo->vm_status, &vm_bo->vm->relocated); in amdgpu_vm_bo_reset_state_machine()
293 spin_unlock(&vm->status_lock); in amdgpu_vm_bo_reset_state_machine()
297 * amdgpu_vm_bo_base_init - Adds bo to the list of bos associated with the vm
309 base->vm = vm; in amdgpu_vm_bo_base_init()
310 base->bo = bo; in amdgpu_vm_bo_base_init()
311 base->next = NULL; in amdgpu_vm_bo_base_init()
312 INIT_LIST_HEAD(&base->vm_status); in amdgpu_vm_bo_base_init()
316 base->next = bo->vm_bo; in amdgpu_vm_bo_base_init()
317 bo->vm_bo = base; in amdgpu_vm_bo_base_init()
319 if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv) in amdgpu_vm_bo_base_init()
322 dma_resv_assert_held(vm->root.bo->tbo.base.resv); in amdgpu_vm_bo_base_init()
324 ttm_bo_set_bulk_move(&bo->tbo, &vm->lru_bulk_move); in amdgpu_vm_bo_base_init()
325 if (bo->tbo.type == ttm_bo_type_kernel && bo->parent) in amdgpu_vm_bo_base_init()
330 if (bo->preferred_domains & in amdgpu_vm_bo_base_init()
331 amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type)) in amdgpu_vm_bo_base_init()
343 * amdgpu_vm_lock_pd - lock PD in drm_exec
355 return drm_exec_prepare_obj(exec, &vm->root.bo->tbo.base, in amdgpu_vm_lock_pd()
360 * amdgpu_vm_move_to_lru_tail - move all BOs to the end of LRU
371 spin_lock(&adev->mman.bdev.lru_lock); in amdgpu_vm_move_to_lru_tail()
372 ttm_lru_bulk_move_tail(&vm->lru_bulk_move); in amdgpu_vm_move_to_lru_tail()
373 spin_unlock(&adev->mman.bdev.lru_lock); in amdgpu_vm_move_to_lru_tail()
382 r = drm_sched_entity_init(&vm->immediate, DRM_SCHED_PRIORITY_NORMAL, in amdgpu_vm_init_entities()
383 adev->vm_manager.vm_pte_scheds, in amdgpu_vm_init_entities()
384 adev->vm_manager.vm_pte_num_scheds, NULL); in amdgpu_vm_init_entities()
388 return drm_sched_entity_init(&vm->delayed, DRM_SCHED_PRIORITY_NORMAL, in amdgpu_vm_init_entities()
389 adev->vm_manager.vm_pte_scheds, in amdgpu_vm_init_entities()
390 adev->vm_manager.vm_pte_num_scheds, NULL); in amdgpu_vm_init_entities()
393 drm_sched_entity_destroy(&vm->immediate); in amdgpu_vm_init_entities()
400 drm_sched_entity_destroy(&vm->immediate); in amdgpu_vm_fini_entities()
401 drm_sched_entity_destroy(&vm->delayed); in amdgpu_vm_fini_entities()
405 * amdgpu_vm_generation - return the page table re-generation counter
409 * Returns a page table re-generation token to allow checking if submissions
415 uint64_t result = (u64)atomic_read(&adev->vram_lost_counter) << 32; in amdgpu_vm_generation()
420 result += vm->generation; in amdgpu_vm_generation()
421 /* Add one if the page tables will be re-generated on next CS */ in amdgpu_vm_generation()
422 if (drm_sched_entity_error(&vm->delayed)) in amdgpu_vm_generation()
429 * amdgpu_vm_validate_pt_bos - validate the page table BOs
450 if (drm_sched_entity_error(&vm->delayed)) { in amdgpu_vm_validate_pt_bos()
451 ++vm->generation; in amdgpu_vm_validate_pt_bos()
459 spin_lock(&vm->status_lock); in amdgpu_vm_validate_pt_bos()
460 while (!list_empty(&vm->evicted)) { in amdgpu_vm_validate_pt_bos()
461 bo_base = list_first_entry(&vm->evicted, in amdgpu_vm_validate_pt_bos()
464 spin_unlock(&vm->status_lock); in amdgpu_vm_validate_pt_bos()
466 bo = bo_base->bo; in amdgpu_vm_validate_pt_bos()
478 if (bo->tbo.type != ttm_bo_type_kernel) { in amdgpu_vm_validate_pt_bos()
481 vm->update_funcs->map_table(to_amdgpu_bo_vm(bo)); in amdgpu_vm_validate_pt_bos()
484 spin_lock(&vm->status_lock); in amdgpu_vm_validate_pt_bos()
486 spin_unlock(&vm->status_lock); in amdgpu_vm_validate_pt_bos()
489 vm->evicting = false; in amdgpu_vm_validate_pt_bos()
496 * amdgpu_vm_ready - check VM is ready for updates
511 ret = !vm->evicting; in amdgpu_vm_ready()
514 spin_lock(&vm->status_lock); in amdgpu_vm_ready()
515 empty = list_empty(&vm->evicted); in amdgpu_vm_ready()
516 spin_unlock(&vm->status_lock); in amdgpu_vm_ready()
522 * amdgpu_vm_check_compute_bug - check whether asic has compute vm bug
537 /* Compute has a VM bug for GFX version < 7. in amdgpu_vm_check_compute_bug()
538 Compute has a VM bug for GFX 8 MEC firmware version < 673.*/ in amdgpu_vm_check_compute_bug()
539 if (ip_block->version->major <= 7) in amdgpu_vm_check_compute_bug()
541 else if (ip_block->version->major == 8) in amdgpu_vm_check_compute_bug()
542 if (adev->gfx.mec_fw_version < 673) in amdgpu_vm_check_compute_bug()
546 for (i = 0; i < adev->num_rings; i++) { in amdgpu_vm_check_compute_bug()
547 ring = adev->rings[i]; in amdgpu_vm_check_compute_bug()
548 if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) in amdgpu_vm_check_compute_bug()
550 ring->has_compute_vm_bug = has_compute_vm_bug; in amdgpu_vm_check_compute_bug()
552 ring->has_compute_vm_bug = false; in amdgpu_vm_check_compute_bug()
557 * amdgpu_vm_need_pipeline_sync - Check if pipe sync is needed for job.
568 struct amdgpu_device *adev = ring->adev; in amdgpu_vm_need_pipeline_sync()
569 unsigned vmhub = ring->vm_hub; in amdgpu_vm_need_pipeline_sync()
570 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vm_need_pipeline_sync()
572 if (job->vmid == 0) in amdgpu_vm_need_pipeline_sync()
575 if (job->vm_needs_flush || ring->has_compute_vm_bug) in amdgpu_vm_need_pipeline_sync()
578 if (ring->funcs->emit_gds_switch && job->gds_switch_needed) in amdgpu_vm_need_pipeline_sync()
581 if (amdgpu_vmid_had_gpu_reset(adev, &id_mgr->ids[job->vmid])) in amdgpu_vm_need_pipeline_sync()
588 * amdgpu_vm_flush - hardware flush the vm
602 struct amdgpu_device *adev = ring->adev; in amdgpu_vm_flush()
603 unsigned vmhub = ring->vm_hub; in amdgpu_vm_flush()
604 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vm_flush()
605 struct amdgpu_vmid *id = &id_mgr->ids[job->vmid]; in amdgpu_vm_flush()
606 bool spm_update_needed = job->spm_update_needed; in amdgpu_vm_flush()
607 bool gds_switch_needed = ring->funcs->emit_gds_switch && in amdgpu_vm_flush()
608 job->gds_switch_needed; in amdgpu_vm_flush()
609 bool vm_flush_needed = job->vm_needs_flush; in amdgpu_vm_flush()
622 mutex_lock(&id_mgr->lock); in amdgpu_vm_flush()
623 if (id->pasid != job->pasid || !id->pasid_mapping || in amdgpu_vm_flush()
624 !dma_fence_is_signaled(id->pasid_mapping)) in amdgpu_vm_flush()
626 mutex_unlock(&id_mgr->lock); in amdgpu_vm_flush()
628 gds_switch_needed &= !!ring->funcs->emit_gds_switch; in amdgpu_vm_flush()
629 vm_flush_needed &= !!ring->funcs->emit_vm_flush && in amdgpu_vm_flush()
630 job->vm_pd_addr != AMDGPU_BO_INVALID_OFFSET; in amdgpu_vm_flush()
631 pasid_mapping_needed &= adev->gmc.gmc_funcs->emit_pasid_mapping && in amdgpu_vm_flush()
632 ring->funcs->emit_wreg; in amdgpu_vm_flush()
638 if (ring->funcs->init_cond_exec) in amdgpu_vm_flush()
645 trace_amdgpu_vm_flush(ring, job->vmid, job->vm_pd_addr); in amdgpu_vm_flush()
646 amdgpu_ring_emit_vm_flush(ring, job->vmid, job->vm_pd_addr); in amdgpu_vm_flush()
650 amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid); in amdgpu_vm_flush()
652 if (spm_update_needed && adev->gfx.rlc.funcs->update_spm_vmid) in amdgpu_vm_flush()
653 adev->gfx.rlc.funcs->update_spm_vmid(adev, job->vmid); in amdgpu_vm_flush()
655 if (!ring->is_mes_queue && ring->funcs->emit_gds_switch && in amdgpu_vm_flush()
657 amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base, in amdgpu_vm_flush()
658 job->gds_size, job->gws_base, in amdgpu_vm_flush()
659 job->gws_size, job->oa_base, in amdgpu_vm_flush()
660 job->oa_size); in amdgpu_vm_flush()
670 mutex_lock(&id_mgr->lock); in amdgpu_vm_flush()
671 dma_fence_put(id->last_flush); in amdgpu_vm_flush()
672 id->last_flush = dma_fence_get(fence); in amdgpu_vm_flush()
673 id->current_gpu_reset_count = in amdgpu_vm_flush()
674 atomic_read(&adev->gpu_reset_counter); in amdgpu_vm_flush()
675 mutex_unlock(&id_mgr->lock); in amdgpu_vm_flush()
679 mutex_lock(&id_mgr->lock); in amdgpu_vm_flush()
680 id->pasid = job->pasid; in amdgpu_vm_flush()
681 dma_fence_put(id->pasid_mapping); in amdgpu_vm_flush()
682 id->pasid_mapping = dma_fence_get(fence); in amdgpu_vm_flush()
683 mutex_unlock(&id_mgr->lock); in amdgpu_vm_flush()
687 if (ring->funcs->patch_cond_exec) in amdgpu_vm_flush()
691 if (ring->funcs->emit_switch_buffer) { in amdgpu_vm_flush()
700 * amdgpu_vm_bo_find - find the bo_va for a specific vm & bo
719 for (base = bo->vm_bo; base; base = base->next) { in amdgpu_vm_bo_find()
720 if (base->vm != vm) in amdgpu_vm_bo_find()
729 * amdgpu_vm_map_gart - Resolve gart mapping of addr
756 * amdgpu_vm_update_pdes - make sure that all directories are valid
776 spin_lock(&vm->status_lock); in amdgpu_vm_update_pdes()
777 list_splice_init(&vm->relocated, &relocated); in amdgpu_vm_update_pdes()
778 spin_unlock(&vm->status_lock); in amdgpu_vm_update_pdes()
784 return -ENODEV; in amdgpu_vm_update_pdes()
791 r = vm->update_funcs->prepare(¶ms, NULL, AMDGPU_SYNC_EXPLICIT); in amdgpu_vm_update_pdes()
797 flush_tlb_needed |= entry->moved; in amdgpu_vm_update_pdes()
804 r = vm->update_funcs->commit(¶ms, &vm->last_update); in amdgpu_vm_update_pdes()
809 atomic64_inc(&vm->tlb_seq); in amdgpu_vm_update_pdes()
823 * amdgpu_vm_tlb_seq_cb - make sure to increment tlb sequence
835 atomic64_inc(&tlb_cb->vm->tlb_seq); in amdgpu_vm_tlb_seq_cb()
840 * amdgpu_vm_update_range - update a range in the vm page table
876 return -ENODEV; in amdgpu_vm_update_range()
880 r = -ENOMEM; in amdgpu_vm_update_range()
885 * heavy-weight flush TLB unconditionally. in amdgpu_vm_update_range()
887 flush_tlb |= adev->gmc.xgmi.num_physical_nodes && in amdgpu_vm_update_range()
888 adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 0); in amdgpu_vm_update_range()
893 flush_tlb |= adev->ip_versions[GC_HWIP][0] < IP_VERSION(9, 0, 0); in amdgpu_vm_update_range()
911 if (vm->evicting) { in amdgpu_vm_update_range()
912 r = -EBUSY; in amdgpu_vm_update_range()
916 if (!unlocked && !dma_fence_is_signaled(vm->last_unlocked)) { in amdgpu_vm_update_range()
919 amdgpu_bo_fence(vm->root.bo, vm->last_unlocked, true); in amdgpu_vm_update_range()
920 swap(vm->last_unlocked, tmp); in amdgpu_vm_update_range()
924 r = vm->update_funcs->prepare(¶ms, resv, sync_mode); in amdgpu_vm_update_range()
929 (last - start + 1) * AMDGPU_GPU_PAGE_SIZE, &cursor); in amdgpu_vm_update_range()
950 pages_addr[idx - 1] + PAGE_SIZE)) in amdgpu_vm_update_range()
954 count--; in amdgpu_vm_update_range()
982 r = vm->update_funcs->commit(¶ms, fence); in amdgpu_vm_update_range()
985 tlb_cb->vm = vm; in amdgpu_vm_update_range()
987 !dma_fence_add_callback(*fence, &tlb_cb->cb, in amdgpu_vm_update_range()
989 dma_fence_put(vm->last_tlb_flush); in amdgpu_vm_update_range()
990 vm->last_tlb_flush = dma_fence_get(*fence); in amdgpu_vm_update_range()
992 amdgpu_vm_tlb_seq_cb(NULL, &tlb_cb->cb); in amdgpu_vm_update_range()
1009 struct amdgpu_vm *vm = bo_va->base.vm; in amdgpu_vm_bo_get_memory()
1010 struct amdgpu_bo *bo = bo_va->base.bo; in amdgpu_vm_bo_get_memory()
1019 if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv && in amdgpu_vm_bo_get_memory()
1020 !dma_resv_trylock(bo->tbo.base.resv)) in amdgpu_vm_bo_get_memory()
1024 if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv) in amdgpu_vm_bo_get_memory()
1025 dma_resv_unlock(bo->tbo.base.resv); in amdgpu_vm_bo_get_memory()
1033 spin_lock(&vm->status_lock); in amdgpu_vm_get_memory()
1034 list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) in amdgpu_vm_get_memory()
1037 list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) in amdgpu_vm_get_memory()
1040 list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) in amdgpu_vm_get_memory()
1043 list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) in amdgpu_vm_get_memory()
1046 list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) in amdgpu_vm_get_memory()
1049 list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) in amdgpu_vm_get_memory()
1051 spin_unlock(&vm->status_lock); in amdgpu_vm_get_memory()
1055 * amdgpu_vm_bo_update - update all BO mappings in the vm page table
1064 * 0 for success, -EINVAL for failure.
1069 struct amdgpu_bo *bo = bo_va->base.bo; in amdgpu_vm_bo_update()
1070 struct amdgpu_vm *vm = bo_va->base.vm; in amdgpu_vm_bo_update()
1073 struct ttm_resource *mem; in amdgpu_vm_bo_update() local
1082 mem = NULL; in amdgpu_vm_bo_update()
1083 resv = vm->root.bo->tbo.base.resv; in amdgpu_vm_bo_update()
1085 struct drm_gem_object *obj = &bo->tbo.base; in amdgpu_vm_bo_update()
1087 resv = bo->tbo.base.resv; in amdgpu_vm_bo_update()
1088 if (obj->import_attach && bo_va->is_xgmi) { in amdgpu_vm_bo_update()
1089 struct dma_buf *dma_buf = obj->import_attach->dmabuf; in amdgpu_vm_bo_update()
1090 struct drm_gem_object *gobj = dma_buf->priv; in amdgpu_vm_bo_update()
1093 if (abo->tbo.resource && in amdgpu_vm_bo_update()
1094 abo->tbo.resource->mem_type == TTM_PL_VRAM) in amdgpu_vm_bo_update()
1097 mem = bo->tbo.resource; in amdgpu_vm_bo_update()
1098 if (mem->mem_type == TTM_PL_TT || in amdgpu_vm_bo_update()
1099 mem->mem_type == AMDGPU_PL_PREEMPT) in amdgpu_vm_bo_update()
1100 pages_addr = bo->tbo.ttm->dma_address; in amdgpu_vm_bo_update()
1106 flags = amdgpu_ttm_tt_pte_flags(adev, bo->tbo.ttm, mem); in amdgpu_vm_bo_update()
1111 bo_adev = amdgpu_ttm_adev(bo->tbo.bdev); in amdgpu_vm_bo_update()
1112 vram_base = bo_adev->vm_manager.vram_base_offset; in amdgpu_vm_bo_update()
1118 if (clear || (bo && bo->tbo.base.resv == in amdgpu_vm_bo_update()
1119 vm->root.bo->tbo.base.resv)) in amdgpu_vm_bo_update()
1120 last_update = &vm->last_update; in amdgpu_vm_bo_update()
1122 last_update = &bo_va->last_pt_update; in amdgpu_vm_bo_update()
1124 if (!clear && bo_va->base.moved) { in amdgpu_vm_bo_update()
1126 list_splice_init(&bo_va->valids, &bo_va->invalids); in amdgpu_vm_bo_update()
1128 } else if (bo_va->cleared != clear) { in amdgpu_vm_bo_update()
1129 list_splice_init(&bo_va->valids, &bo_va->invalids); in amdgpu_vm_bo_update()
1132 list_for_each_entry(mapping, &bo_va->invalids, list) { in amdgpu_vm_bo_update()
1135 /* normally,bo_va->flags only contians READABLE and WIRTEABLE bit go here in amdgpu_vm_bo_update()
1138 if (!(mapping->flags & AMDGPU_PTE_READABLE)) in amdgpu_vm_bo_update()
1140 if (!(mapping->flags & AMDGPU_PTE_WRITEABLE)) in amdgpu_vm_bo_update()
1149 resv, mapping->start, mapping->last, in amdgpu_vm_bo_update()
1150 update_flags, mapping->offset, in amdgpu_vm_bo_update()
1151 vram_base, mem, pages_addr, in amdgpu_vm_bo_update()
1161 if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv) { in amdgpu_vm_bo_update()
1162 uint32_t mem_type = bo->tbo.resource->mem_type; in amdgpu_vm_bo_update()
1164 if (!(bo->preferred_domains & in amdgpu_vm_bo_update()
1166 amdgpu_vm_bo_evicted(&bo_va->base); in amdgpu_vm_bo_update()
1168 amdgpu_vm_bo_idle(&bo_va->base); in amdgpu_vm_bo_update()
1170 amdgpu_vm_bo_done(&bo_va->base); in amdgpu_vm_bo_update()
1173 list_splice_init(&bo_va->invalids, &bo_va->valids); in amdgpu_vm_bo_update()
1174 bo_va->cleared = clear; in amdgpu_vm_bo_update()
1175 bo_va->base.moved = false; in amdgpu_vm_bo_update()
1178 list_for_each_entry(mapping, &bo_va->valids, list) in amdgpu_vm_bo_update()
1186 * amdgpu_vm_update_prt_state - update the global PRT state
1195 spin_lock_irqsave(&adev->vm_manager.prt_lock, flags); in amdgpu_vm_update_prt_state()
1196 enable = !!atomic_read(&adev->vm_manager.num_prt_users); in amdgpu_vm_update_prt_state()
1197 adev->gmc.gmc_funcs->set_prt(adev, enable); in amdgpu_vm_update_prt_state()
1198 spin_unlock_irqrestore(&adev->vm_manager.prt_lock, flags); in amdgpu_vm_update_prt_state()
1202 * amdgpu_vm_prt_get - add a PRT user
1208 if (!adev->gmc.gmc_funcs->set_prt) in amdgpu_vm_prt_get()
1211 if (atomic_inc_return(&adev->vm_manager.num_prt_users) == 1) in amdgpu_vm_prt_get()
1216 * amdgpu_vm_prt_put - drop a PRT user
1222 if (atomic_dec_return(&adev->vm_manager.num_prt_users) == 0) in amdgpu_vm_prt_put()
1227 * amdgpu_vm_prt_cb - callback for updating the PRT status
1236 amdgpu_vm_prt_put(cb->adev); in amdgpu_vm_prt_cb()
1241 * amdgpu_vm_add_prt_cb - add callback for updating the PRT status
1251 if (!adev->gmc.gmc_funcs->set_prt) in amdgpu_vm_add_prt_cb()
1262 cb->adev = adev; in amdgpu_vm_add_prt_cb()
1263 if (!fence || dma_fence_add_callback(fence, &cb->cb, in amdgpu_vm_add_prt_cb()
1265 amdgpu_vm_prt_cb(fence, &cb->cb); in amdgpu_vm_add_prt_cb()
1270 * amdgpu_vm_free_mapping - free a mapping
1284 if (mapping->flags & AMDGPU_PTE_PRT) in amdgpu_vm_free_mapping()
1290 * amdgpu_vm_prt_fini - finish all prt mappings
1299 struct dma_resv *resv = vm->root.bo->tbo.base.resv; in amdgpu_vm_prt_fini()
1311 * amdgpu_vm_clear_freed - clear freed BOs in the PT
1329 struct dma_resv *resv = vm->root.bo->tbo.base.resv; in amdgpu_vm_clear_freed()
1335 while (!list_empty(&vm->freed)) { in amdgpu_vm_clear_freed()
1336 mapping = list_first_entry(&vm->freed, in amdgpu_vm_clear_freed()
1338 list_del(&mapping->list); in amdgpu_vm_clear_freed()
1340 if (vm->pte_support_ats && in amdgpu_vm_clear_freed()
1341 mapping->start < AMDGPU_GMC_HOLE_START) in amdgpu_vm_clear_freed()
1345 mapping->start, mapping->last, in amdgpu_vm_clear_freed()
1367 * amdgpu_vm_handle_moved - handle moved BOs in the PT
1387 spin_lock(&vm->status_lock); in amdgpu_vm_handle_moved()
1388 while (!list_empty(&vm->moved)) { in amdgpu_vm_handle_moved()
1389 bo_va = list_first_entry(&vm->moved, struct amdgpu_bo_va, in amdgpu_vm_handle_moved()
1391 spin_unlock(&vm->status_lock); in amdgpu_vm_handle_moved()
1397 spin_lock(&vm->status_lock); in amdgpu_vm_handle_moved()
1400 while (!list_empty(&vm->invalidated)) { in amdgpu_vm_handle_moved()
1401 bo_va = list_first_entry(&vm->invalidated, struct amdgpu_bo_va, in amdgpu_vm_handle_moved()
1403 resv = bo_va->base.bo->tbo.base.resv; in amdgpu_vm_handle_moved()
1404 spin_unlock(&vm->status_lock); in amdgpu_vm_handle_moved()
1419 spin_lock(&vm->status_lock); in amdgpu_vm_handle_moved()
1421 spin_unlock(&vm->status_lock); in amdgpu_vm_handle_moved()
1427 * amdgpu_vm_bo_add - add a bo to a specific vm
1451 amdgpu_vm_bo_base_init(&bo_va->base, vm, bo); in amdgpu_vm_bo_add()
1453 bo_va->ref_count = 1; in amdgpu_vm_bo_add()
1454 bo_va->last_pt_update = dma_fence_get_stub(); in amdgpu_vm_bo_add()
1455 INIT_LIST_HEAD(&bo_va->valids); in amdgpu_vm_bo_add()
1456 INIT_LIST_HEAD(&bo_va->invalids); in amdgpu_vm_bo_add()
1461 dma_resv_assert_held(bo->tbo.base.resv); in amdgpu_vm_bo_add()
1463 bo_va->is_xgmi = true; in amdgpu_vm_bo_add()
1473 * amdgpu_vm_bo_insert_map - insert a new mapping
1485 struct amdgpu_vm *vm = bo_va->base.vm; in amdgpu_vm_bo_insert_map()
1486 struct amdgpu_bo *bo = bo_va->base.bo; in amdgpu_vm_bo_insert_map()
1488 mapping->bo_va = bo_va; in amdgpu_vm_bo_insert_map()
1489 list_add(&mapping->list, &bo_va->invalids); in amdgpu_vm_bo_insert_map()
1490 amdgpu_vm_it_insert(mapping, &vm->va); in amdgpu_vm_bo_insert_map()
1492 if (mapping->flags & AMDGPU_PTE_PRT) in amdgpu_vm_bo_insert_map()
1495 if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv && in amdgpu_vm_bo_insert_map()
1496 !bo_va->base.moved) { in amdgpu_vm_bo_insert_map()
1497 amdgpu_vm_bo_moved(&bo_va->base); in amdgpu_vm_bo_insert_map()
1503 * amdgpu_vm_bo_map - map bo inside a vm
1525 struct amdgpu_bo *bo = bo_va->base.bo; in amdgpu_vm_bo_map()
1526 struct amdgpu_vm *vm = bo_va->base.vm; in amdgpu_vm_bo_map()
1531 return -EINVAL; in amdgpu_vm_bo_map()
1533 return -EINVAL; in amdgpu_vm_bo_map()
1536 eaddr = saddr + size - 1; in amdgpu_vm_bo_map()
1538 (eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT)) in amdgpu_vm_bo_map()
1539 return -EINVAL; in amdgpu_vm_bo_map()
1544 tmp = amdgpu_vm_it_iter_first(&vm->va, saddr, eaddr); in amdgpu_vm_bo_map()
1547 dev_err(adev->dev, "bo %p va 0x%010Lx-0x%010Lx conflict with " in amdgpu_vm_bo_map()
1548 "0x%010Lx-0x%010Lx\n", bo, saddr, eaddr, in amdgpu_vm_bo_map()
1549 tmp->start, tmp->last + 1); in amdgpu_vm_bo_map()
1550 return -EINVAL; in amdgpu_vm_bo_map()
1555 return -ENOMEM; in amdgpu_vm_bo_map()
1557 mapping->start = saddr; in amdgpu_vm_bo_map()
1558 mapping->last = eaddr; in amdgpu_vm_bo_map()
1559 mapping->offset = offset; in amdgpu_vm_bo_map()
1560 mapping->flags = flags; in amdgpu_vm_bo_map()
1568 * amdgpu_vm_bo_replace_map - map bo inside a vm, replacing existing mappings
1591 struct amdgpu_bo *bo = bo_va->base.bo; in amdgpu_vm_bo_replace_map()
1597 return -EINVAL; in amdgpu_vm_bo_replace_map()
1599 return -EINVAL; in amdgpu_vm_bo_replace_map()
1602 eaddr = saddr + size - 1; in amdgpu_vm_bo_replace_map()
1604 (eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT)) in amdgpu_vm_bo_replace_map()
1605 return -EINVAL; in amdgpu_vm_bo_replace_map()
1610 return -ENOMEM; in amdgpu_vm_bo_replace_map()
1612 r = amdgpu_vm_bo_clear_mappings(adev, bo_va->base.vm, saddr, size); in amdgpu_vm_bo_replace_map()
1621 mapping->start = saddr; in amdgpu_vm_bo_replace_map()
1622 mapping->last = eaddr; in amdgpu_vm_bo_replace_map()
1623 mapping->offset = offset; in amdgpu_vm_bo_replace_map()
1624 mapping->flags = flags; in amdgpu_vm_bo_replace_map()
1632 * amdgpu_vm_bo_unmap - remove bo mapping from vm
1650 struct amdgpu_vm *vm = bo_va->base.vm; in amdgpu_vm_bo_unmap()
1655 list_for_each_entry(mapping, &bo_va->valids, list) { in amdgpu_vm_bo_unmap()
1656 if (mapping->start == saddr) in amdgpu_vm_bo_unmap()
1660 if (&mapping->list == &bo_va->valids) { in amdgpu_vm_bo_unmap()
1663 list_for_each_entry(mapping, &bo_va->invalids, list) { in amdgpu_vm_bo_unmap()
1664 if (mapping->start == saddr) in amdgpu_vm_bo_unmap()
1668 if (&mapping->list == &bo_va->invalids) in amdgpu_vm_bo_unmap()
1669 return -ENOENT; in amdgpu_vm_bo_unmap()
1672 list_del(&mapping->list); in amdgpu_vm_bo_unmap()
1673 amdgpu_vm_it_remove(mapping, &vm->va); in amdgpu_vm_bo_unmap()
1674 mapping->bo_va = NULL; in amdgpu_vm_bo_unmap()
1678 list_add(&mapping->list, &vm->freed); in amdgpu_vm_bo_unmap()
1681 bo_va->last_pt_update); in amdgpu_vm_bo_unmap()
1687 * amdgpu_vm_bo_clear_mappings - remove all mappings in a specific range
1707 eaddr = saddr + size - 1; in amdgpu_vm_bo_clear_mappings()
1714 return -ENOMEM; in amdgpu_vm_bo_clear_mappings()
1715 INIT_LIST_HEAD(&before->list); in amdgpu_vm_bo_clear_mappings()
1720 return -ENOMEM; in amdgpu_vm_bo_clear_mappings()
1722 INIT_LIST_HEAD(&after->list); in amdgpu_vm_bo_clear_mappings()
1725 tmp = amdgpu_vm_it_iter_first(&vm->va, saddr, eaddr); in amdgpu_vm_bo_clear_mappings()
1728 if (tmp->start < saddr) { in amdgpu_vm_bo_clear_mappings()
1729 before->start = tmp->start; in amdgpu_vm_bo_clear_mappings()
1730 before->last = saddr - 1; in amdgpu_vm_bo_clear_mappings()
1731 before->offset = tmp->offset; in amdgpu_vm_bo_clear_mappings()
1732 before->flags = tmp->flags; in amdgpu_vm_bo_clear_mappings()
1733 before->bo_va = tmp->bo_va; in amdgpu_vm_bo_clear_mappings()
1734 list_add(&before->list, &tmp->bo_va->invalids); in amdgpu_vm_bo_clear_mappings()
1738 if (tmp->last > eaddr) { in amdgpu_vm_bo_clear_mappings()
1739 after->start = eaddr + 1; in amdgpu_vm_bo_clear_mappings()
1740 after->last = tmp->last; in amdgpu_vm_bo_clear_mappings()
1741 after->offset = tmp->offset; in amdgpu_vm_bo_clear_mappings()
1742 after->offset += (after->start - tmp->start) << PAGE_SHIFT; in amdgpu_vm_bo_clear_mappings()
1743 after->flags = tmp->flags; in amdgpu_vm_bo_clear_mappings()
1744 after->bo_va = tmp->bo_va; in amdgpu_vm_bo_clear_mappings()
1745 list_add(&after->list, &tmp->bo_va->invalids); in amdgpu_vm_bo_clear_mappings()
1748 list_del(&tmp->list); in amdgpu_vm_bo_clear_mappings()
1749 list_add(&tmp->list, &removed); in amdgpu_vm_bo_clear_mappings()
1756 amdgpu_vm_it_remove(tmp, &vm->va); in amdgpu_vm_bo_clear_mappings()
1757 list_del(&tmp->list); in amdgpu_vm_bo_clear_mappings()
1759 if (tmp->start < saddr) in amdgpu_vm_bo_clear_mappings()
1760 tmp->start = saddr; in amdgpu_vm_bo_clear_mappings()
1761 if (tmp->last > eaddr) in amdgpu_vm_bo_clear_mappings()
1762 tmp->last = eaddr; in amdgpu_vm_bo_clear_mappings()
1764 tmp->bo_va = NULL; in amdgpu_vm_bo_clear_mappings()
1765 list_add(&tmp->list, &vm->freed); in amdgpu_vm_bo_clear_mappings()
1770 if (!list_empty(&before->list)) { in amdgpu_vm_bo_clear_mappings()
1771 struct amdgpu_bo *bo = before->bo_va->base.bo; in amdgpu_vm_bo_clear_mappings()
1773 amdgpu_vm_it_insert(before, &vm->va); in amdgpu_vm_bo_clear_mappings()
1774 if (before->flags & AMDGPU_PTE_PRT) in amdgpu_vm_bo_clear_mappings()
1777 if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv && in amdgpu_vm_bo_clear_mappings()
1778 !before->bo_va->base.moved) in amdgpu_vm_bo_clear_mappings()
1779 amdgpu_vm_bo_moved(&before->bo_va->base); in amdgpu_vm_bo_clear_mappings()
1785 if (!list_empty(&after->list)) { in amdgpu_vm_bo_clear_mappings()
1786 struct amdgpu_bo *bo = after->bo_va->base.bo; in amdgpu_vm_bo_clear_mappings()
1788 amdgpu_vm_it_insert(after, &vm->va); in amdgpu_vm_bo_clear_mappings()
1789 if (after->flags & AMDGPU_PTE_PRT) in amdgpu_vm_bo_clear_mappings()
1792 if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv && in amdgpu_vm_bo_clear_mappings()
1793 !after->bo_va->base.moved) in amdgpu_vm_bo_clear_mappings()
1794 amdgpu_vm_bo_moved(&after->bo_va->base); in amdgpu_vm_bo_clear_mappings()
1803 * amdgpu_vm_bo_lookup_mapping - find mapping by address
1817 return amdgpu_vm_it_iter_first(&vm->va, addr, addr); in amdgpu_vm_bo_lookup_mapping()
1821 * amdgpu_vm_bo_trace_cs - trace all reserved mappings
1835 for (mapping = amdgpu_vm_it_iter_first(&vm->va, 0, U64_MAX); mapping; in amdgpu_vm_bo_trace_cs()
1837 if (mapping->bo_va && mapping->bo_va->base.bo) { in amdgpu_vm_bo_trace_cs()
1840 bo = mapping->bo_va->base.bo; in amdgpu_vm_bo_trace_cs()
1841 if (dma_resv_locking_ctx(bo->tbo.base.resv) != in amdgpu_vm_bo_trace_cs()
1851 * amdgpu_vm_bo_del - remove a bo from a specific vm
1856 * Remove @bo_va->bo from the requested vm.
1864 struct amdgpu_bo *bo = bo_va->base.bo; in amdgpu_vm_bo_del()
1865 struct amdgpu_vm *vm = bo_va->base.vm; in amdgpu_vm_bo_del()
1868 dma_resv_assert_held(vm->root.bo->tbo.base.resv); in amdgpu_vm_bo_del()
1871 dma_resv_assert_held(bo->tbo.base.resv); in amdgpu_vm_bo_del()
1872 if (bo->tbo.base.resv == vm->root.bo->tbo.base.resv) in amdgpu_vm_bo_del()
1873 ttm_bo_set_bulk_move(&bo->tbo, NULL); in amdgpu_vm_bo_del()
1875 for (base = &bo_va->base.bo->vm_bo; *base; in amdgpu_vm_bo_del()
1876 base = &(*base)->next) { in amdgpu_vm_bo_del()
1877 if (*base != &bo_va->base) in amdgpu_vm_bo_del()
1880 *base = bo_va->base.next; in amdgpu_vm_bo_del()
1885 spin_lock(&vm->status_lock); in amdgpu_vm_bo_del()
1886 list_del(&bo_va->base.vm_status); in amdgpu_vm_bo_del()
1887 spin_unlock(&vm->status_lock); in amdgpu_vm_bo_del()
1889 list_for_each_entry_safe(mapping, next, &bo_va->valids, list) { in amdgpu_vm_bo_del()
1890 list_del(&mapping->list); in amdgpu_vm_bo_del()
1891 amdgpu_vm_it_remove(mapping, &vm->va); in amdgpu_vm_bo_del()
1892 mapping->bo_va = NULL; in amdgpu_vm_bo_del()
1894 list_add(&mapping->list, &vm->freed); in amdgpu_vm_bo_del()
1896 list_for_each_entry_safe(mapping, next, &bo_va->invalids, list) { in amdgpu_vm_bo_del()
1897 list_del(&mapping->list); in amdgpu_vm_bo_del()
1898 amdgpu_vm_it_remove(mapping, &vm->va); in amdgpu_vm_bo_del()
1900 bo_va->last_pt_update); in amdgpu_vm_bo_del()
1903 dma_fence_put(bo_va->last_pt_update); in amdgpu_vm_bo_del()
1905 if (bo && bo_va->is_xgmi) in amdgpu_vm_bo_del()
1912 * amdgpu_vm_evictable - check if we can evict a VM
1920 struct amdgpu_vm_bo_base *bo_base = bo->vm_bo; in amdgpu_vm_evictable()
1923 if (!bo_base || !bo_base->vm) in amdgpu_vm_evictable()
1927 if (!dma_resv_test_signaled(bo->tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP)) in amdgpu_vm_evictable()
1931 if (!amdgpu_vm_eviction_trylock(bo_base->vm)) in amdgpu_vm_evictable()
1935 if (!dma_fence_is_signaled(bo_base->vm->last_unlocked)) { in amdgpu_vm_evictable()
1936 amdgpu_vm_eviction_unlock(bo_base->vm); in amdgpu_vm_evictable()
1940 bo_base->vm->evicting = true; in amdgpu_vm_evictable()
1941 amdgpu_vm_eviction_unlock(bo_base->vm); in amdgpu_vm_evictable()
1946 * amdgpu_vm_bo_invalidate - mark the bo as invalid
1960 if (bo->parent && (amdgpu_bo_shadowed(bo->parent) == bo)) in amdgpu_vm_bo_invalidate()
1961 bo = bo->parent; in amdgpu_vm_bo_invalidate()
1963 for (bo_base = bo->vm_bo; bo_base; bo_base = bo_base->next) { in amdgpu_vm_bo_invalidate()
1964 struct amdgpu_vm *vm = bo_base->vm; in amdgpu_vm_bo_invalidate()
1966 if (evicted && bo->tbo.base.resv == vm->root.bo->tbo.base.resv) { in amdgpu_vm_bo_invalidate()
1971 if (bo_base->moved) in amdgpu_vm_bo_invalidate()
1973 bo_base->moved = true; in amdgpu_vm_bo_invalidate()
1975 if (bo->tbo.type == ttm_bo_type_kernel) in amdgpu_vm_bo_invalidate()
1977 else if (bo->tbo.base.resv == vm->root.bo->tbo.base.resv) in amdgpu_vm_bo_invalidate()
1985 * amdgpu_vm_get_block_size - calculate VM page table size as power of two
2000 return (bits - 9); in amdgpu_vm_get_block_size()
2006 * amdgpu_vm_adjust_size - adjust vm size, block size and fragment size
2019 unsigned int max_size = 1 << (max_bits - 30); in amdgpu_vm_adjust_size()
2024 if (amdgpu_vm_size != -1) { in amdgpu_vm_adjust_size()
2027 dev_warn(adev->dev, "VM size (%d) too large, max is %u GB\n", in amdgpu_vm_adjust_size()
2039 * - Need to map system memory and VRAM from all GPUs in amdgpu_vm_adjust_size()
2040 * - VRAM from other GPUs not known here in amdgpu_vm_adjust_size()
2041 * - Assume VRAM <= system memory in amdgpu_vm_adjust_size()
2042 * - On GFX8 and older, VM space can be segmented for in amdgpu_vm_adjust_size()
2044 * - Need to allow room for fragmentation, guard pages etc. in amdgpu_vm_adjust_size()
2052 (1 << 30) - 1) >> 30; in amdgpu_vm_adjust_size()
2057 adev->vm_manager.max_pfn = (uint64_t)vm_size << 18; in amdgpu_vm_adjust_size()
2059 tmp = roundup_pow_of_two(adev->vm_manager.max_pfn); in amdgpu_vm_adjust_size()
2060 if (amdgpu_vm_block_size != -1) in amdgpu_vm_adjust_size()
2061 tmp >>= amdgpu_vm_block_size - 9; in amdgpu_vm_adjust_size()
2062 tmp = DIV_ROUND_UP(fls64(tmp) - 1, 9) - 1; in amdgpu_vm_adjust_size()
2063 adev->vm_manager.num_level = min(max_level, (unsigned)tmp); in amdgpu_vm_adjust_size()
2064 switch (adev->vm_manager.num_level) { in amdgpu_vm_adjust_size()
2066 adev->vm_manager.root_level = AMDGPU_VM_PDB2; in amdgpu_vm_adjust_size()
2069 adev->vm_manager.root_level = AMDGPU_VM_PDB1; in amdgpu_vm_adjust_size()
2072 adev->vm_manager.root_level = AMDGPU_VM_PDB0; in amdgpu_vm_adjust_size()
2075 dev_err(adev->dev, "VMPT only supports 2~4+1 levels\n"); in amdgpu_vm_adjust_size()
2078 if (amdgpu_vm_block_size != -1) in amdgpu_vm_adjust_size()
2079 adev->vm_manager.block_size = in amdgpu_vm_adjust_size()
2081 - AMDGPU_GPU_PAGE_SHIFT in amdgpu_vm_adjust_size()
2082 - 9 * adev->vm_manager.num_level); in amdgpu_vm_adjust_size()
2083 else if (adev->vm_manager.num_level > 1) in amdgpu_vm_adjust_size()
2084 adev->vm_manager.block_size = 9; in amdgpu_vm_adjust_size()
2086 adev->vm_manager.block_size = amdgpu_vm_get_block_size(tmp); in amdgpu_vm_adjust_size()
2088 if (amdgpu_vm_fragment_size == -1) in amdgpu_vm_adjust_size()
2089 adev->vm_manager.fragment_size = fragment_size_default; in amdgpu_vm_adjust_size()
2091 adev->vm_manager.fragment_size = amdgpu_vm_fragment_size; in amdgpu_vm_adjust_size()
2093 DRM_INFO("vm size is %u GB, %u levels, block size is %u-bit, fragment size is %u-bit\n", in amdgpu_vm_adjust_size()
2094 vm_size, adev->vm_manager.num_level + 1, in amdgpu_vm_adjust_size()
2095 adev->vm_manager.block_size, in amdgpu_vm_adjust_size()
2096 adev->vm_manager.fragment_size); in amdgpu_vm_adjust_size()
2100 * amdgpu_vm_wait_idle - wait for the VM to become idle
2107 timeout = dma_resv_wait_timeout(vm->root.bo->tbo.base.resv, in amdgpu_vm_wait_idle()
2113 return dma_fence_wait_timeout(vm->last_unlocked, true, timeout); in amdgpu_vm_wait_idle()
2117 * amdgpu_vm_init - initialize a vm instance
2134 vm->va = RB_ROOT_CACHED; in amdgpu_vm_init()
2136 vm->reserved_vmid[i] = NULL; in amdgpu_vm_init()
2137 INIT_LIST_HEAD(&vm->evicted); in amdgpu_vm_init()
2138 INIT_LIST_HEAD(&vm->relocated); in amdgpu_vm_init()
2139 INIT_LIST_HEAD(&vm->moved); in amdgpu_vm_init()
2140 INIT_LIST_HEAD(&vm->idle); in amdgpu_vm_init()
2141 INIT_LIST_HEAD(&vm->invalidated); in amdgpu_vm_init()
2142 spin_lock_init(&vm->status_lock); in amdgpu_vm_init()
2143 INIT_LIST_HEAD(&vm->freed); in amdgpu_vm_init()
2144 INIT_LIST_HEAD(&vm->done); in amdgpu_vm_init()
2145 INIT_LIST_HEAD(&vm->pt_freed); in amdgpu_vm_init()
2146 INIT_WORK(&vm->pt_free_work, amdgpu_vm_pt_free_work); in amdgpu_vm_init()
2152 vm->pte_support_ats = false; in amdgpu_vm_init()
2153 vm->is_compute_context = false; in amdgpu_vm_init()
2155 vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode & in amdgpu_vm_init()
2159 vm->use_cpu_for_update ? "CPU" : "SDMA"); in amdgpu_vm_init()
2160 WARN_ONCE((vm->use_cpu_for_update && in amdgpu_vm_init()
2161 !amdgpu_gmc_vram_full_visible(&adev->gmc)), in amdgpu_vm_init()
2164 if (vm->use_cpu_for_update) in amdgpu_vm_init()
2165 vm->update_funcs = &amdgpu_vm_cpu_funcs; in amdgpu_vm_init()
2167 vm->update_funcs = &amdgpu_vm_sdma_funcs; in amdgpu_vm_init()
2169 vm->last_update = dma_fence_get_stub(); in amdgpu_vm_init()
2170 vm->last_unlocked = dma_fence_get_stub(); in amdgpu_vm_init()
2171 vm->last_tlb_flush = dma_fence_get_stub(); in amdgpu_vm_init()
2172 vm->generation = 0; in amdgpu_vm_init()
2174 mutex_init(&vm->eviction_lock); in amdgpu_vm_init()
2175 vm->evicting = false; in amdgpu_vm_init()
2177 r = amdgpu_vm_pt_create(adev, vm, adev->vm_manager.root_level, in amdgpu_vm_init()
2181 root_bo = &root->bo; in amdgpu_vm_init()
2186 r = dma_resv_reserve_fences(root_bo->tbo.base.resv, 1); in amdgpu_vm_init()
2190 amdgpu_vm_bo_base_init(&vm->root, vm, root_bo); in amdgpu_vm_init()
2196 amdgpu_bo_unreserve(vm->root.bo); in amdgpu_vm_init()
2198 INIT_KFIFO(vm->faults); in amdgpu_vm_init()
2203 amdgpu_bo_unreserve(vm->root.bo); in amdgpu_vm_init()
2206 amdgpu_bo_unref(&root->shadow); in amdgpu_vm_init()
2208 vm->root.bo = NULL; in amdgpu_vm_init()
2211 dma_fence_put(vm->last_tlb_flush); in amdgpu_vm_init()
2212 dma_fence_put(vm->last_unlocked); in amdgpu_vm_init()
2219 * amdgpu_vm_make_compute - Turn a GFX VM into a compute VM
2224 * This only works on GFX VMs that don't have any BOs added and no
2228 * - use_cpu_for_update
2229 * - pte_supports_ats
2235 * 0 for success, -errno for errors.
2239 bool pte_support_ats = (adev->asic_type == CHIP_RAVEN); in amdgpu_vm_make_compute()
2242 r = amdgpu_bo_reserve(vm->root.bo, true); in amdgpu_vm_make_compute()
2249 if (pte_support_ats != vm->pte_support_ats) { in amdgpu_vm_make_compute()
2252 r = -EINVAL; in amdgpu_vm_make_compute()
2256 vm->pte_support_ats = pte_support_ats; in amdgpu_vm_make_compute()
2257 r = amdgpu_vm_pt_clear(adev, vm, to_amdgpu_bo_vm(vm->root.bo), in amdgpu_vm_make_compute()
2264 vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode & in amdgpu_vm_make_compute()
2267 vm->use_cpu_for_update ? "CPU" : "SDMA"); in amdgpu_vm_make_compute()
2268 WARN_ONCE((vm->use_cpu_for_update && in amdgpu_vm_make_compute()
2269 !amdgpu_gmc_vram_full_visible(&adev->gmc)), in amdgpu_vm_make_compute()
2272 if (vm->use_cpu_for_update) { in amdgpu_vm_make_compute()
2274 r = amdgpu_bo_sync_wait(vm->root.bo, in amdgpu_vm_make_compute()
2279 vm->update_funcs = &amdgpu_vm_cpu_funcs; in amdgpu_vm_make_compute()
2285 vm->update_funcs = &amdgpu_vm_sdma_funcs; in amdgpu_vm_make_compute()
2288 dma_fence_put(vm->last_update); in amdgpu_vm_make_compute()
2289 vm->last_update = dma_fence_get_stub(); in amdgpu_vm_make_compute()
2290 vm->is_compute_context = true; in amdgpu_vm_make_compute()
2293 amdgpu_bo_unref(&to_amdgpu_bo_vm(vm->root.bo)->shadow); in amdgpu_vm_make_compute()
2298 amdgpu_bo_unreserve(vm->root.bo); in amdgpu_vm_make_compute()
2303 * amdgpu_vm_release_compute - release a compute vm
2313 vm->is_compute_context = false; in amdgpu_vm_release_compute()
2317 * amdgpu_vm_fini - tear down a vm instance
2328 bool prt_fini_needed = !!adev->gmc.gmc_funcs->set_prt; in amdgpu_vm_fini()
2335 flush_work(&vm->pt_free_work); in amdgpu_vm_fini()
2337 root = amdgpu_bo_ref(vm->root.bo); in amdgpu_vm_fini()
2340 dma_fence_wait(vm->last_unlocked, false); in amdgpu_vm_fini()
2341 dma_fence_put(vm->last_unlocked); in amdgpu_vm_fini()
2342 dma_fence_wait(vm->last_tlb_flush, false); in amdgpu_vm_fini()
2344 spin_lock_irqsave(vm->last_tlb_flush->lock, flags); in amdgpu_vm_fini()
2345 spin_unlock_irqrestore(vm->last_tlb_flush->lock, flags); in amdgpu_vm_fini()
2346 dma_fence_put(vm->last_tlb_flush); in amdgpu_vm_fini()
2348 list_for_each_entry_safe(mapping, tmp, &vm->freed, list) { in amdgpu_vm_fini()
2349 if (mapping->flags & AMDGPU_PTE_PRT && prt_fini_needed) { in amdgpu_vm_fini()
2354 list_del(&mapping->list); in amdgpu_vm_fini()
2361 WARN_ON(vm->root.bo); in amdgpu_vm_fini()
2365 if (!RB_EMPTY_ROOT(&vm->va.rb_root)) { in amdgpu_vm_fini()
2366 dev_err(adev->dev, "still active bo inside vm\n"); in amdgpu_vm_fini()
2369 &vm->va.rb_root, rb) { in amdgpu_vm_fini()
2373 list_del(&mapping->list); in amdgpu_vm_fini()
2377 dma_fence_put(vm->last_update); in amdgpu_vm_fini()
2380 if (vm->reserved_vmid[i]) { in amdgpu_vm_fini()
2382 vm->reserved_vmid[i] = false; in amdgpu_vm_fini()
2389 * amdgpu_vm_manager_init - init the VM manager
2402 adev->vm_manager.concurrent_flush = !(adev->asic_type < CHIP_VEGA10 || in amdgpu_vm_manager_init()
2403 adev->asic_type == CHIP_NAVI10 || in amdgpu_vm_manager_init()
2404 adev->asic_type == CHIP_NAVI14); in amdgpu_vm_manager_init()
2407 adev->vm_manager.fence_context = in amdgpu_vm_manager_init()
2410 adev->vm_manager.seqno[i] = 0; in amdgpu_vm_manager_init()
2412 spin_lock_init(&adev->vm_manager.prt_lock); in amdgpu_vm_manager_init()
2413 atomic_set(&adev->vm_manager.num_prt_users, 0); in amdgpu_vm_manager_init()
2419 if (amdgpu_vm_update_mode == -1) { in amdgpu_vm_manager_init()
2423 if (amdgpu_gmc_vram_full_visible(&adev->gmc) && in amdgpu_vm_manager_init()
2425 adev->vm_manager.vm_update_mode = in amdgpu_vm_manager_init()
2428 adev->vm_manager.vm_update_mode = 0; in amdgpu_vm_manager_init()
2430 adev->vm_manager.vm_update_mode = amdgpu_vm_update_mode; in amdgpu_vm_manager_init()
2432 adev->vm_manager.vm_update_mode = 0; in amdgpu_vm_manager_init()
2435 xa_init_flags(&adev->vm_manager.pasids, XA_FLAGS_LOCK_IRQ); in amdgpu_vm_manager_init()
2439 * amdgpu_vm_manager_fini - cleanup VM manager
2447 WARN_ON(!xa_empty(&adev->vm_manager.pasids)); in amdgpu_vm_manager_fini()
2448 xa_destroy(&adev->vm_manager.pasids); in amdgpu_vm_manager_fini()
2454 * amdgpu_vm_ioctl - Manages VMID reservation for vm hubs.
2461 * 0 for success, -errno for errors.
2467 struct amdgpu_fpriv *fpriv = filp->driver_priv; in amdgpu_vm_ioctl()
2470 if (args->in.flags) in amdgpu_vm_ioctl()
2471 return -EINVAL; in amdgpu_vm_ioctl()
2473 switch (args->in.op) { in amdgpu_vm_ioctl()
2476 if (!fpriv->vm.reserved_vmid[AMDGPU_GFXHUB(0)]) { in amdgpu_vm_ioctl()
2478 fpriv->vm.reserved_vmid[AMDGPU_GFXHUB(0)] = true; in amdgpu_vm_ioctl()
2483 if (fpriv->vm.reserved_vmid[AMDGPU_GFXHUB(0)]) { in amdgpu_vm_ioctl()
2485 fpriv->vm.reserved_vmid[AMDGPU_GFXHUB(0)] = false; in amdgpu_vm_ioctl()
2489 return -EINVAL; in amdgpu_vm_ioctl()
2496 * amdgpu_vm_get_task_info - Extracts task info for a PASID.
2508 xa_lock_irqsave(&adev->vm_manager.pasids, flags); in amdgpu_vm_get_task_info()
2510 vm = xa_load(&adev->vm_manager.pasids, pasid); in amdgpu_vm_get_task_info()
2512 *task_info = vm->task_info; in amdgpu_vm_get_task_info()
2514 xa_unlock_irqrestore(&adev->vm_manager.pasids, flags); in amdgpu_vm_get_task_info()
2518 * amdgpu_vm_set_task_info - Sets VMs task info.
2524 if (vm->task_info.pid) in amdgpu_vm_set_task_info()
2527 vm->task_info.pid = current->pid; in amdgpu_vm_set_task_info()
2528 get_task_comm(vm->task_info.task_name, current); in amdgpu_vm_set_task_info()
2530 if (current->group_leader->mm != current->mm) in amdgpu_vm_set_task_info()
2533 vm->task_info.tgid = current->group_leader->pid; in amdgpu_vm_set_task_info()
2534 get_task_comm(vm->task_info.process_name, current->group_leader); in amdgpu_vm_set_task_info()
2538 * amdgpu_vm_handle_fault - graceful handling of VM faults.
2541 * @vmid: VMID, only used for GFX 9.4.3.
2543 * GFX 9.4.3.
2561 xa_lock_irqsave(&adev->vm_manager.pasids, irqflags); in amdgpu_vm_handle_fault()
2562 vm = xa_load(&adev->vm_manager.pasids, pasid); in amdgpu_vm_handle_fault()
2564 root = amdgpu_bo_ref(vm->root.bo); in amdgpu_vm_handle_fault()
2565 is_compute_context = vm->is_compute_context; in amdgpu_vm_handle_fault()
2569 xa_unlock_irqrestore(&adev->vm_manager.pasids, irqflags); in amdgpu_vm_handle_fault()
2587 xa_lock_irqsave(&adev->vm_manager.pasids, irqflags); in amdgpu_vm_handle_fault()
2588 vm = xa_load(&adev->vm_manager.pasids, pasid); in amdgpu_vm_handle_fault()
2589 if (vm && vm->root.bo != root) in amdgpu_vm_handle_fault()
2591 xa_unlock_irqrestore(&adev->vm_manager.pasids, irqflags); in amdgpu_vm_handle_fault()
2600 * combination to force a no-retry-fault in amdgpu_vm_handle_fault()
2606 value = adev->dummy_page_addr; in amdgpu_vm_handle_fault()
2615 r = dma_resv_reserve_fences(root->tbo.base.resv, 1); in amdgpu_vm_handle_fault()
2641 * amdgpu_debugfs_vm_bo_info - print BO info for the VM
2665 spin_lock(&vm->status_lock); in amdgpu_debugfs_vm_bo_info()
2667 list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) { in amdgpu_debugfs_vm_bo_info()
2668 if (!bo_va->base.bo) in amdgpu_debugfs_vm_bo_info()
2670 total_idle += amdgpu_bo_print_info(id++, bo_va->base.bo, m); in amdgpu_debugfs_vm_bo_info()
2676 list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) { in amdgpu_debugfs_vm_bo_info()
2677 if (!bo_va->base.bo) in amdgpu_debugfs_vm_bo_info()
2679 total_evicted += amdgpu_bo_print_info(id++, bo_va->base.bo, m); in amdgpu_debugfs_vm_bo_info()
2685 list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) { in amdgpu_debugfs_vm_bo_info()
2686 if (!bo_va->base.bo) in amdgpu_debugfs_vm_bo_info()
2688 total_relocated += amdgpu_bo_print_info(id++, bo_va->base.bo, m); in amdgpu_debugfs_vm_bo_info()
2694 list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) { in amdgpu_debugfs_vm_bo_info()
2695 if (!bo_va->base.bo) in amdgpu_debugfs_vm_bo_info()
2697 total_moved += amdgpu_bo_print_info(id++, bo_va->base.bo, m); in amdgpu_debugfs_vm_bo_info()
2703 list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) { in amdgpu_debugfs_vm_bo_info()
2704 if (!bo_va->base.bo) in amdgpu_debugfs_vm_bo_info()
2706 total_invalidated += amdgpu_bo_print_info(id++, bo_va->base.bo, m); in amdgpu_debugfs_vm_bo_info()
2712 list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) { in amdgpu_debugfs_vm_bo_info()
2713 if (!bo_va->base.bo) in amdgpu_debugfs_vm_bo_info()
2715 total_done += amdgpu_bo_print_info(id++, bo_va->base.bo, m); in amdgpu_debugfs_vm_bo_info()
2717 spin_unlock(&vm->status_lock); in amdgpu_debugfs_vm_bo_info()