Lines Matching refs:ucode
741 struct amdgpu_firmware_info *ucode, in amdgpu_ucode_init_single_fw() argument
754 if (!ucode->fw) in amdgpu_ucode_init_single_fw()
757 ucode->mc_addr = mc_addr; in amdgpu_ucode_init_single_fw()
758 ucode->kaddr = kptr; in amdgpu_ucode_init_single_fw()
760 if (ucode->ucode_id == AMDGPU_UCODE_ID_STORAGE) in amdgpu_ucode_init_single_fw()
763 header = (const struct common_firmware_header *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
764 cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
765 cpv2_hdr = (const struct gfx_firmware_header_v2_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
766 dmcu_hdr = (const struct dmcu_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
767 dmcub_hdr = (const struct dmcub_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
768 mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
769 sdma_hdr = (const struct sdma_firmware_header_v2_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
770 imu_hdr = (const struct imu_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
773 switch (ucode->ucode_id) { in amdgpu_ucode_init_single_fw()
775 ucode->ucode_size = le32_to_cpu(sdma_hdr->ctx_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
776 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
780 ucode->ucode_size = le32_to_cpu(sdma_hdr->ctl_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
781 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
786 ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) - in amdgpu_ucode_init_single_fw()
788 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
793 ucode->ucode_size = le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_ucode_init_single_fw()
794 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
799 ucode->ucode_size = adev->gfx.rlc.save_restore_list_cntl_size_bytes; in amdgpu_ucode_init_single_fw()
803 ucode->ucode_size = adev->gfx.rlc.save_restore_list_gpm_size_bytes; in amdgpu_ucode_init_single_fw()
807 ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes; in amdgpu_ucode_init_single_fw()
811 ucode->ucode_size = adev->gfx.rlc.rlc_iram_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
815 ucode->ucode_size = adev->gfx.rlc.rlc_dram_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
819 ucode->ucode_size = adev->gfx.rlc.rlcp_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
823 ucode->ucode_size = adev->gfx.rlc.rlcv_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
827 ucode->ucode_size = adev->gfx.rlc.global_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
831 ucode->ucode_size = adev->gfx.rlc.se0_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
835 ucode->ucode_size = adev->gfx.rlc.se1_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
839 ucode->ucode_size = adev->gfx.rlc.se2_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
843 ucode->ucode_size = adev->gfx.rlc.se3_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
847 ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
848 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
852 ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes); in amdgpu_ucode_init_single_fw()
853 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
857 ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
858 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
862 ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes); in amdgpu_ucode_init_single_fw()
863 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
867 ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) - in amdgpu_ucode_init_single_fw()
869 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
873 ucode->ucode_size = le32_to_cpu(dmcu_hdr->intv_size_bytes); in amdgpu_ucode_init_single_fw()
874 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
879 ucode->ucode_size = le32_to_cpu(dmcub_hdr->inst_const_bytes); in amdgpu_ucode_init_single_fw()
880 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
884 ucode->ucode_size = ucode->fw->size; in amdgpu_ucode_init_single_fw()
885 ucode_addr = (u8 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
888 ucode->ucode_size = le32_to_cpu(imu_hdr->imu_iram_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
889 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
893 ucode->ucode_size = le32_to_cpu(imu_hdr->imu_dram_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
894 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
899 ucode->ucode_size = le32_to_cpu(cpv2_hdr->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
900 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
904 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
905 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
909 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
910 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
914 ucode->ucode_size = le32_to_cpu(cpv2_hdr->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
915 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
919 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
920 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
924 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
925 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
929 ucode->ucode_size = le32_to_cpu(cpv2_hdr->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
930 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
934 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
935 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
939 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
940 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
944 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
945 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
949 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
950 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
954 ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
955 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
960 ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
961 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
965 memcpy(ucode->kaddr, ucode_addr, ucode->ucode_size); in amdgpu_ucode_init_single_fw()
970 static int amdgpu_ucode_patch_jt(struct amdgpu_firmware_info *ucode, in amdgpu_ucode_patch_jt() argument
978 if (!ucode->fw) in amdgpu_ucode_patch_jt()
981 comm_hdr = (const struct common_firmware_header *)ucode->fw->data; in amdgpu_ucode_patch_jt()
982 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_patch_jt()
983 dst_addr = ucode->kaddr + in amdgpu_ucode_patch_jt()
986 src_addr = (uint8_t *)ucode->fw->data + in amdgpu_ucode_patch_jt()
1023 struct amdgpu_firmware_info *ucode = NULL; in amdgpu_ucode_init_bo() local
1042 ucode = &adev->firmware.ucode[i]; in amdgpu_ucode_init_bo()
1043 if (ucode->fw) { in amdgpu_ucode_init_bo()
1044 amdgpu_ucode_init_single_fw(adev, ucode, adev->firmware.fw_buf_mc + fw_offset, in amdgpu_ucode_init_bo()
1050 cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_bo()
1051 amdgpu_ucode_patch_jt(ucode, adev->firmware.fw_buf_mc + fw_offset, in amdgpu_ucode_init_bo()
1055 fw_offset += ALIGN(ucode->ucode_size, PAGE_SIZE); in amdgpu_ucode_init_bo()