138 		} else if (!amdgpu_gmc_vram_full_visible(&adev->gmc) &&  in amdgpu_evict_flags()
150 			abo->placements[0].fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;  in amdgpu_evict_flags()
223 	*addr = adev->gmc.gart_start;  in amdgpu_ttm_map_buffer()
444 	return end <= adev->gmc.visible_vram_size;  in amdgpu_mem_visible()
576 		if ((mem->bus.offset + bus_size) > adev->gmc.visible_vram_size)  in amdgpu_ttm_io_mem_reserve()
584 		mem->bus.offset += adev->gmc.aper_base;  in amdgpu_ttm_io_mem_reserve()
611 	return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;  in amdgpu_ttm_io_mem_pfn()
627 		return adev->gmc.gart_start;  in amdgpu_ttm_domain_start()
629 		return adev->gmc.vram_start;  in amdgpu_ttm_domain_start()
973 	placements.lpfn = adev->gmc.gart_size >> PAGE_SHIFT;  in amdgpu_ttm_alloc_gart()
1079 	if (adev->gmc.mem_partitions && abo->xcp_id >= 0)  in amdgpu_ttm_tt_create()
1618 	uint64_t vram_size = adev->gmc.visible_vram_size;  in amdgpu_ttm_fw_reserve_vram_init()
1643 	u64 vram_size = adev->gmc.visible_vram_size;  in amdgpu_ttm_drv_reserve_vram_init()
1689 		ALIGN((adev->gmc.mc_vram_size - reserve_size - SZ_1M), SZ_1M);  in amdgpu_ttm_training_data_block_init()
1691 		(adev->gmc.mc_vram_size - GDDR6_MEM_TRAINING_OFFSET);  in amdgpu_ttm_training_data_block_init()
1751 	if (!adev->gmc.is_app_apu) {  in amdgpu_ttm_reserve_tmr()
1753 			adev, adev->gmc.real_vram_size - reserve_size,  in amdgpu_ttm_reserve_tmr()
1772 	if (!adev->gmc.is_app_apu || !adev->gmc.num_mem_partitions)  in amdgpu_ttm_pools_init()
1775 	adev->mman.ttm_pools = kcalloc(adev->gmc.num_mem_partitions,  in amdgpu_ttm_pools_init()
1781 	for (i = 0; i < adev->gmc.num_mem_partitions; i++) {  in amdgpu_ttm_pools_init()
1783 			      adev->gmc.mem_partitions[i].numa.node,  in amdgpu_ttm_pools_init()
1793 	if (!adev->gmc.is_app_apu || !adev->mman.ttm_pools)  in amdgpu_ttm_pools_fini()
1796 	for (i = 0; i < adev->gmc.num_mem_partitions; i++)  in amdgpu_ttm_pools_fini()
1848 	if (adev->gmc.xgmi.connected_to_cpu)  in amdgpu_ttm_init()
1849 		adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,  in amdgpu_ttm_init()
1850 				adev->gmc.visible_vram_size);  in amdgpu_ttm_init()
1852 	else if (adev->gmc.is_app_apu)  in amdgpu_ttm_init()
1857 		adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,  in amdgpu_ttm_init()
1858 				adev->gmc.visible_vram_size);  in amdgpu_ttm_init()
1893 	if (!adev->gmc.is_app_apu) {  in amdgpu_ttm_init()
1921 		 (unsigned int)(adev->gmc.real_vram_size / (1024 * 1024)));  in amdgpu_ttm_init()
2002 	if (!adev->gmc.is_app_apu) {  in amdgpu_ttm_fini()
2053 	    adev->mman.buffer_funcs_enabled == enable || adev->gmc.is_app_apu)  in amdgpu_ttm_set_buffer_funcs_status()
2088 		size = adev->gmc.real_vram_size;  in amdgpu_ttm_set_buffer_funcs_status()
2090 		size = adev->gmc.visible_vram_size;  in amdgpu_ttm_set_buffer_funcs_status()
2121 		(*job)->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo ?  in amdgpu_ttm_prepare_job()
2122 							adev->gmc.pdb0_bo :  in amdgpu_ttm_prepare_job()
2329 	if (*pos >= adev->gmc.mc_vram_size)  in amdgpu_ttm_vram_read()
2332 	size = min(size, (size_t)(adev->gmc.mc_vram_size - *pos));  in amdgpu_ttm_vram_read()
2365 	if (*pos >= adev->gmc.mc_vram_size)  in amdgpu_ttm_vram_write()
2371 		if (*pos >= adev->gmc.mc_vram_size)  in amdgpu_ttm_vram_write()
2519 				 &amdgpu_ttm_vram_fops, adev->gmc.mc_vram_size);  in amdgpu_ttm_debugfs_init()