987 	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);  in amdgpu_ras_get_ecc_info()  local
994 	ret = amdgpu_dpm_get_ecc_info(adev, (void *)&(ras->umc_ecc));  in amdgpu_ras_get_ecc_info()
996 		if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops &&  in amdgpu_ras_get_ecc_info()
997 			adev->umc.ras->ras_block.hw_ops->query_ras_error_count)  in amdgpu_ras_get_ecc_info()
998 			adev->umc.ras->ras_block.hw_ops->query_ras_error_count(adev, err_data);  in amdgpu_ras_get_ecc_info()
1003 		if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops &&  in amdgpu_ras_get_ecc_info()
1004 		    adev->umc.ras->ras_block.hw_ops->query_ras_error_address)  in amdgpu_ras_get_ecc_info()
1005 			adev->umc.ras->ras_block.hw_ops->query_ras_error_address(adev, err_data);  in amdgpu_ras_get_ecc_info()
1007 		if (adev->umc.ras &&  in amdgpu_ras_get_ecc_info()
1008 			adev->umc.ras->ecc_info_query_ras_error_count)  in amdgpu_ras_get_ecc_info()
1009 			adev->umc.ras->ecc_info_query_ras_error_count(adev, err_data);  in amdgpu_ras_get_ecc_info()
1011 		if (adev->umc.ras &&  in amdgpu_ras_get_ecc_info()
1012 			adev->umc.ras->ecc_info_query_ras_error_address)  in amdgpu_ras_get_ecc_info()
1013 			adev->umc.ras->ecc_info_query_ras_error_address(adev, err_data);  in amdgpu_ras_get_ecc_info()
1650 	if (adev->nbio.ras &&  in amdgpu_ras_interrupt_fatal_error_handler()
1651 	    adev->nbio.ras->handle_ras_controller_intr_no_bifring)  in amdgpu_ras_interrupt_fatal_error_handler()
1652 		adev->nbio.ras->handle_ras_controller_intr_no_bifring(adev);  in amdgpu_ras_interrupt_fatal_error_handler()
1654 	if (adev->nbio.ras &&  in amdgpu_ras_interrupt_fatal_error_handler()
1655 	    adev->nbio.ras->handle_ras_err_event_athub_intr_no_bifring)  in amdgpu_ras_interrupt_fatal_error_handler()
1656 		adev->nbio.ras->handle_ras_err_event_athub_intr_no_bifring(adev);  in amdgpu_ras_interrupt_fatal_error_handler()
2019 	struct amdgpu_ras *ras =  in amdgpu_ras_do_recovery()  local
2022 	struct amdgpu_device *adev = ras->adev;  in amdgpu_ras_do_recovery()
2025 	if (!ras->disable_ras_err_cnt_harvest) {  in amdgpu_ras_do_recovery()
2046 	if (amdgpu_device_should_recover_gpu(ras->adev)) {  in amdgpu_ras_do_recovery()
2054 		if (!amdgpu_ras_is_poison_mode_supported(ras->adev))  in amdgpu_ras_do_recovery()
2059 			if (ras->gpu_reset_flags & AMDGPU_RAS_GPU_RESET_MODE2_RESET) {  in amdgpu_ras_do_recovery()
2060 				ras->gpu_reset_flags &= ~AMDGPU_RAS_GPU_RESET_MODE2_RESET;  in amdgpu_ras_do_recovery()
2067 			if (ras->gpu_reset_flags & AMDGPU_RAS_GPU_RESET_MODE1_RESET) {  in amdgpu_ras_do_recovery()
2068 				ras->gpu_reset_flags &= ~AMDGPU_RAS_GPU_RESET_MODE1_RESET;  in amdgpu_ras_do_recovery()
2075 		amdgpu_device_gpu_recover(ras->adev, NULL, &reset_context);  in amdgpu_ras_do_recovery()
2077 	atomic_set(&ras->in_recovery, 0);  in amdgpu_ras_do_recovery()
2197 		&adev->psp.ras_context.ras->eeprom_control;  in amdgpu_ras_load_bad_pages()
2571 	    adev->umc.ras &&  in amdgpu_ras_query_poison_mode()
2572 	    adev->umc.ras->query_ras_poison_mode) {  in amdgpu_ras_query_poison_mode()
2576 			adev->umc.ras->query_ras_poison_mode(adev);  in amdgpu_ras_query_poison_mode()
2642 			adev->nbio.ras = &nbio_v7_4_ras;  in amdgpu_ras_init()
2652 			adev->nbio.ras = &nbio_v4_3_ras;  in amdgpu_ras_init()
2656 			adev->nbio.ras = &nbio_v7_9_ras;  in amdgpu_ras_init()
2669 	if (adev->nbio.ras &&  in amdgpu_ras_init()
2670 	    adev->nbio.ras->init_ras_controller_interrupt) {  in amdgpu_ras_init()
2671 		r = adev->nbio.ras->init_ras_controller_interrupt(adev);  in amdgpu_ras_init()
2676 	if (adev->nbio.ras &&  in amdgpu_ras_init()
2677 	    adev->nbio.ras->init_ras_err_event_athub_interrupt) {  in amdgpu_ras_init()
2678 		r = adev->nbio.ras->init_ras_err_event_athub_interrupt(adev);  in amdgpu_ras_init()
2980 		struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);  in amdgpu_ras_global_ras_isr()  local
2985 		ras->gpu_reset_flags |= AMDGPU_RAS_GPU_RESET_MODE1_RESET;  in amdgpu_ras_global_ras_isr()
3122 	return adev->psp.ras_context.ras;  in amdgpu_ras_get_context()
3130 	adev->psp.ras_context.ras = ras_con;  in amdgpu_ras_set_context()
3139 	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);  in amdgpu_ras_is_supported()  local
3144 	ret = ras && (adev->ras_enabled & (1 << block));  in amdgpu_ras_is_supported()
3166 	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);  in amdgpu_ras_reset_gpu()  local
3168 	if (atomic_cmpxchg(&ras->in_recovery, 0, 1) == 0)  in amdgpu_ras_reset_gpu()
3169 		amdgpu_reset_domain_schedule(ras->adev->reset_domain, &ras->recovery_work);  in amdgpu_ras_reset_gpu()