Lines Matching +full:firmware +full:- +full:initialized
26 #include <linux/firmware.h>
57 struct amdgpu_device *adev = psp->adev; in psp_ring_init()
59 ring = &psp->km_ring; in psp_ring_init()
61 ring->ring_type = ring_type; in psp_ring_init()
64 ring->ring_size = 0x1000; in psp_ring_init()
65 ret = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE, in psp_ring_init()
68 &adev->firmware.rbuf, in psp_ring_init()
69 &ring->ring_mem_mc_addr, in psp_ring_init()
70 (void **)&ring->ring_mem); in psp_ring_init()
72 ring->ring_size = 0; in psp_ring_init()
80 * Due to DF Cstate management centralized to PMFW, the firmware
82 * - Load KDB
83 * - Load SYS_DRV
84 * - Load tOS
85 * - Load PMFW
86 * - Setup TMR
87 * - Load other non-psp fw
88 * - Load ASD
89 * - Load XGMI/RAS/HDCP/DTM TA if any
92 * - Arcturus and onwards
96 struct amdgpu_device *adev = psp->adev; in psp_check_pmfw_centralized_cstate_management()
99 psp->pmfw_centralized_cstate_management = false; in psp_check_pmfw_centralized_cstate_management()
103 switch (adev->ip_versions[MP0_HWIP][0]) { in psp_check_pmfw_centralized_cstate_management()
115 psp->pmfw_centralized_cstate_management = true; in psp_check_pmfw_centralized_cstate_management()
118 psp->pmfw_centralized_cstate_management = false; in psp_check_pmfw_centralized_cstate_management()
125 struct amdgpu_device *adev = psp->adev; in psp_init_sriov_microcode()
131 switch (adev->ip_versions[MP0_HWIP][0]) { in psp_init_sriov_microcode()
135 adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MEC2; in psp_init_sriov_microcode()
139 adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MEC2; in psp_init_sriov_microcode()
144 adev->virt.autoload_ucode_id = 0; in psp_init_sriov_microcode()
151 adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MES1_DATA; in psp_init_sriov_microcode()
155 return -EINVAL; in psp_init_sriov_microcode()
163 struct psp_context *psp = &adev->psp; in psp_early_init()
165 switch (adev->ip_versions[MP0_HWIP][0]) { in psp_early_init()
168 psp->autoload_supported = false; in psp_early_init()
173 psp->autoload_supported = false; in psp_early_init()
178 psp->autoload_supported = false; in psp_early_init()
182 adev->psp.sup_pd_fw_up = !amdgpu_sriov_vf(adev); in psp_early_init()
191 psp->autoload_supported = true; in psp_early_init()
208 psp->autoload_supported = true; in psp_early_init()
211 if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2) { in psp_early_init()
213 psp->autoload_supported = false; in psp_early_init()
220 psp->autoload_supported = true; in psp_early_init()
221 adev->psp.sup_ifwi_up = !amdgpu_sriov_vf(adev); in psp_early_init()
225 psp->autoload_supported = true; in psp_early_init()
228 return -EINVAL; in psp_early_init()
231 psp->adev = adev; in psp_early_init()
243 amdgpu_bo_free_kernel(&mem_ctx->shared_bo, &mem_ctx->shared_mc_addr, in psp_ta_free_shared_buf()
244 &mem_ctx->shared_buf); in psp_ta_free_shared_buf()
245 mem_ctx->shared_bo = NULL; in psp_ta_free_shared_buf()
254 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; in psp_free_shared_bufs()
255 amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr); in psp_free_shared_bufs()
256 psp->tmr_bo = NULL; in psp_free_shared_bufs()
259 psp_ta_free_shared_buf(&psp->xgmi_context.context.mem_context); in psp_free_shared_bufs()
262 psp_ta_free_shared_buf(&psp->ras_context.context.mem_context); in psp_free_shared_bufs()
265 psp_ta_free_shared_buf(&psp->hdcp_context.context.mem_context); in psp_free_shared_bufs()
268 psp_ta_free_shared_buf(&psp->dtm_context.context.mem_context); in psp_free_shared_bufs()
271 psp_ta_free_shared_buf(&psp->rap_context.context.mem_context); in psp_free_shared_bufs()
274 psp_ta_free_shared_buf(&psp->securedisplay_context.context.mem_context); in psp_free_shared_bufs()
281 struct psp_memory_training_context *ctx = &psp->mem_train_ctx; in psp_memory_training_fini()
283 ctx->init = PSP_MEM_TRAIN_NOT_SUPPORT; in psp_memory_training_fini()
284 kfree(ctx->sys_cache); in psp_memory_training_fini()
285 ctx->sys_cache = NULL; in psp_memory_training_fini()
291 struct psp_memory_training_context *ctx = &psp->mem_train_ctx; in psp_memory_training_init()
293 if (ctx->init != PSP_MEM_TRAIN_RESERVE_SUCCESS) { in psp_memory_training_init()
298 ctx->sys_cache = kzalloc(ctx->train_data_size, GFP_KERNEL); in psp_memory_training_init()
299 if (ctx->sys_cache == NULL) { in psp_memory_training_init()
301 ret = -ENOMEM; in psp_memory_training_init()
306 ctx->train_data_size, in psp_memory_training_init()
307 ctx->p2c_train_data_offset, in psp_memory_training_init()
308 ctx->c2p_train_data_offset); in psp_memory_training_init()
309 ctx->init = PSP_MEM_TRAIN_INIT_SUCCESS; in psp_memory_training_init()
337 if (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 6)) in psp_get_runtime_db_entry()
340 db_header_pos = adev->gmc.mc_vram_size - PSP_RUNTIME_DB_OFFSET; in psp_get_runtime_db_entry()
349 dev_dbg(adev->dev, "PSP runtime database doesn't exist\n"); in psp_get_runtime_db_entry()
359 dev_warn(adev->dev, "Invalid PSP runtime database entry count\n"); in psp_get_runtime_db_entry()
370 dev_warn(adev->dev, "Invalid PSP runtime database boot cfg entry size\n"); in psp_get_runtime_db_entry()
381 dev_warn(adev->dev, "Invalid PSP runtime database scpm entry size\n"); in psp_get_runtime_db_entry()
402 struct psp_context *psp = &adev->psp; in psp_sw_init()
405 struct psp_memory_training_context *mem_training_ctx = &psp->mem_train_ctx; in psp_sw_init()
408 psp->cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL); in psp_sw_init()
409 if (!psp->cmd) { in psp_sw_init()
411 ret = -ENOMEM; in psp_sw_init()
414 adev->psp.xgmi_context.supports_extended_data = in psp_sw_init()
415 !adev->gmc.xgmi.connected_to_cpu && in psp_sw_init()
416 adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 2); in psp_sw_init()
423 adev->scpm_enabled = true; in psp_sw_init()
424 adev->scpm_status = scpm_entry.scpm_status; in psp_sw_init()
426 adev->scpm_enabled = false; in psp_sw_init()
427 adev->scpm_status = SCPM_DISABLE; in psp_sw_init()
436 psp->boot_cfg_bitmask = boot_cfg_entry.boot_cfg_bitmask; in psp_sw_init()
437 if ((psp->boot_cfg_bitmask) & in psp_sw_init()
444 mem_training_ctx->enable_mem_training = true; in psp_sw_init()
451 mem_training_ctx->enable_mem_training = true; in psp_sw_init()
454 if (mem_training_ctx->enable_mem_training) { in psp_sw_init()
471 &psp->fw_pri_bo, in psp_sw_init()
472 &psp->fw_pri_mc_addr, in psp_sw_init()
473 &psp->fw_pri_buf); in psp_sw_init()
480 &psp->fence_buf_bo, in psp_sw_init()
481 &psp->fence_buf_mc_addr, in psp_sw_init()
482 &psp->fence_buf); in psp_sw_init()
489 &psp->cmd_buf_bo, &psp->cmd_buf_mc_addr, in psp_sw_init()
490 (void **)&psp->cmd_buf_mem); in psp_sw_init()
497 amdgpu_bo_free_kernel(&psp->fence_buf_bo, in psp_sw_init()
498 &psp->fence_buf_mc_addr, &psp->fence_buf); in psp_sw_init()
500 amdgpu_bo_free_kernel(&psp->fw_pri_bo, in psp_sw_init()
501 &psp->fw_pri_mc_addr, &psp->fw_pri_buf); in psp_sw_init()
508 struct psp_context *psp = &adev->psp; in psp_sw_fini()
509 struct psp_gfx_cmd_resp *cmd = psp->cmd; in psp_sw_fini()
513 amdgpu_ucode_release(&psp->sos_fw); in psp_sw_fini()
514 amdgpu_ucode_release(&psp->asd_fw); in psp_sw_fini()
515 amdgpu_ucode_release(&psp->ta_fw); in psp_sw_fini()
516 amdgpu_ucode_release(&psp->cap_fw); in psp_sw_fini()
517 amdgpu_ucode_release(&psp->toc_fw); in psp_sw_fini()
524 if (psp->km_ring.ring_mem) in psp_sw_fini()
525 amdgpu_bo_free_kernel(&adev->firmware.rbuf, in psp_sw_fini()
526 &psp->km_ring.ring_mem_mc_addr, in psp_sw_fini()
527 (void **)&psp->km_ring.ring_mem); in psp_sw_fini()
529 amdgpu_bo_free_kernel(&psp->fw_pri_bo, in psp_sw_fini()
530 &psp->fw_pri_mc_addr, &psp->fw_pri_buf); in psp_sw_fini()
531 amdgpu_bo_free_kernel(&psp->fence_buf_bo, in psp_sw_fini()
532 &psp->fence_buf_mc_addr, &psp->fence_buf); in psp_sw_fini()
533 amdgpu_bo_free_kernel(&psp->cmd_buf_bo, &psp->cmd_buf_mc_addr, in psp_sw_fini()
534 (void **)&psp->cmd_buf_mem); in psp_sw_fini()
544 struct amdgpu_device *adev = psp->adev; in psp_wait_for()
546 if (psp->adev->no_hw_access) in psp_wait_for()
549 for (i = 0; i < adev->usec_timeout; i++) { in psp_wait_for()
561 return -ETIME; in psp_wait_for()
569 struct amdgpu_device *adev = psp->adev; in psp_wait_for_spirom_update()
571 if (psp->adev->no_hw_access) in psp_wait_for_spirom_update()
581 return -ETIME; in psp_wait_for_spirom_update()
633 if (psp->adev->no_hw_access) in psp_cmd_submit_buf()
636 memset(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE); in psp_cmd_submit_buf()
638 memcpy(psp->cmd_buf_mem, cmd, sizeof(struct psp_gfx_cmd_resp)); in psp_cmd_submit_buf()
640 index = atomic_inc_return(&psp->fence_value); in psp_cmd_submit_buf()
641 ret = psp_ring_cmd_submit(psp, psp->cmd_buf_mc_addr, fence_mc_addr, index); in psp_cmd_submit_buf()
643 atomic_dec(&psp->fence_value); in psp_cmd_submit_buf()
647 amdgpu_device_invalidate_hdp(psp->adev, NULL); in psp_cmd_submit_buf()
648 while (*((unsigned int *)psp->fence_buf) != index) { in psp_cmd_submit_buf()
649 if (--timeout == 0) in psp_cmd_submit_buf()
660 amdgpu_device_invalidate_hdp(psp->adev, NULL); in psp_cmd_submit_buf()
664 skip_unsupport = (psp->cmd_buf_mem->resp.status == TEE_ERROR_NOT_SUPPORTED || in psp_cmd_submit_buf()
665 psp->cmd_buf_mem->resp.status == PSP_ERR_UNKNOWN_COMMAND) && amdgpu_sriov_vf(psp->adev); in psp_cmd_submit_buf()
667 memcpy(&cmd->resp, &psp->cmd_buf_mem->resp, sizeof(struct psp_gfx_resp)); in psp_cmd_submit_buf()
674 * return -EINVAL. in psp_cmd_submit_buf()
676 if (!skip_unsupport && (psp->cmd_buf_mem->resp.status || !timeout) && !ras_intr) { in psp_cmd_submit_buf()
679 amdgpu_ucode_name(ucode->ucode_id), ucode->ucode_id); in psp_cmd_submit_buf()
681 psp_gfx_cmd_name(psp->cmd_buf_mem->cmd_id), psp->cmd_buf_mem->cmd_id, in psp_cmd_submit_buf()
682 psp->cmd_buf_mem->resp.status); in psp_cmd_submit_buf()
683 /* If any firmware (including CAP) load fails under SRIOV, it should in psp_cmd_submit_buf()
687 if ((ucode && amdgpu_sriov_vf(psp->adev)) || !timeout) { in psp_cmd_submit_buf()
688 ret = -EINVAL; in psp_cmd_submit_buf()
694 ucode->tmr_mc_addr_lo = psp->cmd_buf_mem->resp.fw_addr_lo; in psp_cmd_submit_buf()
695 ucode->tmr_mc_addr_hi = psp->cmd_buf_mem->resp.fw_addr_hi; in psp_cmd_submit_buf()
704 struct psp_gfx_cmd_resp *cmd = psp->cmd; in acquire_psp_cmd_buf()
706 mutex_lock(&psp->mutex); in acquire_psp_cmd_buf()
715 mutex_unlock(&psp->mutex); in release_psp_cmd_buf()
722 struct amdgpu_device *adev = psp->adev; in psp_prep_tmr_cmd_buf()
731 if (amdgpu_sriov_vf(psp->adev)) in psp_prep_tmr_cmd_buf()
732 cmd->cmd_id = GFX_CMD_ID_SETUP_VMR; in psp_prep_tmr_cmd_buf()
734 cmd->cmd_id = GFX_CMD_ID_SETUP_TMR; in psp_prep_tmr_cmd_buf()
735 cmd->cmd.cmd_setup_tmr.buf_phy_addr_lo = lower_32_bits(tmr_mc); in psp_prep_tmr_cmd_buf()
736 cmd->cmd.cmd_setup_tmr.buf_phy_addr_hi = upper_32_bits(tmr_mc); in psp_prep_tmr_cmd_buf()
737 cmd->cmd.cmd_setup_tmr.buf_size = size; in psp_prep_tmr_cmd_buf()
738 cmd->cmd.cmd_setup_tmr.bitfield.virt_phy_addr = 1; in psp_prep_tmr_cmd_buf()
739 cmd->cmd.cmd_setup_tmr.system_phy_addr_lo = lower_32_bits(tmr_pa); in psp_prep_tmr_cmd_buf()
740 cmd->cmd.cmd_setup_tmr.system_phy_addr_hi = upper_32_bits(tmr_pa); in psp_prep_tmr_cmd_buf()
746 cmd->cmd_id = GFX_CMD_ID_LOAD_TOC; in psp_prep_load_toc_cmd_buf()
747 cmd->cmd.cmd_load_toc.toc_phy_addr_lo = lower_32_bits(pri_buf_mc); in psp_prep_load_toc_cmd_buf()
748 cmd->cmd.cmd_load_toc.toc_phy_addr_hi = upper_32_bits(pri_buf_mc); in psp_prep_load_toc_cmd_buf()
749 cmd->cmd.cmd_load_toc.toc_size = size; in psp_prep_load_toc_cmd_buf()
759 /* Copy toc to psp firmware private buffer */ in psp_load_toc()
760 psp_copy_fw(psp, psp->toc.start_addr, psp->toc.size_bytes); in psp_load_toc()
762 psp_prep_load_toc_cmd_buf(cmd, psp->fw_pri_mc_addr, psp->toc.size_bytes); in psp_load_toc()
765 psp->fence_buf_mc_addr); in psp_load_toc()
767 *tmr_size = psp->cmd_buf_mem->resp.tmr_size; in psp_load_toc()
776 switch (psp->adev->ip_versions[MP0_HWIP][0]) { in psp_boottime_tmr()
799 tmr_size = PSP_TMR_SIZE(psp->adev); in psp_tmr_init()
804 if (!amdgpu_sriov_vf(psp->adev) && in psp_tmr_init()
805 psp->toc.start_addr && in psp_tmr_init()
806 psp->toc.size_bytes && in psp_tmr_init()
807 psp->fw_pri_buf) { in psp_tmr_init()
815 if (!psp->tmr_bo) { in psp_tmr_init()
816 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; in psp_tmr_init()
817 ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, in psp_tmr_init()
819 AMDGPU_HAS_VRAM(psp->adev) ? in psp_tmr_init()
822 &psp->tmr_bo, &psp->tmr_mc_addr, in psp_tmr_init()
831 switch (psp->adev->ip_versions[MP0_HWIP][0]) { in psp_skip_tmr()
851 if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp)) in psp_tmr_load()
856 psp_prep_tmr_cmd_buf(psp, cmd, psp->tmr_mc_addr, psp->tmr_bo); in psp_tmr_load()
857 if (psp->tmr_bo) in psp_tmr_load()
859 amdgpu_bo_size(psp->tmr_bo), psp->tmr_mc_addr); in psp_tmr_load()
862 psp->fence_buf_mc_addr); in psp_tmr_load()
872 if (amdgpu_sriov_vf(psp->adev)) in psp_prep_tmr_unload_cmd_buf()
873 cmd->cmd_id = GFX_CMD_ID_DESTROY_VMR; in psp_prep_tmr_unload_cmd_buf()
875 cmd->cmd_id = GFX_CMD_ID_DESTROY_TMR; in psp_prep_tmr_unload_cmd_buf()
886 if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp)) in psp_tmr_unload()
892 dev_dbg(psp->adev->dev, "free PSP TMR buffer\n"); in psp_tmr_unload()
895 psp->fence_buf_mc_addr); in psp_tmr_unload()
914 return -EINVAL; in psp_get_fw_attestation_records_addr()
916 if (amdgpu_sriov_vf(psp->adev)) in psp_get_fw_attestation_records_addr()
921 cmd->cmd_id = GFX_CMD_ID_GET_FW_ATTESTATION; in psp_get_fw_attestation_records_addr()
924 psp->fence_buf_mc_addr); in psp_get_fw_attestation_records_addr()
927 *output_ptr = ((uint64_t)cmd->resp.uresp.fwar_db_info.fwar_db_addr_lo) + in psp_get_fw_attestation_records_addr()
928 ((uint64_t)cmd->resp.uresp.fwar_db_info.fwar_db_addr_hi << 32); in psp_get_fw_attestation_records_addr()
938 struct psp_context *psp = &adev->psp; in psp_boot_config_get()
947 cmd->cmd_id = GFX_CMD_ID_BOOT_CFG; in psp_boot_config_get()
948 cmd->cmd.boot_cfg.sub_cmd = BOOTCFG_CMD_GET; in psp_boot_config_get()
950 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_boot_config_get()
953 (cmd->resp.uresp.boot_cfg.boot_cfg & BOOT_CONFIG_GECC) ? 1 : 0; in psp_boot_config_get()
964 struct psp_context *psp = &adev->psp; in psp_boot_config_set()
972 cmd->cmd_id = GFX_CMD_ID_BOOT_CFG; in psp_boot_config_set()
973 cmd->cmd.boot_cfg.sub_cmd = BOOTCFG_CMD_SET; in psp_boot_config_set()
974 cmd->cmd.boot_cfg.boot_config = boot_cfg; in psp_boot_config_set()
975 cmd->cmd.boot_cfg.boot_config_valid = boot_cfg; in psp_boot_config_set()
977 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_boot_config_set()
987 struct psp_context *psp = &adev->psp; in psp_rl_load()
990 if (!is_psp_fw_valid(psp->rl)) in psp_rl_load()
995 memset(psp->fw_pri_buf, 0, PSP_1_MEG); in psp_rl_load()
996 memcpy(psp->fw_pri_buf, psp->rl.start_addr, psp->rl.size_bytes); in psp_rl_load()
998 cmd->cmd_id = GFX_CMD_ID_LOAD_IP_FW; in psp_rl_load()
999 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_lo = lower_32_bits(psp->fw_pri_mc_addr); in psp_rl_load()
1000 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_hi = upper_32_bits(psp->fw_pri_mc_addr); in psp_rl_load()
1001 cmd->cmd.cmd_load_ip_fw.fw_size = psp->rl.size_bytes; in psp_rl_load()
1002 cmd->cmd.cmd_load_ip_fw.fw_type = GFX_FW_TYPE_REG_LIST; in psp_rl_load()
1004 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_rl_load()
1016 if (amdgpu_sriov_vf(psp->adev)) in psp_spatial_partition()
1021 cmd->cmd_id = GFX_CMD_ID_SRIOV_SPATIAL_PART; in psp_spatial_partition()
1022 cmd->cmd.cmd_spatial_part.mode = mode; in psp_spatial_partition()
1024 dev_info(psp->adev->dev, "Requesting %d partitions through PSP", mode); in psp_spatial_partition()
1025 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_spatial_partition()
1040 if (amdgpu_sriov_vf(psp->adev) || !psp->asd_context.bin_desc.size_bytes) in psp_asd_initialize()
1043 psp->asd_context.mem_context.shared_mc_addr = 0; in psp_asd_initialize()
1044 psp->asd_context.mem_context.shared_mem_size = PSP_ASD_SHARED_MEM_SIZE; in psp_asd_initialize()
1045 psp->asd_context.ta_load_type = GFX_CMD_ID_LOAD_ASD; in psp_asd_initialize()
1047 ret = psp_ta_load(psp, &psp->asd_context); in psp_asd_initialize()
1049 psp->asd_context.initialized = true; in psp_asd_initialize()
1057 cmd->cmd_id = GFX_CMD_ID_UNLOAD_TA; in psp_prep_ta_unload_cmd_buf()
1058 cmd->cmd.cmd_unload_ta.session_id = session_id; in psp_prep_ta_unload_cmd_buf()
1066 psp_prep_ta_unload_cmd_buf(cmd, context->session_id); in psp_ta_unload()
1068 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_ta_unload()
1070 context->resp_status = cmd->resp.status; in psp_ta_unload()
1081 if (amdgpu_sriov_vf(psp->adev)) in psp_asd_terminate()
1084 if (!psp->asd_context.initialized) in psp_asd_terminate()
1087 ret = psp_ta_unload(psp, &psp->asd_context); in psp_asd_terminate()
1089 psp->asd_context.initialized = false; in psp_asd_terminate()
1097 cmd->cmd_id = GFX_CMD_ID_PROG_REG; in psp_prep_reg_prog_cmd_buf()
1098 cmd->cmd.cmd_setup_reg_prog.reg_value = value; in psp_prep_reg_prog_cmd_buf()
1099 cmd->cmd.cmd_setup_reg_prog.reg_id = id; in psp_prep_reg_prog_cmd_buf()
1109 return -EINVAL; in psp_reg_program()
1114 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_reg_program()
1127 cmd->cmd_id = context->ta_load_type; in psp_prep_ta_load_cmd_buf()
1128 cmd->cmd.cmd_load_ta.app_phy_addr_lo = lower_32_bits(ta_bin_mc); in psp_prep_ta_load_cmd_buf()
1129 cmd->cmd.cmd_load_ta.app_phy_addr_hi = upper_32_bits(ta_bin_mc); in psp_prep_ta_load_cmd_buf()
1130 cmd->cmd.cmd_load_ta.app_len = context->bin_desc.size_bytes; in psp_prep_ta_load_cmd_buf()
1132 cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_lo = in psp_prep_ta_load_cmd_buf()
1133 lower_32_bits(context->mem_context.shared_mc_addr); in psp_prep_ta_load_cmd_buf()
1134 cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_hi = in psp_prep_ta_load_cmd_buf()
1135 upper_32_bits(context->mem_context.shared_mc_addr); in psp_prep_ta_load_cmd_buf()
1136 cmd->cmd.cmd_load_ta.cmd_buf_len = context->mem_context.shared_mem_size; in psp_prep_ta_load_cmd_buf()
1146 return amdgpu_bo_create_kernel(psp->adev, mem_ctx->shared_mem_size, in psp_ta_init_shared_buf()
1149 &mem_ctx->shared_bo, in psp_ta_init_shared_buf()
1150 &mem_ctx->shared_mc_addr, in psp_ta_init_shared_buf()
1151 &mem_ctx->shared_buf); in psp_ta_init_shared_buf()
1158 cmd->cmd_id = GFX_CMD_ID_INVOKE_CMD; in psp_prep_ta_invoke_cmd_buf()
1159 cmd->cmd.cmd_invoke_cmd.session_id = session_id; in psp_prep_ta_invoke_cmd_buf()
1160 cmd->cmd.cmd_invoke_cmd.ta_cmd_id = ta_cmd_id; in psp_prep_ta_invoke_cmd_buf()
1170 psp_prep_ta_invoke_cmd_buf(cmd, ta_cmd_id, context->session_id); in psp_ta_invoke()
1173 psp->fence_buf_mc_addr); in psp_ta_invoke()
1175 context->resp_status = cmd->resp.status; in psp_ta_invoke()
1189 psp_copy_fw(psp, context->bin_desc.start_addr, in psp_ta_load()
1190 context->bin_desc.size_bytes); in psp_ta_load()
1192 psp_prep_ta_load_cmd_buf(cmd, psp->fw_pri_mc_addr, context); in psp_ta_load()
1195 psp->fence_buf_mc_addr); in psp_ta_load()
1197 context->resp_status = cmd->resp.status; in psp_ta_load()
1200 context->session_id = cmd->resp.session_id; in psp_ta_load()
1209 return psp_ta_invoke(psp, ta_cmd_id, &psp->xgmi_context.context); in psp_xgmi_invoke()
1215 struct amdgpu_device *adev = psp->adev; in psp_xgmi_terminate()
1218 if (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 4) || in psp_xgmi_terminate()
1219 (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 2) && in psp_xgmi_terminate()
1220 adev->gmc.xgmi.connected_to_cpu)) in psp_xgmi_terminate()
1223 if (!psp->xgmi_context.context.initialized) in psp_xgmi_terminate()
1226 ret = psp_ta_unload(psp, &psp->xgmi_context.context); in psp_xgmi_terminate()
1228 psp->xgmi_context.context.initialized = false; in psp_xgmi_terminate()
1238 if (!psp->ta_fw || in psp_xgmi_initialize()
1239 !psp->xgmi_context.context.bin_desc.size_bytes || in psp_xgmi_initialize()
1240 !psp->xgmi_context.context.bin_desc.start_addr) in psp_xgmi_initialize()
1241 return -ENOENT; in psp_xgmi_initialize()
1246 psp->xgmi_context.context.mem_context.shared_mem_size = PSP_XGMI_SHARED_MEM_SIZE; in psp_xgmi_initialize()
1247 psp->xgmi_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_xgmi_initialize()
1249 if (!psp->xgmi_context.context.mem_context.shared_buf) { in psp_xgmi_initialize()
1250 ret = psp_ta_init_shared_buf(psp, &psp->xgmi_context.context.mem_context); in psp_xgmi_initialize()
1256 ret = psp_ta_load(psp, &psp->xgmi_context.context); in psp_xgmi_initialize()
1258 psp->xgmi_context.context.initialized = true; in psp_xgmi_initialize()
1264 xgmi_cmd = (struct ta_xgmi_shared_memory *)(psp->xgmi_context.context.mem_context.shared_buf); in psp_xgmi_initialize()
1266 xgmi_cmd->flag_extend_link_record = set_extended_data; in psp_xgmi_initialize()
1267 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__INITIALIZE; in psp_xgmi_initialize()
1269 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_initialize()
1279 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_get_hive_id()
1282 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_HIVE_ID; in psp_xgmi_get_hive_id()
1285 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_get_hive_id()
1289 *hive_id = xgmi_cmd->xgmi_out_message.get_hive_id.hive_id; in psp_xgmi_get_hive_id()
1299 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_get_node_id()
1302 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_NODE_ID; in psp_xgmi_get_node_id()
1305 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_get_node_id()
1309 *node_id = xgmi_cmd->xgmi_out_message.get_node_id.node_id; in psp_xgmi_get_node_id()
1316 return (psp->adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 2) && in psp_xgmi_peer_link_info_supported()
1317 psp->xgmi_context.context.bin_desc.fw_version >= 0x2000000b) || in psp_xgmi_peer_link_info_supported()
1318 psp->adev->ip_versions[MP0_HWIP][0] >= IP_VERSION(13, 0, 6); in psp_xgmi_peer_link_info_supported()
1325 * TA holds bi-directional information, the driver would have to do
1333 uint64_t src_node_id = psp->adev->gmc.xgmi.node_id; in psp_xgmi_reflect_topology_info()
1338 hive = amdgpu_get_xgmi_hive(psp->adev); in psp_xgmi_reflect_topology_info()
1339 list_for_each_entry(mirror_adev, &hive->device_list, gmc.xgmi.head) { in psp_xgmi_reflect_topology_info()
1343 if (mirror_adev->gmc.xgmi.node_id != dst_node_id) in psp_xgmi_reflect_topology_info()
1346 mirror_top_info = &mirror_adev->psp.xgmi_context.top_info; in psp_xgmi_reflect_topology_info()
1347 for (j = 0; j < mirror_top_info->num_nodes; j++) { in psp_xgmi_reflect_topology_info()
1348 if (mirror_top_info->nodes[j].node_id != src_node_id) in psp_xgmi_reflect_topology_info()
1351 mirror_top_info->nodes[j].num_hops = dst_num_hops; in psp_xgmi_reflect_topology_info()
1353 * prevent 0 num_links value re-reflection since reflection in psp_xgmi_reflect_topology_info()
1358 mirror_top_info->nodes[j].num_links = dst_num_links; in psp_xgmi_reflect_topology_info()
1380 if (!topology || topology->num_nodes > TA_XGMI__MAX_CONNECTED_NODES) in psp_xgmi_get_topology_info()
1381 return -EINVAL; in psp_xgmi_get_topology_info()
1383 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_get_topology_info()
1385 xgmi_cmd->flag_extend_link_record = get_extended_data; in psp_xgmi_get_topology_info()
1388 topology_info_input = &xgmi_cmd->xgmi_in_message.get_topology_info; in psp_xgmi_get_topology_info()
1389 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_GET_TOPOLOGY_INFO; in psp_xgmi_get_topology_info()
1390 topology_info_input->num_nodes = number_devices; in psp_xgmi_get_topology_info()
1392 for (i = 0; i < topology_info_input->num_nodes; i++) { in psp_xgmi_get_topology_info()
1393 topology_info_input->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_get_topology_info()
1394 topology_info_input->nodes[i].num_hops = topology->nodes[i].num_hops; in psp_xgmi_get_topology_info()
1395 topology_info_input->nodes[i].is_sharing_enabled = topology->nodes[i].is_sharing_enabled; in psp_xgmi_get_topology_info()
1396 topology_info_input->nodes[i].sdma_engine = topology->nodes[i].sdma_engine; in psp_xgmi_get_topology_info()
1405 topology_info_output = &xgmi_cmd->xgmi_out_message.get_topology_info; in psp_xgmi_get_topology_info()
1406 topology->num_nodes = xgmi_cmd->xgmi_out_message.get_topology_info.num_nodes; in psp_xgmi_get_topology_info()
1407 for (i = 0; i < topology->num_nodes; i++) { in psp_xgmi_get_topology_info()
1408 /* extended data will either be 0 or equal to non-extended data */ in psp_xgmi_get_topology_info()
1409 if (topology_info_output->nodes[i].num_hops) in psp_xgmi_get_topology_info()
1410 topology->nodes[i].num_hops = topology_info_output->nodes[i].num_hops; in psp_xgmi_get_topology_info()
1412 /* non-extended data gets everything here so no need to update */ in psp_xgmi_get_topology_info()
1414 topology->nodes[i].node_id = topology_info_output->nodes[i].node_id; in psp_xgmi_get_topology_info()
1415 topology->nodes[i].is_sharing_enabled = in psp_xgmi_get_topology_info()
1416 topology_info_output->nodes[i].is_sharing_enabled; in psp_xgmi_get_topology_info()
1417 topology->nodes[i].sdma_engine = in psp_xgmi_get_topology_info()
1418 topology_info_output->nodes[i].sdma_engine; in psp_xgmi_get_topology_info()
1427 (psp->xgmi_context.supports_extended_data && get_extended_data) || in psp_xgmi_get_topology_info()
1428 psp->adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 6); in psp_xgmi_get_topology_info()
1430 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_PEER_LINKS; in psp_xgmi_get_topology_info()
1437 link_info_output = &xgmi_cmd->xgmi_out_message.get_link_info; in psp_xgmi_get_topology_info()
1438 for (i = 0; i < topology->num_nodes; i++) { in psp_xgmi_get_topology_info()
1440 topology->nodes[i].num_links = get_extended_data ? in psp_xgmi_get_topology_info()
1441 topology->nodes[i].num_links + in psp_xgmi_get_topology_info()
1442 link_info_output->nodes[i].num_links : in psp_xgmi_get_topology_info()
1443 ((requires_reflection && topology->nodes[i].num_links) ? topology->nodes[i].num_links : in psp_xgmi_get_topology_info()
1444 link_info_output->nodes[i].num_links); in psp_xgmi_get_topology_info()
1446 /* reflect the topology information for bi-directionality */ in psp_xgmi_get_topology_info()
1447 if (requires_reflection && topology->nodes[i].num_hops) in psp_xgmi_get_topology_info()
1448 psp_xgmi_reflect_topology_info(psp, topology->nodes[i]); in psp_xgmi_get_topology_info()
1463 if (!topology || topology->num_nodes > TA_XGMI__MAX_CONNECTED_NODES) in psp_xgmi_set_topology_info()
1464 return -EINVAL; in psp_xgmi_set_topology_info()
1466 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_set_topology_info()
1469 topology_info_input = &xgmi_cmd->xgmi_in_message.get_topology_info; in psp_xgmi_set_topology_info()
1470 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__SET_TOPOLOGY_INFO; in psp_xgmi_set_topology_info()
1471 topology_info_input->num_nodes = number_devices; in psp_xgmi_set_topology_info()
1473 for (i = 0; i < topology_info_input->num_nodes; i++) { in psp_xgmi_set_topology_info()
1474 topology_info_input->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_set_topology_info()
1475 topology_info_input->nodes[i].num_hops = topology->nodes[i].num_hops; in psp_xgmi_set_topology_info()
1476 topology_info_input->nodes[i].is_sharing_enabled = 1; in psp_xgmi_set_topology_info()
1477 topology_info_input->nodes[i].sdma_engine = topology->nodes[i].sdma_engine; in psp_xgmi_set_topology_info()
1488 (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_ta_check_status()
1490 switch (ras_cmd->ras_status) { in psp_ras_ta_check_status()
1492 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1496 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1502 if (ras_cmd->cmd_id == TA_RAS_COMMAND__TRIGGER_ERROR) in psp_ras_ta_check_status()
1503 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1507 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1508 "RAS WARNING: ras status = 0x%X\n", ras_cmd->ras_status); in psp_ras_ta_check_status()
1518 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_invoke()
1523 if (amdgpu_sriov_vf(psp->adev)) in psp_ras_invoke()
1526 ret = psp_ta_invoke(psp, ta_cmd_id, &psp->ras_context.context); in psp_ras_invoke()
1531 if (ras_cmd->if_version > RAS_TA_HOST_IF_VER) { in psp_ras_invoke()
1533 return -EINVAL; in psp_ras_invoke()
1537 if (ras_cmd->ras_out_message.flags.err_inject_switch_disable_flag) { in psp_ras_invoke()
1538 dev_warn(psp->adev->dev, "ECC switch disabled\n"); in psp_ras_invoke()
1540 ras_cmd->ras_status = TA_RAS_STATUS__ERROR_RAS_NOT_AVAILABLE; in psp_ras_invoke()
1541 } else if (ras_cmd->ras_out_message.flags.reg_access_failure_flag) in psp_ras_invoke()
1542 dev_warn(psp->adev->dev, in psp_ras_invoke()
1557 if (!psp->ras_context.context.initialized) in psp_ras_enable_features()
1558 return -EINVAL; in psp_ras_enable_features()
1560 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_enable_features()
1564 ras_cmd->cmd_id = TA_RAS_COMMAND__ENABLE_FEATURES; in psp_ras_enable_features()
1566 ras_cmd->cmd_id = TA_RAS_COMMAND__DISABLE_FEATURES; in psp_ras_enable_features()
1568 ras_cmd->ras_in_message = *info; in psp_ras_enable_features()
1570 ret = psp_ras_invoke(psp, ras_cmd->cmd_id); in psp_ras_enable_features()
1572 return -EINVAL; in psp_ras_enable_features()
1584 if (amdgpu_sriov_vf(psp->adev)) in psp_ras_terminate()
1587 if (!psp->ras_context.context.initialized) in psp_ras_terminate()
1590 ret = psp_ta_unload(psp, &psp->ras_context.context); in psp_ras_terminate()
1592 psp->ras_context.context.initialized = false; in psp_ras_terminate()
1601 struct amdgpu_device *adev = psp->adev; in psp_ras_initialize()
1610 if (!adev->psp.ras_context.context.bin_desc.size_bytes || in psp_ras_initialize()
1611 !adev->psp.ras_context.context.bin_desc.start_addr) { in psp_ras_initialize()
1612 dev_info(adev->dev, "RAS: optional ras ta ucode is not available\n"); in psp_ras_initialize()
1622 dev_warn(adev->dev, "PSP get boot config failed\n"); in psp_ras_initialize()
1624 if (!amdgpu_ras_is_supported(psp->adev, AMDGPU_RAS_BLOCK__UMC)) { in psp_ras_initialize()
1626 dev_info(adev->dev, "GECC is disabled\n"); in psp_ras_initialize()
1635 dev_warn(adev->dev, "PSP set boot config failed\n"); in psp_ras_initialize()
1637 …dev_warn(adev->dev, "GECC will be disabled in next boot cycle if set amdgpu_ras_enable and/or amdg… in psp_ras_initialize()
1641 dev_info(adev->dev, "GECC is enabled\n"); in psp_ras_initialize()
1649 dev_warn(adev->dev, "PSP set boot config failed\n"); in psp_ras_initialize()
1651 dev_warn(adev->dev, "GECC will be enabled in next boot cycle\n"); in psp_ras_initialize()
1656 psp->ras_context.context.mem_context.shared_mem_size = PSP_RAS_SHARED_MEM_SIZE; in psp_ras_initialize()
1657 psp->ras_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_ras_initialize()
1659 if (!psp->ras_context.context.mem_context.shared_buf) { in psp_ras_initialize()
1660 ret = psp_ta_init_shared_buf(psp, &psp->ras_context.context.mem_context); in psp_ras_initialize()
1665 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_initialize()
1669 ras_cmd->ras_in_message.init_flags.poison_mode_en = 1; in psp_ras_initialize()
1670 if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) in psp_ras_initialize()
1671 ras_cmd->ras_in_message.init_flags.dgpu_mode = 1; in psp_ras_initialize()
1672 ras_cmd->ras_in_message.init_flags.xcc_mask = in psp_ras_initialize()
1673 adev->gfx.xcc_mask; in psp_ras_initialize()
1674 ras_cmd->ras_in_message.init_flags.channel_dis_num = hweight32(adev->gmc.m_half_use) * 2; in psp_ras_initialize()
1676 ret = psp_ta_load(psp, &psp->ras_context.context); in psp_ras_initialize()
1678 if (!ret && !ras_cmd->ras_status) in psp_ras_initialize()
1679 psp->ras_context.context.initialized = true; in psp_ras_initialize()
1681 if (ras_cmd->ras_status) in psp_ras_initialize()
1682 dev_warn(psp->adev->dev, "RAS Init Status: 0x%X\n", ras_cmd->ras_status); in psp_ras_initialize()
1685 psp->ras_context.context.initialized = false; in psp_ras_initialize()
1695 struct amdgpu_device *adev = psp->adev; in psp_ras_trigger_error()
1699 if (!psp->ras_context.context.initialized) in psp_ras_trigger_error()
1700 return -EINVAL; in psp_ras_trigger_error()
1702 switch (info->block_id) { in psp_ras_trigger_error()
1721 info->sub_block_index |= dev_mask; in psp_ras_trigger_error()
1723 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_trigger_error()
1726 ras_cmd->cmd_id = TA_RAS_COMMAND__TRIGGER_ERROR; in psp_ras_trigger_error()
1727 ras_cmd->ras_in_message.trigger_error = *info; in psp_ras_trigger_error()
1729 ret = psp_ras_invoke(psp, ras_cmd->cmd_id); in psp_ras_trigger_error()
1731 return -EINVAL; in psp_ras_trigger_error()
1739 if (ras_cmd->ras_status == TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED) in psp_ras_trigger_error()
1740 return -EACCES; in psp_ras_trigger_error()
1741 else if (ras_cmd->ras_status) in psp_ras_trigger_error()
1742 return -EINVAL; in psp_ras_trigger_error()
1756 if (amdgpu_sriov_vf(psp->adev)) in psp_hdcp_initialize()
1759 if (!psp->hdcp_context.context.bin_desc.size_bytes || in psp_hdcp_initialize()
1760 !psp->hdcp_context.context.bin_desc.start_addr) { in psp_hdcp_initialize()
1761 dev_info(psp->adev->dev, "HDCP: optional hdcp ta ucode is not available\n"); in psp_hdcp_initialize()
1765 psp->hdcp_context.context.mem_context.shared_mem_size = PSP_HDCP_SHARED_MEM_SIZE; in psp_hdcp_initialize()
1766 psp->hdcp_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_hdcp_initialize()
1768 if (!psp->hdcp_context.context.mem_context.shared_buf) { in psp_hdcp_initialize()
1769 ret = psp_ta_init_shared_buf(psp, &psp->hdcp_context.context.mem_context); in psp_hdcp_initialize()
1774 ret = psp_ta_load(psp, &psp->hdcp_context.context); in psp_hdcp_initialize()
1776 psp->hdcp_context.context.initialized = true; in psp_hdcp_initialize()
1777 mutex_init(&psp->hdcp_context.mutex); in psp_hdcp_initialize()
1788 if (amdgpu_sriov_vf(psp->adev)) in psp_hdcp_invoke()
1791 return psp_ta_invoke(psp, ta_cmd_id, &psp->hdcp_context.context); in psp_hdcp_invoke()
1801 if (amdgpu_sriov_vf(psp->adev)) in psp_hdcp_terminate()
1804 if (!psp->hdcp_context.context.initialized) in psp_hdcp_terminate()
1807 ret = psp_ta_unload(psp, &psp->hdcp_context.context); in psp_hdcp_terminate()
1809 psp->hdcp_context.context.initialized = false; in psp_hdcp_terminate()
1823 if (amdgpu_sriov_vf(psp->adev)) in psp_dtm_initialize()
1826 if (!psp->dtm_context.context.bin_desc.size_bytes || in psp_dtm_initialize()
1827 !psp->dtm_context.context.bin_desc.start_addr) { in psp_dtm_initialize()
1828 dev_info(psp->adev->dev, "DTM: optional dtm ta ucode is not available\n"); in psp_dtm_initialize()
1832 psp->dtm_context.context.mem_context.shared_mem_size = PSP_DTM_SHARED_MEM_SIZE; in psp_dtm_initialize()
1833 psp->dtm_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_dtm_initialize()
1835 if (!psp->dtm_context.context.mem_context.shared_buf) { in psp_dtm_initialize()
1836 ret = psp_ta_init_shared_buf(psp, &psp->dtm_context.context.mem_context); in psp_dtm_initialize()
1841 ret = psp_ta_load(psp, &psp->dtm_context.context); in psp_dtm_initialize()
1843 psp->dtm_context.context.initialized = true; in psp_dtm_initialize()
1844 mutex_init(&psp->dtm_context.mutex); in psp_dtm_initialize()
1855 if (amdgpu_sriov_vf(psp->adev)) in psp_dtm_invoke()
1858 return psp_ta_invoke(psp, ta_cmd_id, &psp->dtm_context.context); in psp_dtm_invoke()
1868 if (amdgpu_sriov_vf(psp->adev)) in psp_dtm_terminate()
1871 if (!psp->dtm_context.context.initialized) in psp_dtm_terminate()
1874 ret = psp_ta_unload(psp, &psp->dtm_context.context); in psp_dtm_terminate()
1876 psp->dtm_context.context.initialized = false; in psp_dtm_terminate()
1891 if (amdgpu_sriov_vf(psp->adev)) in psp_rap_initialize()
1894 if (!psp->rap_context.context.bin_desc.size_bytes || in psp_rap_initialize()
1895 !psp->rap_context.context.bin_desc.start_addr) { in psp_rap_initialize()
1896 dev_info(psp->adev->dev, "RAP: optional rap ta ucode is not available\n"); in psp_rap_initialize()
1900 psp->rap_context.context.mem_context.shared_mem_size = PSP_RAP_SHARED_MEM_SIZE; in psp_rap_initialize()
1901 psp->rap_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_rap_initialize()
1903 if (!psp->rap_context.context.mem_context.shared_buf) { in psp_rap_initialize()
1904 ret = psp_ta_init_shared_buf(psp, &psp->rap_context.context.mem_context); in psp_rap_initialize()
1909 ret = psp_ta_load(psp, &psp->rap_context.context); in psp_rap_initialize()
1911 psp->rap_context.context.initialized = true; in psp_rap_initialize()
1912 mutex_init(&psp->rap_context.mutex); in psp_rap_initialize()
1920 psp_ta_free_shared_buf(&psp->rap_context.context.mem_context); in psp_rap_initialize()
1922 dev_warn(psp->adev->dev, "RAP TA initialize fail (%d) status %d.\n", in psp_rap_initialize()
1935 if (!psp->rap_context.context.initialized) in psp_rap_terminate()
1938 ret = psp_ta_unload(psp, &psp->rap_context.context); in psp_rap_terminate()
1940 psp->rap_context.context.initialized = false; in psp_rap_terminate()
1950 if (!psp->rap_context.context.initialized) in psp_rap_invoke()
1955 return -EINVAL; in psp_rap_invoke()
1957 mutex_lock(&psp->rap_context.mutex); in psp_rap_invoke()
1960 psp->rap_context.context.mem_context.shared_buf; in psp_rap_invoke()
1963 rap_cmd->cmd_id = ta_cmd_id; in psp_rap_invoke()
1964 rap_cmd->validation_method_id = METHOD_A; in psp_rap_invoke()
1966 ret = psp_ta_invoke(psp, rap_cmd->cmd_id, &psp->rap_context.context); in psp_rap_invoke()
1971 *status = rap_cmd->rap_status; in psp_rap_invoke()
1974 mutex_unlock(&psp->rap_context.mutex); in psp_rap_invoke()
1989 if (amdgpu_sriov_vf(psp->adev)) in psp_securedisplay_initialize()
1992 if (!psp->securedisplay_context.context.bin_desc.size_bytes || in psp_securedisplay_initialize()
1993 !psp->securedisplay_context.context.bin_desc.start_addr) { in psp_securedisplay_initialize()
1994 dev_info(psp->adev->dev, "SECUREDISPLAY: securedisplay ta ucode is not available\n"); in psp_securedisplay_initialize()
1998 psp->securedisplay_context.context.mem_context.shared_mem_size = in psp_securedisplay_initialize()
2000 psp->securedisplay_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_securedisplay_initialize()
2002 if (!psp->securedisplay_context.context.initialized) { in psp_securedisplay_initialize()
2004 &psp->securedisplay_context.context.mem_context); in psp_securedisplay_initialize()
2009 ret = psp_ta_load(psp, &psp->securedisplay_context.context); in psp_securedisplay_initialize()
2011 psp->securedisplay_context.context.initialized = true; in psp_securedisplay_initialize()
2012 mutex_init(&psp->securedisplay_context.mutex); in psp_securedisplay_initialize()
2016 mutex_lock(&psp->securedisplay_context.mutex); in psp_securedisplay_initialize()
2023 mutex_unlock(&psp->securedisplay_context.mutex); in psp_securedisplay_initialize()
2028 psp_ta_free_shared_buf(&psp->securedisplay_context.context.mem_context); in psp_securedisplay_initialize()
2029 dev_err(psp->adev->dev, "SECUREDISPLAY TA initialize fail.\n"); in psp_securedisplay_initialize()
2030 return -EINVAL; in psp_securedisplay_initialize()
2033 if (securedisplay_cmd->status != TA_SECUREDISPLAY_STATUS__SUCCESS) { in psp_securedisplay_initialize()
2034 psp_securedisplay_parse_resp_status(psp, securedisplay_cmd->status); in psp_securedisplay_initialize()
2035 dev_err(psp->adev->dev, "SECUREDISPLAY: query securedisplay TA failed. ret 0x%x\n", in psp_securedisplay_initialize()
2036 securedisplay_cmd->securedisplay_out_message.query_ta.query_cmd_ret); in psp_securedisplay_initialize()
2038 psp->securedisplay_context.context.bin_desc.size_bytes = 0; in psp_securedisplay_initialize()
2051 if (amdgpu_sriov_vf(psp->adev)) in psp_securedisplay_terminate()
2054 if (!psp->securedisplay_context.context.initialized) in psp_securedisplay_terminate()
2057 ret = psp_ta_unload(psp, &psp->securedisplay_context.context); in psp_securedisplay_terminate()
2059 psp->securedisplay_context.context.initialized = false; in psp_securedisplay_terminate()
2068 if (!psp->securedisplay_context.context.initialized) in psp_securedisplay_invoke()
2069 return -EINVAL; in psp_securedisplay_invoke()
2073 return -EINVAL; in psp_securedisplay_invoke()
2075 ret = psp_ta_invoke(psp, ta_cmd_id, &psp->securedisplay_context.context); in psp_securedisplay_invoke()
2083 struct psp_context *psp = &adev->psp; in amdgpu_psp_wait_for_bootloader()
2086 if (!amdgpu_sriov_vf(adev) && psp->funcs && psp->funcs->wait_for_bootloader != NULL) in amdgpu_psp_wait_for_bootloader()
2087 ret = psp->funcs->wait_for_bootloader(psp); in amdgpu_psp_wait_for_bootloader()
2094 struct amdgpu_device *adev = psp->adev; in psp_hw_start()
2098 if ((is_psp_fw_valid(psp->kdb)) && in psp_hw_start()
2099 (psp->funcs->bootloader_load_kdb != NULL)) { in psp_hw_start()
2107 if ((is_psp_fw_valid(psp->spl)) && in psp_hw_start()
2108 (psp->funcs->bootloader_load_spl != NULL)) { in psp_hw_start()
2116 if ((is_psp_fw_valid(psp->sys)) && in psp_hw_start()
2117 (psp->funcs->bootloader_load_sysdrv != NULL)) { in psp_hw_start()
2125 if ((is_psp_fw_valid(psp->soc_drv)) && in psp_hw_start()
2126 (psp->funcs->bootloader_load_soc_drv != NULL)) { in psp_hw_start()
2134 if ((is_psp_fw_valid(psp->intf_drv)) && in psp_hw_start()
2135 (psp->funcs->bootloader_load_intf_drv != NULL)) { in psp_hw_start()
2143 if ((is_psp_fw_valid(psp->dbg_drv)) && in psp_hw_start()
2144 (psp->funcs->bootloader_load_dbg_drv != NULL)) { in psp_hw_start()
2152 if ((is_psp_fw_valid(psp->ras_drv)) && in psp_hw_start()
2153 (psp->funcs->bootloader_load_ras_drv != NULL)) { in psp_hw_start()
2161 if ((is_psp_fw_valid(psp->sos)) && in psp_hw_start()
2162 (psp->funcs->bootloader_load_sos != NULL)) { in psp_hw_start()
2192 * loaded and before other non-psp firmware loaded. in psp_hw_start()
2194 if (psp->pmfw_centralized_cstate_management) { in psp_hw_start()
2212 switch (ucode->ucode_id) { in psp_get_fw_type()
2395 return -EINVAL; in psp_get_fw_type()
2404 struct amdgpu_device *adev = psp->adev; in psp_print_fw_hdr()
2407 switch (ucode->ucode_id) { in psp_print_fw_hdr()
2417 adev->sdma.instance[ucode->ucode_id - AMDGPU_UCODE_ID_SDMA0].fw->data; in psp_print_fw_hdr()
2421 hdr = (struct common_firmware_header *)adev->gfx.ce_fw->data; in psp_print_fw_hdr()
2425 hdr = (struct common_firmware_header *)adev->gfx.pfp_fw->data; in psp_print_fw_hdr()
2429 hdr = (struct common_firmware_header *)adev->gfx.me_fw->data; in psp_print_fw_hdr()
2433 hdr = (struct common_firmware_header *)adev->gfx.mec_fw->data; in psp_print_fw_hdr()
2437 hdr = (struct common_firmware_header *)adev->gfx.rlc_fw->data; in psp_print_fw_hdr()
2441 hdr = (struct common_firmware_header *)adev->pm.fw->data; in psp_print_fw_hdr()
2453 uint64_t fw_mem_mc_addr = ucode->mc_addr; in psp_prep_load_ip_fw_cmd_buf()
2455 cmd->cmd_id = GFX_CMD_ID_LOAD_IP_FW; in psp_prep_load_ip_fw_cmd_buf()
2456 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_lo = lower_32_bits(fw_mem_mc_addr); in psp_prep_load_ip_fw_cmd_buf()
2457 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_hi = upper_32_bits(fw_mem_mc_addr); in psp_prep_load_ip_fw_cmd_buf()
2458 cmd->cmd.cmd_load_ip_fw.fw_size = ucode->ucode_size; in psp_prep_load_ip_fw_cmd_buf()
2460 ret = psp_get_fw_type(ucode, &cmd->cmd.cmd_load_ip_fw.fw_type); in psp_prep_load_ip_fw_cmd_buf()
2462 DRM_ERROR("Unknown firmware type\n"); in psp_prep_load_ip_fw_cmd_buf()
2476 psp->fence_buf_mc_addr); in psp_execute_ip_fw_load()
2487 struct amdgpu_device *adev = psp->adev; in psp_load_smu_fw()
2489 &adev->firmware.ucode[AMDGPU_UCODE_ID_SMC]; in psp_load_smu_fw()
2490 struct amdgpu_ras *ras = psp->ras_context.ras; in psp_load_smu_fw()
2496 if (adev->in_runpm && (adev->pm.rpm_mode == AMDGPU_RUNPM_BACO)) in psp_load_smu_fw()
2499 if (!ucode->fw || amdgpu_sriov_vf(psp->adev)) in psp_load_smu_fw()
2503 ras && adev->ras_enabled && in psp_load_smu_fw()
2504 (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 4) || in psp_load_smu_fw()
2505 adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 2)))) { in psp_load_smu_fw()
2522 if (!ucode->fw || !ucode->ucode_size) in fw_load_skip_check()
2525 if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC && in fw_load_skip_check()
2527 psp->autoload_supported || in fw_load_skip_check()
2528 psp->pmfw_centralized_cstate_management)) in fw_load_skip_check()
2531 if (amdgpu_sriov_vf(psp->adev) && in fw_load_skip_check()
2532 amdgpu_virt_fw_load_skip_check(psp->adev, ucode->ucode_id)) in fw_load_skip_check()
2535 if (psp->autoload_supported && in fw_load_skip_check()
2536 (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1_JT || in fw_load_skip_check()
2537 ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2_JT)) in fw_load_skip_check()
2564 struct amdgpu_device *adev = psp->adev; in psp_load_non_psp_fw()
2566 if (psp->autoload_supported && in psp_load_non_psp_fw()
2567 !psp->pmfw_centralized_cstate_management) { in psp_load_non_psp_fw()
2573 for (i = 0; i < adev->firmware.max_ucodes; i++) { in psp_load_non_psp_fw()
2574 ucode = &adev->firmware.ucode[i]; in psp_load_non_psp_fw()
2576 if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC && in psp_load_non_psp_fw()
2587 if (psp->autoload_supported && in psp_load_non_psp_fw()
2588 (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 7) || in psp_load_non_psp_fw()
2589 adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 11) || in psp_load_non_psp_fw()
2590 adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 12)) && in psp_load_non_psp_fw()
2591 (ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1 || in psp_load_non_psp_fw()
2592 ucode->ucode_id == AMDGPU_UCODE_ID_SDMA2 || in psp_load_non_psp_fw()
2593 ucode->ucode_id == AMDGPU_UCODE_ID_SDMA3)) in psp_load_non_psp_fw()
2605 /* Start rlc autoload after psp recieved all the gfx firmware */ in psp_load_non_psp_fw()
2606 if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? in psp_load_non_psp_fw()
2607 adev->virt.autoload_ucode_id : AMDGPU_UCODE_ID_RLC_G)) { in psp_load_non_psp_fw()
2622 struct psp_context *psp = &adev->psp; in psp_load_fw()
2628 memset(psp->fence_buf, 0, PSP_FENCE_BUFFER_SIZE); in psp_load_fw()
2658 if (adev->gmc.xgmi.num_physical_nodes > 1) { in psp_load_fw()
2664 dev_err(psp->adev->dev, in psp_load_fw()
2669 if (psp->ta_fw) { in psp_load_fw()
2672 dev_err(psp->adev->dev, in psp_load_fw()
2677 dev_err(psp->adev->dev, in psp_load_fw()
2682 dev_err(psp->adev->dev, in psp_load_fw()
2687 dev_err(psp->adev->dev, in psp_load_fw()
2692 dev_err(psp->adev->dev, in psp_load_fw()
2704 * psp->cmd destory) are delayed to psp_hw_fini in psp_load_fw()
2715 mutex_lock(&adev->firmware.mutex); in psp_hw_init()
2726 DRM_ERROR("PSP firmware loading failed\n"); in psp_hw_init()
2730 mutex_unlock(&adev->firmware.mutex); in psp_hw_init()
2734 adev->firmware.load_type = AMDGPU_FW_LOAD_DIRECT; in psp_hw_init()
2735 mutex_unlock(&adev->firmware.mutex); in psp_hw_init()
2736 return -EINVAL; in psp_hw_init()
2742 struct psp_context *psp = &adev->psp; in psp_hw_fini()
2744 if (psp->ta_fw) { in psp_hw_fini()
2751 if (adev->gmc.xgmi.num_physical_nodes > 1) in psp_hw_fini()
2767 struct psp_context *psp = &adev->psp; in psp_suspend()
2769 if (adev->gmc.xgmi.num_physical_nodes > 1 && in psp_suspend()
2770 psp->xgmi_context.context.initialized) { in psp_suspend()
2778 if (psp->ta_fw) { in psp_suspend()
2830 struct psp_context *psp = &adev->psp; in psp_resume()
2834 if (psp->mem_train_ctx.enable_mem_training) { in psp_resume()
2842 mutex_lock(&adev->firmware.mutex); in psp_resume()
2860 dev_err(adev->dev, "PSP load RL failed!\n"); in psp_resume()
2864 if (adev->gmc.xgmi.num_physical_nodes > 1) { in psp_resume()
2870 dev_err(psp->adev->dev, in psp_resume()
2874 if (psp->ta_fw) { in psp_resume()
2877 dev_err(psp->adev->dev, in psp_resume()
2882 dev_err(psp->adev->dev, in psp_resume()
2887 dev_err(psp->adev->dev, in psp_resume()
2892 dev_err(psp->adev->dev, in psp_resume()
2897 dev_err(psp->adev->dev, in psp_resume()
2901 mutex_unlock(&adev->firmware.mutex); in psp_resume()
2907 mutex_unlock(&adev->firmware.mutex); in psp_resume()
2915 if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) in psp_gpu_reset()
2918 mutex_lock(&adev->psp.mutex); in psp_gpu_reset()
2919 ret = psp_mode1_reset(&adev->psp); in psp_gpu_reset()
2920 mutex_unlock(&adev->psp.mutex); in psp_gpu_reset()
2930 cmd->cmd_id = GFX_CMD_ID_AUTOLOAD_RLC; in psp_rlc_autoload_start()
2933 psp->fence_buf_mc_addr); in psp_rlc_autoload_start()
2947 struct psp_ring *ring = &psp->km_ring; in psp_ring_cmd_submit()
2948 struct psp_gfx_rb_frame *ring_buffer_start = ring->ring_mem; in psp_ring_cmd_submit()
2950 ring->ring_size / sizeof(struct psp_gfx_rb_frame) - 1; in psp_ring_cmd_submit()
2951 struct amdgpu_device *adev = psp->adev; in psp_ring_cmd_submit()
2952 uint32_t ring_size_dw = ring->ring_size / 4; in psp_ring_cmd_submit()
2970 return -EINVAL; in psp_ring_cmd_submit()
2977 write_frame->cmd_buf_addr_hi = upper_32_bits(cmd_buf_mc_addr); in psp_ring_cmd_submit()
2978 write_frame->cmd_buf_addr_lo = lower_32_bits(cmd_buf_mc_addr); in psp_ring_cmd_submit()
2979 write_frame->fence_addr_hi = upper_32_bits(fence_mc_addr); in psp_ring_cmd_submit()
2980 write_frame->fence_addr_lo = lower_32_bits(fence_mc_addr); in psp_ring_cmd_submit()
2981 write_frame->fence_value = index; in psp_ring_cmd_submit()
2992 struct amdgpu_device *adev = psp->adev; in psp_init_asd_microcode()
2998 err = amdgpu_ucode_request(adev, &adev->psp.asd_fw, fw_name); in psp_init_asd_microcode()
3002 asd_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.asd_fw->data; in psp_init_asd_microcode()
3003 adev->psp.asd_context.bin_desc.fw_version = le32_to_cpu(asd_hdr->header.ucode_version); in psp_init_asd_microcode()
3004 adev->psp.asd_context.bin_desc.feature_version = le32_to_cpu(asd_hdr->sos.fw_version); in psp_init_asd_microcode()
3005 adev->psp.asd_context.bin_desc.size_bytes = le32_to_cpu(asd_hdr->header.ucode_size_bytes); in psp_init_asd_microcode()
3006 adev->psp.asd_context.bin_desc.start_addr = (uint8_t *)asd_hdr + in psp_init_asd_microcode()
3007 le32_to_cpu(asd_hdr->header.ucode_array_offset_bytes); in psp_init_asd_microcode()
3010 amdgpu_ucode_release(&adev->psp.asd_fw); in psp_init_asd_microcode()
3016 struct amdgpu_device *adev = psp->adev; in psp_init_toc_microcode()
3022 err = amdgpu_ucode_request(adev, &adev->psp.toc_fw, fw_name); in psp_init_toc_microcode()
3026 toc_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.toc_fw->data; in psp_init_toc_microcode()
3027 adev->psp.toc.fw_version = le32_to_cpu(toc_hdr->header.ucode_version); in psp_init_toc_microcode()
3028 adev->psp.toc.feature_version = le32_to_cpu(toc_hdr->sos.fw_version); in psp_init_toc_microcode()
3029 adev->psp.toc.size_bytes = le32_to_cpu(toc_hdr->header.ucode_size_bytes); in psp_init_toc_microcode()
3030 adev->psp.toc.start_addr = (uint8_t *)toc_hdr + in psp_init_toc_microcode()
3031 le32_to_cpu(toc_hdr->header.ucode_array_offset_bytes); in psp_init_toc_microcode()
3034 amdgpu_ucode_release(&adev->psp.toc_fw); in psp_init_toc_microcode()
3045 return -EINVAL; in parse_sos_bin_descriptor()
3048 le32_to_cpu(desc->offset_bytes) + in parse_sos_bin_descriptor()
3049 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in parse_sos_bin_descriptor()
3051 switch (desc->fw_type) { in parse_sos_bin_descriptor()
3053 psp->sos.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3054 psp->sos.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3055 psp->sos.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3056 psp->sos.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3059 psp->sys.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3060 psp->sys.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3061 psp->sys.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3062 psp->sys.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3065 psp->kdb.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3066 psp->kdb.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3067 psp->kdb.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3068 psp->kdb.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3071 psp->toc.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3072 psp->toc.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3073 psp->toc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3074 psp->toc.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3077 psp->spl.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3078 psp->spl.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3079 psp->spl.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3080 psp->spl.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3083 psp->rl.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3084 psp->rl.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3085 psp->rl.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3086 psp->rl.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3089 psp->soc_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3090 psp->soc_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3091 psp->soc_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3092 psp->soc_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3095 psp->intf_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3096 psp->intf_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3097 psp->intf_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3098 psp->intf_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3101 psp->dbg_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3102 psp->dbg_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3103 psp->dbg_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3104 psp->dbg_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3107 psp->ras_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3108 psp->ras_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3109 psp->ras_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3110 psp->ras_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3113 dev_warn(psp->adev->dev, "Unsupported PSP FW type: %d\n", desc->fw_type); in parse_sos_bin_descriptor()
3126 sos_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.sos_fw->data; in psp_init_sos_base_fw()
3128 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in psp_init_sos_base_fw()
3130 if (adev->gmc.xgmi.connected_to_cpu || in psp_init_sos_base_fw()
3131 (adev->ip_versions[MP0_HWIP][0] != IP_VERSION(13, 0, 2))) { in psp_init_sos_base_fw()
3132 adev->psp.sos.fw_version = le32_to_cpu(sos_hdr->header.ucode_version); in psp_init_sos_base_fw()
3133 adev->psp.sos.feature_version = le32_to_cpu(sos_hdr->sos.fw_version); in psp_init_sos_base_fw()
3135 adev->psp.sys.size_bytes = le32_to_cpu(sos_hdr->sos.offset_bytes); in psp_init_sos_base_fw()
3136 adev->psp.sys.start_addr = ucode_array_start_addr; in psp_init_sos_base_fw()
3138 adev->psp.sos.size_bytes = le32_to_cpu(sos_hdr->sos.size_bytes); in psp_init_sos_base_fw()
3139 adev->psp.sos.start_addr = ucode_array_start_addr + in psp_init_sos_base_fw()
3140 le32_to_cpu(sos_hdr->sos.offset_bytes); in psp_init_sos_base_fw()
3143 sos_hdr_v1_3 = (const struct psp_firmware_header_v1_3 *)adev->psp.sos_fw->data; in psp_init_sos_base_fw()
3145 adev->psp.sos.fw_version = le32_to_cpu(sos_hdr_v1_3->sos_aux.fw_version); in psp_init_sos_base_fw()
3146 adev->psp.sos.feature_version = le32_to_cpu(sos_hdr_v1_3->sos_aux.fw_version); in psp_init_sos_base_fw()
3148 adev->psp.sys.size_bytes = le32_to_cpu(sos_hdr_v1_3->sys_drv_aux.size_bytes); in psp_init_sos_base_fw()
3149 adev->psp.sys.start_addr = ucode_array_start_addr + in psp_init_sos_base_fw()
3150 le32_to_cpu(sos_hdr_v1_3->sys_drv_aux.offset_bytes); in psp_init_sos_base_fw()
3152 adev->psp.sos.size_bytes = le32_to_cpu(sos_hdr_v1_3->sos_aux.size_bytes); in psp_init_sos_base_fw()
3153 adev->psp.sos.start_addr = ucode_array_start_addr + in psp_init_sos_base_fw()
3154 le32_to_cpu(sos_hdr_v1_3->sos_aux.offset_bytes); in psp_init_sos_base_fw()
3157 if ((adev->psp.sys.size_bytes == 0) || (adev->psp.sos.size_bytes == 0)) { in psp_init_sos_base_fw()
3158 dev_warn(adev->dev, "PSP SOS FW not available"); in psp_init_sos_base_fw()
3159 return -EINVAL; in psp_init_sos_base_fw()
3167 struct amdgpu_device *adev = psp->adev; in psp_init_sos_microcode()
3179 err = amdgpu_ucode_request(adev, &adev->psp.sos_fw, fw_name); in psp_init_sos_microcode()
3183 sos_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3185 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in psp_init_sos_microcode()
3186 amdgpu_ucode_print_psp_hdr(&sos_hdr->header); in psp_init_sos_microcode()
3188 switch (sos_hdr->header.header_version_major) { in psp_init_sos_microcode()
3194 if (sos_hdr->header.header_version_minor == 1) { in psp_init_sos_microcode()
3195 sos_hdr_v1_1 = (const struct psp_firmware_header_v1_1 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3196 adev->psp.toc.size_bytes = le32_to_cpu(sos_hdr_v1_1->toc.size_bytes); in psp_init_sos_microcode()
3197 adev->psp.toc.start_addr = (uint8_t *)adev->psp.sys.start_addr + in psp_init_sos_microcode()
3198 le32_to_cpu(sos_hdr_v1_1->toc.offset_bytes); in psp_init_sos_microcode()
3199 adev->psp.kdb.size_bytes = le32_to_cpu(sos_hdr_v1_1->kdb.size_bytes); in psp_init_sos_microcode()
3200 adev->psp.kdb.start_addr = (uint8_t *)adev->psp.sys.start_addr + in psp_init_sos_microcode()
3201 le32_to_cpu(sos_hdr_v1_1->kdb.offset_bytes); in psp_init_sos_microcode()
3203 if (sos_hdr->header.header_version_minor == 2) { in psp_init_sos_microcode()
3204 sos_hdr_v1_2 = (const struct psp_firmware_header_v1_2 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3205 adev->psp.kdb.size_bytes = le32_to_cpu(sos_hdr_v1_2->kdb.size_bytes); in psp_init_sos_microcode()
3206 adev->psp.kdb.start_addr = (uint8_t *)adev->psp.sys.start_addr + in psp_init_sos_microcode()
3207 le32_to_cpu(sos_hdr_v1_2->kdb.offset_bytes); in psp_init_sos_microcode()
3209 if (sos_hdr->header.header_version_minor == 3) { in psp_init_sos_microcode()
3210 sos_hdr_v1_3 = (const struct psp_firmware_header_v1_3 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3211 adev->psp.toc.size_bytes = le32_to_cpu(sos_hdr_v1_3->v1_1.toc.size_bytes); in psp_init_sos_microcode()
3212 adev->psp.toc.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3213 le32_to_cpu(sos_hdr_v1_3->v1_1.toc.offset_bytes); in psp_init_sos_microcode()
3214 adev->psp.kdb.size_bytes = le32_to_cpu(sos_hdr_v1_3->v1_1.kdb.size_bytes); in psp_init_sos_microcode()
3215 adev->psp.kdb.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3216 le32_to_cpu(sos_hdr_v1_3->v1_1.kdb.offset_bytes); in psp_init_sos_microcode()
3217 adev->psp.spl.size_bytes = le32_to_cpu(sos_hdr_v1_3->spl.size_bytes); in psp_init_sos_microcode()
3218 adev->psp.spl.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3219 le32_to_cpu(sos_hdr_v1_3->spl.offset_bytes); in psp_init_sos_microcode()
3220 adev->psp.rl.size_bytes = le32_to_cpu(sos_hdr_v1_3->rl.size_bytes); in psp_init_sos_microcode()
3221 adev->psp.rl.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3222 le32_to_cpu(sos_hdr_v1_3->rl.offset_bytes); in psp_init_sos_microcode()
3226 sos_hdr_v2_0 = (const struct psp_firmware_header_v2_0 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3228 if (le32_to_cpu(sos_hdr_v2_0->psp_fw_bin_count) >= UCODE_MAX_PSP_PACKAGING) { in psp_init_sos_microcode()
3229 dev_err(adev->dev, "packed SOS count exceeds maximum limit\n"); in psp_init_sos_microcode()
3230 err = -EINVAL; in psp_init_sos_microcode()
3234 for (fw_index = 0; fw_index < le32_to_cpu(sos_hdr_v2_0->psp_fw_bin_count); fw_index++) { in psp_init_sos_microcode()
3236 &sos_hdr_v2_0->psp_fw_bin[fw_index], in psp_init_sos_microcode()
3243 dev_err(adev->dev, in psp_init_sos_microcode()
3244 "unsupported psp sos firmware\n"); in psp_init_sos_microcode()
3245 err = -EINVAL; in psp_init_sos_microcode()
3251 amdgpu_ucode_release(&adev->psp.sos_fw); in psp_init_sos_microcode()
3263 return -EINVAL; in parse_ta_bin_descriptor()
3266 le32_to_cpu(desc->offset_bytes) + in parse_ta_bin_descriptor()
3267 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_bin_descriptor()
3269 switch (desc->fw_type) { in parse_ta_bin_descriptor()
3271 psp->asd_context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3272 psp->asd_context.bin_desc.feature_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3273 psp->asd_context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3274 psp->asd_context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3277 psp->xgmi_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3278 psp->xgmi_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3279 psp->xgmi_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3282 psp->ras_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3283 psp->ras_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3284 psp->ras_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3287 psp->hdcp_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3288 psp->hdcp_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3289 psp->hdcp_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3292 psp->dtm_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3293 psp->dtm_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3294 psp->dtm_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3297 psp->rap_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3298 psp->rap_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3299 psp->rap_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3302 psp->securedisplay_context.context.bin_desc.fw_version = in parse_ta_bin_descriptor()
3303 le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3304 psp->securedisplay_context.context.bin_desc.size_bytes = in parse_ta_bin_descriptor()
3305 le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3306 psp->securedisplay_context.context.bin_desc.start_addr = in parse_ta_bin_descriptor()
3310 dev_warn(psp->adev->dev, "Unsupported TA type: %d\n", desc->fw_type); in parse_ta_bin_descriptor()
3320 struct amdgpu_device *adev = psp->adev; in parse_ta_v1_microcode()
3322 ta_hdr = (const struct ta_firmware_header_v1_0 *) adev->psp.ta_fw->data; in parse_ta_v1_microcode()
3324 if (le16_to_cpu(ta_hdr->header.header_version_major) != 1) in parse_ta_v1_microcode()
3325 return -EINVAL; in parse_ta_v1_microcode()
3327 adev->psp.xgmi_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3328 le32_to_cpu(ta_hdr->xgmi.fw_version); in parse_ta_v1_microcode()
3329 adev->psp.xgmi_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3330 le32_to_cpu(ta_hdr->xgmi.size_bytes); in parse_ta_v1_microcode()
3331 adev->psp.xgmi_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3333 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_v1_microcode()
3335 adev->psp.ras_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3336 le32_to_cpu(ta_hdr->ras.fw_version); in parse_ta_v1_microcode()
3337 adev->psp.ras_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3338 le32_to_cpu(ta_hdr->ras.size_bytes); in parse_ta_v1_microcode()
3339 adev->psp.ras_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3340 (uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr + in parse_ta_v1_microcode()
3341 le32_to_cpu(ta_hdr->ras.offset_bytes); in parse_ta_v1_microcode()
3343 adev->psp.hdcp_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3344 le32_to_cpu(ta_hdr->hdcp.fw_version); in parse_ta_v1_microcode()
3345 adev->psp.hdcp_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3346 le32_to_cpu(ta_hdr->hdcp.size_bytes); in parse_ta_v1_microcode()
3347 adev->psp.hdcp_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3349 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_v1_microcode()
3351 adev->psp.dtm_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3352 le32_to_cpu(ta_hdr->dtm.fw_version); in parse_ta_v1_microcode()
3353 adev->psp.dtm_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3354 le32_to_cpu(ta_hdr->dtm.size_bytes); in parse_ta_v1_microcode()
3355 adev->psp.dtm_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3356 (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr + in parse_ta_v1_microcode()
3357 le32_to_cpu(ta_hdr->dtm.offset_bytes); in parse_ta_v1_microcode()
3359 adev->psp.securedisplay_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3360 le32_to_cpu(ta_hdr->securedisplay.fw_version); in parse_ta_v1_microcode()
3361 adev->psp.securedisplay_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3362 le32_to_cpu(ta_hdr->securedisplay.size_bytes); in parse_ta_v1_microcode()
3363 adev->psp.securedisplay_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3364 (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr + in parse_ta_v1_microcode()
3365 le32_to_cpu(ta_hdr->securedisplay.offset_bytes); in parse_ta_v1_microcode()
3367 adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version); in parse_ta_v1_microcode()
3375 struct amdgpu_device *adev = psp->adev; in parse_ta_v2_microcode()
3379 ta_hdr = (const struct ta_firmware_header_v2_0 *)adev->psp.ta_fw->data; in parse_ta_v2_microcode()
3381 if (le16_to_cpu(ta_hdr->header.header_version_major) != 2) in parse_ta_v2_microcode()
3382 return -EINVAL; in parse_ta_v2_microcode()
3384 if (le32_to_cpu(ta_hdr->ta_fw_bin_count) >= UCODE_MAX_PSP_PACKAGING) { in parse_ta_v2_microcode()
3385 dev_err(adev->dev, "packed TA count exceeds maximum limit\n"); in parse_ta_v2_microcode()
3386 return -EINVAL; in parse_ta_v2_microcode()
3389 for (ta_index = 0; ta_index < le32_to_cpu(ta_hdr->ta_fw_bin_count); ta_index++) { in parse_ta_v2_microcode()
3391 &ta_hdr->ta_fw_bin[ta_index], in parse_ta_v2_microcode()
3403 struct amdgpu_device *adev = psp->adev; in psp_init_ta_microcode()
3408 err = amdgpu_ucode_request(adev, &adev->psp.ta_fw, fw_name); in psp_init_ta_microcode()
3412 hdr = (const struct common_firmware_header *)adev->psp.ta_fw->data; in psp_init_ta_microcode()
3413 switch (le16_to_cpu(hdr->header_version_major)) { in psp_init_ta_microcode()
3421 dev_err(adev->dev, "unsupported TA header version\n"); in psp_init_ta_microcode()
3422 err = -EINVAL; in psp_init_ta_microcode()
3426 amdgpu_ucode_release(&adev->psp.ta_fw); in psp_init_ta_microcode()
3433 struct amdgpu_device *adev = psp->adev; in psp_init_cap_microcode()
3440 dev_err(adev->dev, "cap microcode should only be loaded under SRIOV\n"); in psp_init_cap_microcode()
3441 return -EINVAL; in psp_init_cap_microcode()
3445 err = amdgpu_ucode_request(adev, &adev->psp.cap_fw, fw_name); in psp_init_cap_microcode()
3447 if (err == -ENODEV) { in psp_init_cap_microcode()
3448 dev_warn(adev->dev, "cap microcode does not exist, skip\n"); in psp_init_cap_microcode()
3452 dev_err(adev->dev, "fail to initialize cap microcode\n"); in psp_init_cap_microcode()
3455 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CAP]; in psp_init_cap_microcode()
3456 info->ucode_id = AMDGPU_UCODE_ID_CAP; in psp_init_cap_microcode()
3457 info->fw = adev->psp.cap_fw; in psp_init_cap_microcode()
3459 adev->psp.cap_fw->data; in psp_init_cap_microcode()
3460 adev->firmware.fw_size += ALIGN( in psp_init_cap_microcode()
3461 le32_to_cpu(cap_hdr_v1_0->header.ucode_size_bytes), PAGE_SIZE); in psp_init_cap_microcode()
3462 adev->psp.cap_fw_version = le32_to_cpu(cap_hdr_v1_0->header.ucode_version); in psp_init_cap_microcode()
3463 adev->psp.cap_feature_version = le32_to_cpu(cap_hdr_v1_0->sos.fw_version); in psp_init_cap_microcode()
3464 adev->psp.cap_ucode_size = le32_to_cpu(cap_hdr_v1_0->header.ucode_size_bytes); in psp_init_cap_microcode()
3469 amdgpu_ucode_release(&adev->psp.cap_fw); in psp_init_cap_microcode()
3494 if (!adev->ip_blocks[AMD_IP_BLOCK_TYPE_PSP].status.late_initialized) { in psp_usbc_pd_fw_sysfs_read()
3496 return -EBUSY; in psp_usbc_pd_fw_sysfs_read()
3499 mutex_lock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_read()
3500 ret = psp_read_usbc_pd_fw(&adev->psp, &fw_ver); in psp_usbc_pd_fw_sysfs_read()
3501 mutex_unlock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_read()
3520 const struct firmware *usbc_pd_fw; in psp_usbc_pd_fw_sysfs_write()
3525 if (!adev->ip_blocks[AMD_IP_BLOCK_TYPE_PSP].status.late_initialized) { in psp_usbc_pd_fw_sysfs_write()
3527 return -EBUSY; in psp_usbc_pd_fw_sysfs_write()
3531 return -ENODEV; in psp_usbc_pd_fw_sysfs_write()
3534 ret = request_firmware(&usbc_pd_fw, fw_name, adev->dev); in psp_usbc_pd_fw_sysfs_write()
3539 ret = amdgpu_bo_create_kernel(adev, usbc_pd_fw->size, 0x100000, in psp_usbc_pd_fw_sysfs_write()
3547 memcpy_toio(fw_pri_cpu_addr, usbc_pd_fw->data, usbc_pd_fw->size); in psp_usbc_pd_fw_sysfs_write()
3549 mutex_lock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_write()
3550 ret = psp_load_usbc_pd_fw(&adev->psp, fw_pri_mc_addr); in psp_usbc_pd_fw_sysfs_write()
3551 mutex_unlock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_write()
3571 if (!drm_dev_enter(adev_to_drm(psp->adev), &idx)) in psp_copy_fw()
3574 memset(psp->fw_pri_buf, 0, PSP_1_MEG); in psp_copy_fw()
3575 memcpy(psp->fw_pri_buf, start_addr, bin_size); in psp_copy_fw()
3582 * Reading from this file will retrieve the USB-C PD firmware version. Writing to
3602 adev->psp.vbflash_done = false; in amdgpu_psp_vbflash_write()
3605 if (adev->psp.vbflash_image_size > AMD_VBIOS_FILE_MAX_SIZE_B) { in amdgpu_psp_vbflash_write()
3606 dev_err(adev->dev, "File size cannot exceed %u", AMD_VBIOS_FILE_MAX_SIZE_B); in amdgpu_psp_vbflash_write()
3607 kvfree(adev->psp.vbflash_tmp_buf); in amdgpu_psp_vbflash_write()
3608 adev->psp.vbflash_tmp_buf = NULL; in amdgpu_psp_vbflash_write()
3609 adev->psp.vbflash_image_size = 0; in amdgpu_psp_vbflash_write()
3610 return -ENOMEM; in amdgpu_psp_vbflash_write()
3614 if (!adev->psp.vbflash_tmp_buf) { in amdgpu_psp_vbflash_write()
3615 adev->psp.vbflash_tmp_buf = kvmalloc(AMD_VBIOS_FILE_MAX_SIZE_B, GFP_KERNEL); in amdgpu_psp_vbflash_write()
3616 if (!adev->psp.vbflash_tmp_buf) in amdgpu_psp_vbflash_write()
3617 return -ENOMEM; in amdgpu_psp_vbflash_write()
3620 mutex_lock(&adev->psp.mutex); in amdgpu_psp_vbflash_write()
3621 memcpy(adev->psp.vbflash_tmp_buf + pos, buffer, count); in amdgpu_psp_vbflash_write()
3622 adev->psp.vbflash_image_size += count; in amdgpu_psp_vbflash_write()
3623 mutex_unlock(&adev->psp.mutex); in amdgpu_psp_vbflash_write()
3625 dev_dbg(adev->dev, "IFWI staged for update"); in amdgpu_psp_vbflash_write()
3642 if (adev->psp.vbflash_image_size == 0) in amdgpu_psp_vbflash_read()
3643 return -EINVAL; in amdgpu_psp_vbflash_read()
3645 dev_dbg(adev->dev, "PSP IFWI flash process initiated"); in amdgpu_psp_vbflash_read()
3647 ret = amdgpu_bo_create_kernel(adev, adev->psp.vbflash_image_size, in amdgpu_psp_vbflash_read()
3656 memcpy_toio(fw_pri_cpu_addr, adev->psp.vbflash_tmp_buf, adev->psp.vbflash_image_size); in amdgpu_psp_vbflash_read()
3658 mutex_lock(&adev->psp.mutex); in amdgpu_psp_vbflash_read()
3659 ret = psp_update_spirom(&adev->psp, fw_pri_mc_addr); in amdgpu_psp_vbflash_read()
3660 mutex_unlock(&adev->psp.mutex); in amdgpu_psp_vbflash_read()
3665 kvfree(adev->psp.vbflash_tmp_buf); in amdgpu_psp_vbflash_read()
3666 adev->psp.vbflash_tmp_buf = NULL; in amdgpu_psp_vbflash_read()
3667 adev->psp.vbflash_image_size = 0; in amdgpu_psp_vbflash_read()
3670 dev_err(adev->dev, "Failed to load IFWI, err = %d", ret); in amdgpu_psp_vbflash_read()
3674 dev_dbg(adev->dev, "PSP IFWI flash process done"); in amdgpu_psp_vbflash_read()
3704 vbflash_status = psp_vbflash_status(&adev->psp); in amdgpu_psp_vbflash_status()
3705 if (!adev->psp.vbflash_done) in amdgpu_psp_vbflash_status()
3707 else if (adev->psp.vbflash_done && !(vbflash_status & 0x80000000)) in amdgpu_psp_vbflash_status()
3732 return adev->psp.sup_pd_fw_up ? 0660 : 0; in amdgpu_flash_attr_is_visible()
3734 return adev->psp.sup_ifwi_up ? 0440 : 0; in amdgpu_flash_attr_is_visible()
3745 return adev->psp.sup_ifwi_up ? 0660 : 0; in amdgpu_bin_flash_attr_is_visible()