760 	struct mes_misc_op_input op_input;  in amdgpu_mes_rreg()  local
763 	op_input.op = MES_MISC_OP_READ_REG;  in amdgpu_mes_rreg()
764 	op_input.read_reg.reg_offset = reg;  in amdgpu_mes_rreg()
765 	op_input.read_reg.buffer_addr = adev->mes.read_val_gpu_addr;  in amdgpu_mes_rreg()
772 	r = adev->mes.funcs->misc_op(&adev->mes, &op_input);  in amdgpu_mes_rreg()
785 	struct mes_misc_op_input op_input;  in amdgpu_mes_wreg()  local
788 	op_input.op = MES_MISC_OP_WRITE_REG;  in amdgpu_mes_wreg()
789 	op_input.write_reg.reg_offset = reg;  in amdgpu_mes_wreg()
790 	op_input.write_reg.reg_value = val;  in amdgpu_mes_wreg()
798 	r = adev->mes.funcs->misc_op(&adev->mes, &op_input);  in amdgpu_mes_wreg()
810 	struct mes_misc_op_input op_input;  in amdgpu_mes_reg_write_reg_wait()  local
813 	op_input.op = MES_MISC_OP_WRM_REG_WR_WAIT;  in amdgpu_mes_reg_write_reg_wait()
814 	op_input.wrm_reg.reg0 = reg0;  in amdgpu_mes_reg_write_reg_wait()
815 	op_input.wrm_reg.reg1 = reg1;  in amdgpu_mes_reg_write_reg_wait()
816 	op_input.wrm_reg.ref = ref;  in amdgpu_mes_reg_write_reg_wait()
817 	op_input.wrm_reg.mask = mask;  in amdgpu_mes_reg_write_reg_wait()
825 	r = adev->mes.funcs->misc_op(&adev->mes, &op_input);  in amdgpu_mes_reg_write_reg_wait()
836 	struct mes_misc_op_input op_input;  in amdgpu_mes_reg_wait()  local
839 	op_input.op = MES_MISC_OP_WRM_REG_WAIT;  in amdgpu_mes_reg_wait()
840 	op_input.wrm_reg.reg0 = reg;  in amdgpu_mes_reg_wait()
841 	op_input.wrm_reg.ref = val;  in amdgpu_mes_reg_wait()
842 	op_input.wrm_reg.mask = mask;  in amdgpu_mes_reg_wait()
850 	r = adev->mes.funcs->misc_op(&adev->mes, &op_input);  in amdgpu_mes_reg_wait()
865 	struct mes_misc_op_input op_input = {0};  in amdgpu_mes_set_shader_debugger()  local
873 	op_input.op = MES_MISC_OP_SET_SHADER_DEBUGGER;  in amdgpu_mes_set_shader_debugger()
874 	op_input.set_shader_debugger.process_context_addr = process_context_addr;  in amdgpu_mes_set_shader_debugger()
875 	op_input.set_shader_debugger.flags.u32all = flags;  in amdgpu_mes_set_shader_debugger()
876 	op_input.set_shader_debugger.spi_gdbg_per_vmid_cntl = spi_gdbg_per_vmid_cntl;  in amdgpu_mes_set_shader_debugger()
877 	memcpy(op_input.set_shader_debugger.tcp_watch_cntl, tcp_watch_cntl,  in amdgpu_mes_set_shader_debugger()
878 			sizeof(op_input.set_shader_debugger.tcp_watch_cntl));  in amdgpu_mes_set_shader_debugger()
882 		op_input.set_shader_debugger.trap_en = trap_en;  in amdgpu_mes_set_shader_debugger()
886 	r = adev->mes.funcs->misc_op(&adev->mes, &op_input);  in amdgpu_mes_set_shader_debugger()