Lines Matching refs:mes
47 struct amdgpu_mes *mes = &adev->mes; in amdgpu_mes_kernel_doorbell_get() local
54 found = find_next_zero_bit(mes->doorbell_bitmap, mes->num_mes_dbs, offset); in amdgpu_mes_kernel_doorbell_get()
55 if (found >= mes->num_mes_dbs) { in amdgpu_mes_kernel_doorbell_get()
60 set_bit(found, mes->doorbell_bitmap); in amdgpu_mes_kernel_doorbell_get()
63 *doorbell_index = mes->db_start_dw_offset + found * 2; in amdgpu_mes_kernel_doorbell_get()
72 struct amdgpu_mes *mes = &adev->mes; in amdgpu_mes_kernel_doorbell_free() local
75 rel_index = (doorbell_index - mes->db_start_dw_offset) / 2; in amdgpu_mes_kernel_doorbell_free()
76 old = test_and_clear_bit(rel_index, mes->doorbell_bitmap); in amdgpu_mes_kernel_doorbell_free()
83 struct amdgpu_mes *mes = &adev->mes; in amdgpu_mes_doorbell_init() local
86 mes->doorbell_bitmap = bitmap_zalloc(PAGE_SIZE / sizeof(u32), GFP_KERNEL); in amdgpu_mes_doorbell_init()
87 if (!mes->doorbell_bitmap) { in amdgpu_mes_doorbell_init()
92 mes->num_mes_dbs = PAGE_SIZE / AMDGPU_ONE_DOORBELL_SIZE; in amdgpu_mes_doorbell_init()
94 adev->mes.aggregated_doorbells[i] = mes->db_start_dw_offset + i * 2; in amdgpu_mes_doorbell_init()
95 set_bit(i, mes->doorbell_bitmap); in amdgpu_mes_doorbell_init()
103 bitmap_free(adev->mes.doorbell_bitmap); in amdgpu_mes_doorbell_free()
110 adev->mes.adev = adev; in amdgpu_mes_init()
112 idr_init(&adev->mes.pasid_idr); in amdgpu_mes_init()
113 idr_init(&adev->mes.gang_id_idr); in amdgpu_mes_init()
114 idr_init(&adev->mes.queue_id_idr); in amdgpu_mes_init()
115 ida_init(&adev->mes.doorbell_ida); in amdgpu_mes_init()
116 spin_lock_init(&adev->mes.queue_id_lock); in amdgpu_mes_init()
117 spin_lock_init(&adev->mes.ring_lock); in amdgpu_mes_init()
118 mutex_init(&adev->mes.mutex_hidden); in amdgpu_mes_init()
120 adev->mes.total_max_queue = AMDGPU_FENCE_MES_QUEUE_ID_MASK; in amdgpu_mes_init()
121 adev->mes.vmid_mask_mmhub = 0xffffff00; in amdgpu_mes_init()
122 adev->mes.vmid_mask_gfxhub = 0xffffff00; in amdgpu_mes_init()
128 adev->mes.compute_hqd_mask[i] = 0xc; in amdgpu_mes_init()
132 adev->mes.gfx_hqd_mask[i] = i ? 0 : 0xfffffffe; in amdgpu_mes_init()
136 adev->mes.sdma_hqd_mask[i] = i ? 0 : 0x3fc; in amdgpu_mes_init()
139 adev->mes.sdma_hqd_mask[i] = i ? 0 : 0xfc; in amdgpu_mes_init()
141 adev->mes.sdma_hqd_mask[i] = 0xfc; in amdgpu_mes_init()
144 r = amdgpu_device_wb_get(adev, &adev->mes.sch_ctx_offs); in amdgpu_mes_init()
150 adev->mes.sch_ctx_gpu_addr = in amdgpu_mes_init()
151 adev->wb.gpu_addr + (adev->mes.sch_ctx_offs * 4); in amdgpu_mes_init()
152 adev->mes.sch_ctx_ptr = in amdgpu_mes_init()
153 (uint64_t *)&adev->wb.wb[adev->mes.sch_ctx_offs]; in amdgpu_mes_init()
155 r = amdgpu_device_wb_get(adev, &adev->mes.query_status_fence_offs); in amdgpu_mes_init()
157 amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs); in amdgpu_mes_init()
162 adev->mes.query_status_fence_gpu_addr = in amdgpu_mes_init()
163 adev->wb.gpu_addr + (adev->mes.query_status_fence_offs * 4); in amdgpu_mes_init()
164 adev->mes.query_status_fence_ptr = in amdgpu_mes_init()
165 (uint64_t *)&adev->wb.wb[adev->mes.query_status_fence_offs]; in amdgpu_mes_init()
167 r = amdgpu_device_wb_get(adev, &adev->mes.read_val_offs); in amdgpu_mes_init()
169 amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs); in amdgpu_mes_init()
170 amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs); in amdgpu_mes_init()
175 adev->mes.read_val_gpu_addr = in amdgpu_mes_init()
176 adev->wb.gpu_addr + (adev->mes.read_val_offs * 4); in amdgpu_mes_init()
177 adev->mes.read_val_ptr = in amdgpu_mes_init()
178 (uint32_t *)&adev->wb.wb[adev->mes.read_val_offs]; in amdgpu_mes_init()
187 amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs); in amdgpu_mes_init()
188 amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs); in amdgpu_mes_init()
189 amdgpu_device_wb_free(adev, adev->mes.read_val_offs); in amdgpu_mes_init()
191 idr_destroy(&adev->mes.pasid_idr); in amdgpu_mes_init()
192 idr_destroy(&adev->mes.gang_id_idr); in amdgpu_mes_init()
193 idr_destroy(&adev->mes.queue_id_idr); in amdgpu_mes_init()
194 ida_destroy(&adev->mes.doorbell_ida); in amdgpu_mes_init()
195 mutex_destroy(&adev->mes.mutex_hidden); in amdgpu_mes_init()
201 amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs); in amdgpu_mes_fini()
202 amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs); in amdgpu_mes_fini()
203 amdgpu_device_wb_free(adev, adev->mes.read_val_offs); in amdgpu_mes_fini()
206 idr_destroy(&adev->mes.pasid_idr); in amdgpu_mes_fini()
207 idr_destroy(&adev->mes.gang_id_idr); in amdgpu_mes_fini()
208 idr_destroy(&adev->mes.queue_id_idr); in amdgpu_mes_fini()
209 ida_destroy(&adev->mes.doorbell_ida); in amdgpu_mes_fini()
210 mutex_destroy(&adev->mes.mutex_hidden); in amdgpu_mes_fini()
249 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_create_process()
252 r = idr_alloc(&adev->mes.pasid_idr, process, pasid, pasid + 1, in amdgpu_mes_create_process()
262 process->process_quantum = adev->mes.default_process_quantum; in amdgpu_mes_create_process()
265 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_create_process()
269 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_create_process()
291 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_destroy_process()
293 process = idr_find(&adev->mes.pasid_idr, pasid); in amdgpu_mes_destroy_process()
296 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_destroy_process()
303 spin_lock_irqsave(&adev->mes.queue_id_lock, flags); in amdgpu_mes_destroy_process()
304 idr_remove(&adev->mes.queue_id_idr, queue->queue_id); in amdgpu_mes_destroy_process()
305 spin_unlock_irqrestore(&adev->mes.queue_id_lock, flags); in amdgpu_mes_destroy_process()
310 r = adev->mes.funcs->remove_hw_queue(&adev->mes, in amdgpu_mes_destroy_process()
316 idr_remove(&adev->mes.gang_id_idr, gang->gang_id); in amdgpu_mes_destroy_process()
319 idr_remove(&adev->mes.pasid_idr, pasid); in amdgpu_mes_destroy_process()
320 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_destroy_process()
373 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_add_gang()
375 process = idr_find(&adev->mes.pasid_idr, pasid); in amdgpu_mes_add_gang()
383 r = idr_alloc(&adev->mes.gang_id_idr, gang, 1, 0, in amdgpu_mes_add_gang()
397 gprops->gang_quantum : adev->mes.default_gang_quantum; in amdgpu_mes_add_gang()
402 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_add_gang()
406 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_add_gang()
423 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_remove_gang()
425 gang = idr_find(&adev->mes.gang_id_idr, gang_id); in amdgpu_mes_remove_gang()
428 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_remove_gang()
434 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_remove_gang()
438 idr_remove(&adev->mes.gang_id_idr, gang->gang_id); in amdgpu_mes_remove_gang()
440 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_remove_gang()
463 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_suspend()
465 idp = &adev->mes.pasid_idr; in amdgpu_mes_suspend()
469 r = adev->mes.funcs->suspend_gang(&adev->mes, &input); in amdgpu_mes_suspend()
476 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_suspend()
492 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_resume()
494 idp = &adev->mes.pasid_idr; in amdgpu_mes_resume()
498 r = adev->mes.funcs->resume_gang(&adev->mes, &input); in amdgpu_mes_resume()
505 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_resume()
592 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_add_hw_queue()
594 gang = idr_find(&adev->mes.gang_id_idr, gang_id); in amdgpu_mes_add_hw_queue()
602 spin_lock_irqsave(&adev->mes.queue_id_lock, flags); in amdgpu_mes_add_hw_queue()
603 r = idr_alloc(&adev->mes.queue_id_idr, queue, 1, 0, in amdgpu_mes_add_hw_queue()
606 spin_unlock_irqrestore(&adev->mes.queue_id_lock, flags); in amdgpu_mes_add_hw_queue()
609 spin_unlock_irqrestore(&adev->mes.queue_id_lock, flags); in amdgpu_mes_add_hw_queue()
646 r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input); in amdgpu_mes_add_hw_queue()
667 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_add_hw_queue()
674 spin_lock_irqsave(&adev->mes.queue_id_lock, flags); in amdgpu_mes_add_hw_queue()
675 idr_remove(&adev->mes.queue_id_idr, queue->queue_id); in amdgpu_mes_add_hw_queue()
676 spin_unlock_irqrestore(&adev->mes.queue_id_lock, flags); in amdgpu_mes_add_hw_queue()
678 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_add_hw_queue()
697 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_remove_hw_queue()
700 spin_lock_irqsave(&adev->mes.queue_id_lock, flags); in amdgpu_mes_remove_hw_queue()
702 queue = idr_find(&adev->mes.queue_id_idr, queue_id); in amdgpu_mes_remove_hw_queue()
704 spin_unlock_irqrestore(&adev->mes.queue_id_lock, flags); in amdgpu_mes_remove_hw_queue()
705 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_remove_hw_queue()
710 idr_remove(&adev->mes.queue_id_idr, queue_id); in amdgpu_mes_remove_hw_queue()
711 spin_unlock_irqrestore(&adev->mes.queue_id_lock, flags); in amdgpu_mes_remove_hw_queue()
720 r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input); in amdgpu_mes_remove_hw_queue()
728 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_remove_hw_queue()
751 r = adev->mes.funcs->unmap_legacy_queue(&adev->mes, &queue_input); in amdgpu_mes_unmap_legacy_queue()
765 op_input.read_reg.buffer_addr = adev->mes.read_val_gpu_addr; in amdgpu_mes_rreg()
767 if (!adev->mes.funcs->misc_op) { in amdgpu_mes_rreg()
772 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_rreg()
776 val = *(adev->mes.read_val_ptr); in amdgpu_mes_rreg()
792 if (!adev->mes.funcs->misc_op) { in amdgpu_mes_wreg()
798 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_wreg()
819 if (!adev->mes.funcs->misc_op) { in amdgpu_mes_reg_write_reg_wait()
825 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_reg_write_reg_wait()
844 if (!adev->mes.funcs->misc_op) { in amdgpu_mes_reg_wait()
850 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_reg_wait()
868 if (!adev->mes.funcs->misc_op) { in amdgpu_mes_set_shader_debugger()
880 if (((adev->mes.sched_version & AMDGPU_MES_API_VERSION_MASK) >> in amdgpu_mes_set_shader_debugger()
884 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_set_shader_debugger()
886 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_set_shader_debugger()
890 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_set_shader_debugger()
964 amdgpu_mes_lock(&adev->mes); in amdgpu_mes_add_ring()
965 gang = idr_find(&adev->mes.gang_id_idr, gang_id); in amdgpu_mes_add_ring()
968 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_add_ring()
975 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_add_ring()
1016 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_add_ring()
1043 amdgpu_mes_unlock(&adev->mes); in amdgpu_mes_add_ring()
1061 return adev->mes.aggregated_doorbells[prio]; in amdgpu_mes_get_aggregated_doorbell_index()
1234 gprops.gang_quantum = adev->mes.default_gang_quantum; in amdgpu_mes_test_create_gang_and_queues()
1411 r = amdgpu_ucode_request(adev, &adev->mes.fw[pipe], fw_name); in amdgpu_mes_init_microcode()
1416 r = amdgpu_ucode_request(adev, &adev->mes.fw[pipe], in amdgpu_mes_init_microcode()
1424 adev->mes.fw[pipe]->data; in amdgpu_mes_init_microcode()
1425 adev->mes.uc_start_addr[pipe] = in amdgpu_mes_init_microcode()
1428 adev->mes.data_start_addr[pipe] = in amdgpu_mes_init_microcode()
1445 info->fw = adev->mes.fw[pipe]; in amdgpu_mes_init_microcode()
1452 info->fw = adev->mes.fw[pipe]; in amdgpu_mes_init_microcode()
1460 amdgpu_ucode_release(&adev->mes.fw[pipe]); in amdgpu_mes_init_microcode()