52 	u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes;  in amdgpu_gmc_pdb0_alloc()
53 	uint32_t pde0_page_shift = adev->gmc.vmid0_page_table_block_size + 21;  in amdgpu_gmc_pdb0_alloc()
66 	r = amdgpu_bo_create(adev, &bp, &adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
70 	r = amdgpu_bo_reserve(adev->gmc.pdb0_bo, false);  in amdgpu_gmc_pdb0_alloc()
74 	r = amdgpu_bo_pin(adev->gmc.pdb0_bo, AMDGPU_GEM_DOMAIN_VRAM);  in amdgpu_gmc_pdb0_alloc()
77 	r = amdgpu_bo_kmap(adev->gmc.pdb0_bo, &adev->gmc.ptr_pdb0);  in amdgpu_gmc_pdb0_alloc()
81 	amdgpu_bo_unreserve(adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
85 	amdgpu_bo_unpin(adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
87 	amdgpu_bo_unreserve(adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
89 	amdgpu_bo_unref(&adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
186 	if (bo->ttm->dma_address[0] + PAGE_SIZE >= adev->gmc.agp_size)  in amdgpu_gmc_agp_addr()
189 	return adev->gmc.agp_start + bo->ttm->dma_address[0];  in amdgpu_gmc_agp_addr()
276 	u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_GMC_HOLE_START - 1);  in amdgpu_gmc_gart_location()
377 	struct amdgpu_gmc *gmc = &adev->gmc;  in amdgpu_gmc_filter_faults()  local
389 	if (gmc->fault_ring[gmc->last_fault].timestamp >= stamp)  in amdgpu_gmc_filter_faults()
394 	fault = &gmc->fault_ring[gmc->fault_hash[hash].idx];  in amdgpu_gmc_filter_faults()
415 		fault = &gmc->fault_ring[fault->next];  in amdgpu_gmc_filter_faults()
423 	fault = &gmc->fault_ring[gmc->last_fault];  in amdgpu_gmc_filter_faults()
428 	fault->next = gmc->fault_hash[hash].idx;  in amdgpu_gmc_filter_faults()
429 	gmc->fault_hash[hash].idx = gmc->last_fault++;  in amdgpu_gmc_filter_faults()
446 	struct amdgpu_gmc *gmc = &adev->gmc;  in amdgpu_gmc_filter_faults_remove()  local
464 	fault = &gmc->fault_ring[gmc->fault_hash[hash].idx];  in amdgpu_gmc_filter_faults_remove()
476 		fault = &gmc->fault_ring[fault->next];  in amdgpu_gmc_filter_faults_remove()
598 			adev->gmc.tmz_enabled = false;  in amdgpu_gmc_tmz_set()
602 			adev->gmc.tmz_enabled = true;  in amdgpu_gmc_tmz_set()
624 			adev->gmc.tmz_enabled = false;  in amdgpu_gmc_tmz_set()
628 			adev->gmc.tmz_enabled = true;  in amdgpu_gmc_tmz_set()
634 		adev->gmc.tmz_enabled = false;  in amdgpu_gmc_tmz_set()
650 	struct amdgpu_gmc *gmc = &adev->gmc;  in amdgpu_gmc_noretry_set()  local
660 	gmc->noretry = (amdgpu_noretry == -1) ? noretry_default : amdgpu_noretry;  in amdgpu_gmc_noretry_set()
746 	if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024))  in amdgpu_gmc_get_vbios_allocations()
780 	u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes;  in amdgpu_gmc_init_pdb0()
781 	u64 pde0_page_size = (1ULL<<adev->gmc.vmid0_page_table_block_size)<<21;  in amdgpu_gmc_init_pdb0()
783 		adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;  in amdgpu_gmc_init_pdb0()
794 	flags |= AMDGPU_PTE_FRAG((adev->gmc.vmid0_page_table_block_size + 9*1));  in amdgpu_gmc_init_pdb0()
801 		amdgpu_gmc_set_pte_pde(adev, adev->gmc.ptr_pdb0, i, vram_addr, flags);  in amdgpu_gmc_init_pdb0()
810 	amdgpu_gmc_set_pte_pde(adev, adev->gmc.ptr_pdb0, i, gart_ptb_gpu_pa, flags);  in amdgpu_gmc_init_pdb0()
823 	return mc_addr - adev->gmc.vram_start + adev->vm_manager.vram_base_offset;  in amdgpu_gmc_vram_mc2pa()
847 	return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.aper_base;  in amdgpu_gmc_vram_cpu_pa()
903 	mode = adev->gmc.gmc_funcs->query_mem_partition_mode(adev);  in current_memory_partition_show()
928 	if (!adev->gmc.gmc_funcs->query_mem_partition_mode)  in amdgpu_gmc_sysfs_init()