Lines Matching refs:fence_drv
103 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
119 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_read()
163 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit()
172 &ring->fence_drv.lock, in amdgpu_fence_emit()
178 &ring->fence_drv.lock, in amdgpu_fence_emit()
183 amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, in amdgpu_fence_emit()
186 ptr = &ring->fence_drv.fences[seq & ring->fence_drv.num_fences_mask]; in amdgpu_fence_emit()
234 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit_polling()
236 seq - ring->fence_drv.num_fences_mask, in amdgpu_fence_emit_polling()
241 amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, in amdgpu_fence_emit_polling()
258 mod_timer(&ring->fence_drv.fallback_timer, in amdgpu_fence_schedule_fallback()
275 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_process()
280 last_seq = atomic_read(&ring->fence_drv.last_seq); in amdgpu_fence_process()
285 if (del_timer(&ring->fence_drv.fallback_timer) && in amdgpu_fence_process()
286 seq != ring->fence_drv.sync_seq) in amdgpu_fence_process()
328 fence_drv.fallback_timer); in amdgpu_fence_fallback()
344 uint64_t seq = READ_ONCE(ring->fence_drv.sync_seq); in amdgpu_fence_wait_empty()
351 ptr = &ring->fence_drv.fences[seq & ring->fence_drv.num_fences_mask]; in amdgpu_fence_wait_empty()
403 emitted -= atomic_read(&ring->fence_drv.last_seq); in amdgpu_fence_count_emitted()
404 emitted += READ_ONCE(ring->fence_drv.sync_seq); in amdgpu_fence_count_emitted()
417 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_last_unsignaled_time_us()
421 last_seq = atomic_read(&ring->fence_drv.last_seq); in amdgpu_fence_last_unsignaled_time_us()
422 sync_seq = READ_ONCE(ring->fence_drv.sync_seq); in amdgpu_fence_last_unsignaled_time_us()
448 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_update_start_timestamp()
480 ring->fence_drv.cpu_addr = ring->fence_cpu_addr; in amdgpu_fence_driver_start_ring()
481 ring->fence_drv.gpu_addr = ring->fence_gpu_addr; in amdgpu_fence_driver_start_ring()
485 ring->fence_drv.cpu_addr = adev->uvd.inst[ring->me].cpu_addr + index; in amdgpu_fence_driver_start_ring()
486 ring->fence_drv.gpu_addr = adev->uvd.inst[ring->me].gpu_addr + index; in amdgpu_fence_driver_start_ring()
488 amdgpu_fence_write(ring, atomic_read(&ring->fence_drv.last_seq)); in amdgpu_fence_driver_start_ring()
490 ring->fence_drv.irq_src = irq_src; in amdgpu_fence_driver_start_ring()
491 ring->fence_drv.irq_type = irq_type; in amdgpu_fence_driver_start_ring()
492 ring->fence_drv.initialized = true; in amdgpu_fence_driver_start_ring()
495 ring->name, ring->fence_drv.gpu_addr); in amdgpu_fence_driver_start_ring()
518 ring->fence_drv.cpu_addr = NULL; in amdgpu_fence_driver_init_ring()
519 ring->fence_drv.gpu_addr = 0; in amdgpu_fence_driver_init_ring()
520 ring->fence_drv.sync_seq = 0; in amdgpu_fence_driver_init_ring()
521 atomic_set(&ring->fence_drv.last_seq, 0); in amdgpu_fence_driver_init_ring()
522 ring->fence_drv.initialized = false; in amdgpu_fence_driver_init_ring()
524 timer_setup(&ring->fence_drv.fallback_timer, amdgpu_fence_fallback, 0); in amdgpu_fence_driver_init_ring()
526 ring->fence_drv.num_fences_mask = ring->num_hw_submission * 2 - 1; in amdgpu_fence_driver_init_ring()
527 spin_lock_init(&ring->fence_drv.lock); in amdgpu_fence_driver_init_ring()
528 ring->fence_drv.fences = kcalloc(ring->num_hw_submission * 2, sizeof(void *), in amdgpu_fence_driver_init_ring()
531 if (!ring->fence_drv.fences) in amdgpu_fence_driver_init_ring()
604 if (!ring || !ring->fence_drv.initialized) in amdgpu_fence_driver_hw_fini()
617 ring->fence_drv.irq_src && in amdgpu_fence_driver_hw_fini()
619 amdgpu_irq_put(adev, ring->fence_drv.irq_src, in amdgpu_fence_driver_hw_fini()
620 ring->fence_drv.irq_type); in amdgpu_fence_driver_hw_fini()
622 del_timer_sync(&ring->fence_drv.fallback_timer); in amdgpu_fence_driver_hw_fini()
634 if (!ring || !ring->fence_drv.initialized || !ring->fence_drv.irq_src) in amdgpu_fence_driver_isr_toggle()
651 if (!ring || !ring->fence_drv.initialized) in amdgpu_fence_driver_sw_fini()
663 for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) in amdgpu_fence_driver_sw_fini()
664 dma_fence_put(ring->fence_drv.fences[j]); in amdgpu_fence_driver_sw_fini()
665 kfree(ring->fence_drv.fences); in amdgpu_fence_driver_sw_fini()
666 ring->fence_drv.fences = NULL; in amdgpu_fence_driver_sw_fini()
667 ring->fence_drv.initialized = false; in amdgpu_fence_driver_sw_fini()
690 if (!ring || !ring->fence_drv.initialized) in amdgpu_fence_driver_hw_init()
694 if (ring->fence_drv.irq_src && in amdgpu_fence_driver_hw_init()
696 amdgpu_irq_get(adev, ring->fence_drv.irq_src, in amdgpu_fence_driver_hw_init()
697 ring->fence_drv.irq_type); in amdgpu_fence_driver_hw_init()
712 for (i = 0; i <= ring->fence_drv.num_fences_mask; i++) { in amdgpu_fence_driver_clear_job_fences()
713 ptr = &ring->fence_drv.fences[i]; in amdgpu_fence_driver_clear_job_fences()
740 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_driver_set_error()
764 amdgpu_fence_write(ring, ring->fence_drv.sync_seq); in amdgpu_fence_driver_force_completion()
799 if (!timer_pending(&to_amdgpu_fence(f)->ring->fence_drv.fallback_timer)) in amdgpu_fence_enable_signaling()
816 if (!timer_pending(&to_amdgpu_ring(job->base.sched)->fence_drv.fallback_timer)) in amdgpu_job_fence_enable_signaling()
904 if (!ring || !ring->fence_drv.initialized) in amdgpu_debugfs_fence_info_show()
911 atomic_read(&ring->fence_drv.last_seq)); in amdgpu_debugfs_fence_info_show()
913 ring->fence_drv.sync_seq); in amdgpu_debugfs_fence_info_show()
928 le32_to_cpu(*(ring->fence_drv.cpu_addr + 2))); in amdgpu_debugfs_fence_info_show()
931 le32_to_cpu(*(ring->fence_drv.cpu_addr + 4))); in amdgpu_debugfs_fence_info_show()
934 le32_to_cpu(*(ring->fence_drv.cpu_addr + 6))); in amdgpu_debugfs_fence_info_show()