57  * - 3.0.0 - initial driver
58  * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP)
59  * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same
61  * - 3.3.0 - Add VM support for UVD on supported hardware.
62  * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS.
63  * - 3.5.0 - Add support for new UVD_NO_OP register.
64  * - 3.6.0 - kmd involves use CONTEXT_CONTROL in ring buffer.
65  * - 3.7.0 - Add support for VCE clock list packet
66  * - 3.8.0 - Add support raster config init in the kernel
67  * - 3.9.0 - Add support for memory query info about VRAM and GTT.
68  * - 3.10.0 - Add support for new fences ioctl, new gem ioctl flags
69  * - 3.11.0 - Add support for sensor query info (clocks, temp, etc).
70  * - 3.12.0 - Add query for double offchip LDS buffers
71  * - 3.13.0 - Add PRT support
72  * - 3.14.0 - Fix race in amdgpu_ctx_get_fence() and note new functionality
73  * - 3.15.0 - Export more gpu info for gfx9
74  * - 3.16.0 - Add reserved vmid support
75  * - 3.17.0 - Add AMDGPU_NUM_VRAM_CPU_PAGE_FAULTS.
76  * - 3.18.0 - Export gpu always on cu bitmap
77  * - 3.19.0 - Add support for UVD MJPEG decode
78  * - 3.20.0 - Add support for local BOs
79  * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
80  * - 3.22.0 - Add DRM_AMDGPU_SCHED ioctl
81  * - 3.23.0 - Add query for VRAM lost counter
82  * - 3.24.0 - Add high priority compute support for gfx9
83  * - 3.25.0 - Add support for sensor query info (stable pstate sclk/mclk).
84  * - 3.26.0 - GFX9: Process AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE.
85  * - 3.27.0 - Add new chunk to AMDGPU_CS to enable BO_LIST creation.
86  * - 3.28.0 - Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES
87  * - 3.29.0 - Add AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID
88  * - 3.30.0 - Add AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE.
89  * - 3.31.0 - Add support for per-flip tiling attribute changes with DC
90  * - 3.32.0 - Add syncobj timeline support to AMDGPU_CS.
91  * - 3.33.0 - Fixes for GDS ENOMEM failures in AMDGPU_CS.
92  * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches
93  * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask
94  * - 3.36.0 - Allow reading more status registers on si/cik
95  * - 3.37.0 - L2 is invalidated before SDMA IBs, needed for correctness
96  * - 3.38.0 - Add AMDGPU_IB_FLAG_EMIT_MEM_SYNC
97  * - 3.39.0 - DMABUF implicit sync does a full pipeline sync
98  * - 3.40.0 - Add AMDGPU_IDS_FLAGS_TMZ
99  * - 3.41.0 - Add video codec query
100  * - 3.42.0 - Add 16bpc fixed point display support
101  * - 3.43.0 - Add device hot plug/unplug support
102  * - 3.44.0 - DCN3 supports DCC independent block settings: !64B && 128B, 64B && 128B
103  * - 3.45.0 - Add context ioctl stable pstate interface
104  * - 3.46.0 - To enable hot plug amdgpu tests in libdrm
105  * - 3.47.0 - Add AMDGPU_GEM_CREATE_DISCARDABLE and AMDGPU_VM_NOALLOC flags
106  * - 3.48.0 - Add IP discovery version info to HW INFO
107  * - 3.49.0 - Add gang submit into CS IOCTL
108  * - 3.50.0 - Update AMDGPU_INFO_DEV_INFO IOCTL for minimum engine and memory clock
110  *   3.51.0 - Return the PCIe gen and lanes from the INFO ioctl
111  *   3.52.0 - Add AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD, add device_info fields:
114  *   3.53.0 - Support for GFX11 CP GFX shadowing
115  *   3.54.0 - Add AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS support
119 #define KMS_DRIVER_PATCHLEVEL	0
136 uint amdgpu_ip_block_mask = 0xffffffff;
151 u64 amdgpu_cg_mask = 0xffffffffffffffff;
152 uint amdgpu_pg_mask = 0xffffffff;
161 uint amdgpu_pp_feature_mask = 0xfff7bfff;
170  * FBC (bit 0) disabled by default
200 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
216 			amdgpu_drv_delayed_reset_work_handler, 0),
219 uint amdgpu_ras_mask = 0xffffffff;
223 	.period = 0x0, /* default to 0x0 (timeout disable) */
228  * Restrict the total amount of VRAM in MiB for testing.  The default is 0 (Use full VRAM).
235 …* Restrict the amount of CPU visible VRAM in MiB for testing.  The default is 0 (Use full CPU visi…
260 MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disa…
265 …* Set HDMI/DPAudio. Only affects non-DC display handling. The default is -1 (Enabled), set 0 to di…
267 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
272 …lay Priority (1 = normal, 2 = high). Only affects non-DC display handling. The default is 0 (auto).
274 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
279  * To enable hw i2c engine. Only affects non-DC display handling. The default is 0 (Disabled).
281 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
286  * To disable PCIE Gen2/3 mode (0 = disable, 1 = enable). The default is -1 (auto, enabled).
288 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
293 …* To disable Message Signaled Interrupts (MSI) functionality (1 = enable, 0 = disable). The defaul…
295 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
303  * multiple values specified. 0 and negative values are invalidated. They will be adjusted
315 …"for passthrough or sriov, 10000 for all jobs. 0: keep default value. negative: infinity timeout),…
322  * (0 = disable, 1 = enable)
325 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
331  * Set to 0 to force direct loading if supported by the ASIC.  Set
335 …lc backdoor autoload if supported, 2 = smu load if supported, 1 = psp load, 0 = force direct if su…
340  * To disable ASPM (1 = enable, 0 = disable). The default is -1 (auto, enabled).
342 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
349  * Setting the value to 0 disables this functionality.
352 MODULE_PARM_DESC(runpm, "PX runtime pm (2 = force enable with BAMACO, 1 = force enable with BACO, 0…
360 …* the kernel log for the list of IPs on the asic. The default is 0xffffffff (enable all blocks on …
367 …wer Management (BAPM) used to dynamically share TDP between CPU and GPU. Set value 0 to disable it.
370 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
375 …* Set 1 to enable Deep Color support. Only affects non-DC display handling. The default is 0 (disa…
377 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
403 …* Stop on VM fault for debugging (0 = never, 1 = print first, 2 = always). The default is 0 (No st…
405 MODULE_PARM_DESC(vm_fault_stop, "Stop on VM fault (0 = never (default), 1 = print first, 2 = always…
410  * Debug VM handling (0 = disabled, 1 = enabled). The default is 0 (Disabled).
412 MODULE_PARM_DESC(vm_debug, "Debug VM handling (0 = disabled (default), 1 = enabled)");
417 …* Override VM update mode. VM updated by using CPU (0 = never, 1 = Graphics only, 2 = Compute only…
418 …* is -1 (Only in large BAR(LB) systems Compute VM tables will be updated by CPU, otherwise 0, neve…
420 MODULE_PARM_DESC(vm_update_mode, "VM update using CPU (0 = never (default except for large BAR(LB))…
425  * Enable experimental hw support (1 = enable). The default is 0 (disabled).
427 MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))");
432 …* Disable/Enable Display Core driver for debugging (1 = enable, 0 = disable). The default is -1 (a…
434 MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 = auto (default))");
470  * The default is 0 (automatic for each asic).
472 MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect (default))");
478  * The default is 0 (automatic for each asic).
480 MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))");
485 …* Override Clockgating features enabled on GPU (0 = disable clock gating). See the AMD_CG_SUPPORT …
486  * drivers/gpu/drm/amd/include/amd_shared.h. The default is 0xffffffffffffffff (all enabled).
488 MODULE_PARM_DESC(cg_mask, "Clockgating flags mask (0 = disable clock gating)");
493 …* Override Powergating features enabled on GPU (0 = disable power gating). See the AMD_PG_SUPPORT …
494  * drivers/gpu/drm/amd/include/amd_shared.h. The default is 0xffffffff (all enabled).
496 MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)");
501 …* Override SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change). The default i…
503 MODULE_PARM_DESC(sdma_phase_quantum, "SDMA context switch phase quantum (x 1K GPU clock cycles, 0 =…
526 …* Override Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable). The default is -1 (au…
528 MODULE_PARM_DESC(lbpw, "Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable, -1 = auto)…
531 MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread across pipes (1 = enable, 0 …
536 …* Set to enable GPU recovery mechanism (1 = enable, 0 = disable). The default is -1 (auto, disable…
538 MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto)…
543 …nable emulation mode. This is only needed when running on an emulator. The default is 0 (disabled).
545 MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
550  * Enable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (default))
552 MODULE_PARM_DESC(ras_enable, "Enable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (d…
557  * Mask of RAS features to enable (default 0xffffffff), only valid when ras_enable == 1
560 MODULE_PARM_DESC(ras_mask, "Mask of RAS features to enable (default 0xffffffff), only valid when ra…
574 MODULE_PARM_DESC(timeout_period, "watchdog timeout period (0 = timeout disabled, 1 ~ 0x23 = timeout…
580 …* set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using r…
586 int amdgpu_si_support = 0;
587 MODULE_PARM_DESC(si_support, "SI support (1 = enabled, 0 = disabled (default))");
590 MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
599 …* set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using r…
605 int amdgpu_cik_support = 0;
606 MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled, 0 = disabled (default))");
609 MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)");
617 …* It is used to reserve gtt for smu debug usage, setting value 0 to disable it. The actual size is…
618  * E.g. 0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte. The default is 0 (disabled).
621 …"reserve gtt for smu debug usage, 0 = disable,0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 =…
629 …either different priorities (HP3D ring and LP3D ring), or equal priorities (0 = disabled, 1 = enab…
634 …* It is used to enable mid command buffer preemption. (0 = disabled, 1 = enabled, -1 auto (default…
637 	"Enable Mid-command buffer preemption (0 = disabled, 1 = enabled), -1 = auto (default)");
643  * (-1 = auto (default), 0 = disabled, 1 = enabled, 2 = use ip_discovery table from file)
652  * (0 = disabled (default), 1 = enabled)
655 	"Enable Micro Engine Scheduler (0 = disabled (default), 1 = enabled)");
661  * (0 = disabled (default), 1 = enabled)
664 	"Enable Micro Engine Scheduler KIQ (0 = disabled (default), 1 = enabled)");
671  * (0 = retry enabled, 1 = retry disabled, -1 auto (default))
674 	"Disable retry faults (0 = retry enabled, 1 = retry disabled, -1 auto (default))");
687  * Enables/disables XGMI P2P interface (0 = disable, 1 = enable).
690 	"Enable XGMI P2P interface (0 = disable; 1 = enable (default))");
704 …"Scheduling policy (0 = HWS (Default), 1 = HWS without over-subscription, 2 = Non-HWS (Used for de…
714 …"Max # processes HWS can execute concurrently when sched_policy=0 (0 = no concurrency, #VMIDs for …
719  * the middle of a compute wave. Default is 1 to enable this feature. Setting 0
724 MODULE_PARM_DESC(cwsr_enable, "CWSR enable (0 = Off, 1 = On (Default))");
744 	"Send sigterm to HSA process on unhandled exception (0 = disable, 1 = enable)");
751  * Default value is 0, diabled.
756 …"Debug large-bar flag used to simulate large-bar capability on non-large bar machine (0 = disable,…
760  * Halt if HWS hang is detected. Default value, 0, disables the halt on hang.
765 MODULE_PARM_DESC(halt_if_hws_hang, "Halt if HWS hang is detected (0 = off (default), 1 = on)");
802 … to keep the wavefront context for debugging (0 = queue eviction, 1 = no queue eviction). The defa…
805 MODULE_PARM_DESC(no_queue_eviction_on_vm_fault, "No queue eviction on VM fault (0 = queue eviction,…
813 MODULE_PARM_DESC(mtype_local, "MTYPE for local memory (0 = MTYPE_RW (default), 1 = MTYPE_NC, 2 = MT…
841 MODULE_PARM_DESC(visualconfirm, "Visual confirm (0 = off (default), 1 = MPO, 5 = PSR)");
848  * Valid levels are 0-4. A value of 0 indicates that ABM should be disabled by
853  * Defaults to 0, or disabled. Userspace can still override this level later
857 MODULE_PARM_DESC(abmlevel, "ABM level (0 = off (default), 1-4 = backlight reduction level) ");
861 MODULE_PARM_DESC(backlight, "Backlight control (0 = pwm, 1 = aux, -1 auto (default))");
869  * The default value: 0 (off).  TODO: change to auto till it is completed.
871 MODULE_PARM_DESC(tmz, "Enable TMZ feature (-1 = auto (default), 0 = off, 1 = on)");
876  * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)
878 MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = m…
887 MODULE_PARM_DESC(bad_page_threshold, "Bad page threshold(-1 = ignore threshold (default value), 0 =…
890 …l compute queue user want to setup (8 if set to greater than 8 or less than 0, only affect gfx 8+)…
897 MODULE_PARM_DESC(vcnfw_log, "Enable vcnfw log(0 = disable (default value), 1 = enable)");
903  * This option is only relevant on APUs.  Set this option to 0 to disable
907 MODULE_PARM_DESC(sg_display, "S/G Display (-1 = auto (default), 0 = disable)");
912  * Used to override pptable id. id = 0 use VBIOS pptable.
913  * id > 0 use the soft pptable with specicfied id.
916 …"specify pptable id to be used (-1 = auto(default) value, 0 = use pptable from vbios, > 0 = soft p…
926 						0 = AMDGPU_SPX_PARTITION_MODE, \
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1225 	0x6850,
1226 	0x6858,
1227 	0x6859,
1228 	0x6880,
1229 	0x6888,
1230 	0x6889,
1231 	0x688A,
1232 	0x688C,
1233 	0x688D,
1234 	0x6898,
1235 	0x6899,
1236 	0x689b,
1237 	0x689c,
1238 	0x689d,
1239 	0x689e,
1240 	0x68a0,
1241 	0x68a1,
1242 	0x68a8,
1243 	0x68a9,
1244 	0x68b0,
1245 	0x68b8,
1246 	0x68b9,
1247 	0x68ba,
1248 	0x68be,
1249 	0x68bf,
1250 	0x68c0,
1251 	0x68c1,
1252 	0x68c7,
1253 	0x68c8,
1254 	0x68c9,
1255 	0x68d8,
1256 	0x68d9,
1257 	0x68da,
1258 	0x68de,
1259 	0x68e0,
1260 	0x68e1,
1261 	0x68e4,
1262 	0x68e5,
1263 	0x68e8,
1264 	0x68e9,
1265 	0x68f1,
1266 	0x68f2,
1267 	0x68f8,
1268 	0x68f9,
1269 	0x68fa,
1270 	0x68fe,
1271 	0x7100,
1272 	0x7101,
1273 	0x7102,
1274 	0x7103,
1275 	0x7104,
1276 	0x7105,
1277 	0x7106,
1278 	0x7108,
1279 	0x7109,
1280 	0x710A,
1281 	0x710B,
1282 	0x710C,
1283 	0x710E,
1284 	0x710F,
1285 	0x7140,
1286 	0x7141,
1287 	0x7142,
1288 	0x7143,
1289 	0x7144,
1290 	0x7145,
1291 	0x7146,
1292 	0x7147,
1293 	0x7149,
1294 	0x714A,
1295 	0x714B,
1296 	0x714C,
1297 	0x714D,
1298 	0x714E,
1299 	0x714F,
1300 	0x7151,
1301 	0x7152,
1302 	0x7153,
1303 	0x715E,
1304 	0x715F,
1305 	0x7180,
1306 	0x7181,
1307 	0x7183,
1308 	0x7186,
1309 	0x7187,
1310 	0x7188,
1311 	0x718A,
1312 	0x718B,
1313 	0x718C,
1314 	0x718D,
1315 	0x718F,
1316 	0x7193,
1317 	0x7196,
1318 	0x719B,
1319 	0x719F,
1320 	0x71C0,
1321 	0x71C1,
1322 	0x71C2,
1323 	0x71C3,
1324 	0x71C4,
1325 	0x71C5,
1326 	0x71C6,
1327 	0x71C7,
1328 	0x71CD,
1329 	0x71CE,
1330 	0x71D2,
1331 	0x71D4,
1332 	0x71D5,
1333 	0x71D6,
1334 	0x71DA,
1335 	0x71DE,
1336 	0x7200,
1337 	0x7210,
1338 	0x7211,
1339 	0x7240,
1340 	0x7243,
1341 	0x7244,
1342 	0x7245,
1343 	0x7246,
1344 	0x7247,
1345 	0x7248,
1346 	0x7249,
1347 	0x724A,
1348 	0x724B,
1349 	0x724C,
1350 	0x724D,
1351 	0x724E,
1352 	0x724F,
1353 	0x7280,
1354 	0x7281,
1355 	0x7283,
1356 	0x7284,
1357 	0x7287,
1358 	0x7288,
1359 	0x7289,
1360 	0x728B,
1361 	0x728C,
1362 	0x7290,
1363 	0x7291,
1364 	0x7293,
1365 	0x7297,
1366 	0x7834,
1367 	0x7835,
1368 	0x791e,
1369 	0x791f,
1370 	0x793f,
1371 	0x7941,
1372 	0x7942,
1373 	0x796c,
1374 	0x796d,
1375 	0x796e,
1376 	0x796f,
1377 	0x9400,
1378 	0x9401,
1379 	0x9402,
1380 	0x9403,
1381 	0x9405,
1382 	0x940A,
1383 	0x940B,
1384 	0x940F,
1385 	0x94A0,
1386 	0x94A1,
1387 	0x94A3,
1388 	0x94B1,
1389 	0x94B3,
1390 	0x94B4,
1391 	0x94B5,
1392 	0x94B9,
1393 	0x9440,
1394 	0x9441,
1395 	0x9442,
1396 	0x9443,
1397 	0x9444,
1398 	0x9446,
1399 	0x944A,
1400 	0x944B,
1401 	0x944C,
1402 	0x944E,
1403 	0x9450,
1404 	0x9452,
1405 	0x9456,
1406 	0x945A,
1407 	0x945B,
1408 	0x945E,
1409 	0x9460,
1410 	0x9462,
1411 	0x946A,
1412 	0x946B,
1413 	0x947A,
1414 	0x947B,
1415 	0x9480,
1416 	0x9487,
1417 	0x9488,
1418 	0x9489,
1419 	0x948A,
1420 	0x948F,
1421 	0x9490,
1422 	0x9491,
1423 	0x9495,
1424 	0x9498,
1425 	0x949C,
1426 	0x949E,
1427 	0x949F,
1428 	0x94C0,
1429 	0x94C1,
1430 	0x94C3,
1431 	0x94C4,
1432 	0x94C5,
1433 	0x94C6,
1434 	0x94C7,
1435 	0x94C8,
1436 	0x94C9,
1437 	0x94CB,
1438 	0x94CC,
1439 	0x94CD,
1440 	0x9500,
1441 	0x9501,
1442 	0x9504,
1443 	0x9505,
1444 	0x9506,
1445 	0x9507,
1446 	0x9508,
1447 	0x9509,
1448 	0x950F,
1449 	0x9511,
1450 	0x9515,
1451 	0x9517,
1452 	0x9519,
1453 	0x9540,
1454 	0x9541,
1455 	0x9542,
1456 	0x954E,
1457 	0x954F,
1458 	0x9552,
1459 	0x9553,
1460 	0x9555,
1461 	0x9557,
1462 	0x955f,
1463 	0x9580,
1464 	0x9581,
1465 	0x9583,
1466 	0x9586,
1467 	0x9587,
1468 	0x9588,
1469 	0x9589,
1470 	0x958A,
1471 	0x958B,
1472 	0x958C,
1473 	0x958D,
1474 	0x958E,
1475 	0x958F,
1476 	0x9590,
1477 	0x9591,
1478 	0x9593,
1479 	0x9595,
1480 	0x9596,
1481 	0x9597,
1482 	0x9598,
1483 	0x9599,
1484 	0x959B,
1485 	0x95C0,
1486 	0x95C2,
1487 	0x95C4,
1488 	0x95C5,
1489 	0x95C6,
1490 	0x95C7,
1491 	0x95C9,
1492 	0x95CC,
1493 	0x95CD,
1494 	0x95CE,
1495 	0x95CF,
1496 	0x9610,
1497 	0x9611,
1498 	0x9612,
1499 	0x9613,
1500 	0x9614,
1501 	0x9615,
1502 	0x9616,
1503 	0x9640,
1504 	0x9641,
1505 	0x9642,
1506 	0x9643,
1507 	0x9644,
1508 	0x9645,
1509 	0x9647,
1510 	0x9648,
1511 	0x9649,
1512 	0x964a,
1513 	0x964b,
1514 	0x964c,
1515 	0x964e,
1516 	0x964f,
1517 	0x9710,
1518 	0x9711,
1519 	0x9712,
1520 	0x9713,
1521 	0x9714,
1522 	0x9715,
1523 	0x9802,
1524 	0x9803,
1525 	0x9804,
1526 	0x9805,
1527 	0x9806,
1528 	0x9807,
1529 	0x9808,
1530 	0x9809,
1531 	0x980A,
1532 	0x9900,
1533 	0x9901,
1534 	0x9903,
1535 	0x9904,
1536 	0x9905,
1537 	0x9906,
1538 	0x9907,
1539 	0x9908,
1540 	0x9909,
1541 	0x990A,
1542 	0x990B,
1543 	0x990C,
1544 	0x990D,
1545 	0x990E,
1546 	0x990F,
1547 	0x9910,
1548 	0x9913,
1549 	0x9917,
1550 	0x9918,
1551 	0x9919,
1552 	0x9990,
1553 	0x9991,
1554 	0x9992,
1555 	0x9993,
1556 	0x9994,
1557 	0x9995,
1558 	0x9996,
1559 	0x9997,
1560 	0x9998,
1561 	0x9999,
1562 	0x999A,
1563 	0x999B,
1564 	0x999C,
1565 	0x999D,
1566 	0x99A0,
1567 	0x99A2,
1568 	0x99A4,
1570 	0x3171,
1571 	0x3e70,
1572 	0x4164,
1573 	0x4165,
1574 	0x4166,
1575 	0x4168,
1576 	0x4170,
1577 	0x4171,
1578 	0x4172,
1579 	0x4173,
1580 	0x496e,
1581 	0x4a69,
1582 	0x4a6a,
1583 	0x4a6b,
1584 	0x4a70,
1585 	0x4a74,
1586 	0x4b69,
1587 	0x4b6b,
1588 	0x4b6c,
1589 	0x4c6e,
1590 	0x4e64,
1591 	0x4e65,
1592 	0x4e66,
1593 	0x4e67,
1594 	0x4e68,
1595 	0x4e69,
1596 	0x4e6a,
1597 	0x4e71,
1598 	0x4f73,
1599 	0x5569,
1600 	0x556b,
1601 	0x556d,
1602 	0x556f,
1603 	0x5571,
1604 	0x5854,
1605 	0x5874,
1606 	0x5940,
1607 	0x5941,
1608 	0x5b70,
1609 	0x5b72,
1610 	0x5b73,
1611 	0x5b74,
1612 	0x5b75,
1613 	0x5d44,
1614 	0x5d45,
1615 	0x5d6d,
1616 	0x5d6f,
1617 	0x5d72,
1618 	0x5d77,
1619 	0x5e6b,
1620 	0x5e6d,
1621 	0x7120,
1622 	0x7124,
1623 	0x7129,
1624 	0x712e,
1625 	0x712f,
1626 	0x7162,
1627 	0x7163,
1628 	0x7166,
1629 	0x7167,
1630 	0x7172,
1631 	0x7173,
1632 	0x71a0,
1633 	0x71a1,
1634 	0x71a3,
1635 	0x71a7,
1636 	0x71bb,
1637 	0x71e0,
1638 	0x71e1,
1639 	0x71e2,
1640 	0x71e6,
1641 	0x71e7,
1642 	0x71f2,
1643 	0x7269,
1644 	0x726b,
1645 	0x726e,
1646 	0x72a0,
1647 	0x72a8,
1648 	0x72b1,
1649 	0x72b3,
1650 	0x793f,
1655 	{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1656 	{0x1002, 0x6784, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1657 	{0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1658 	{0x1002, 0x678A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1659 	{0x1002, 0x6790, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1660 	{0x1002, 0x6791, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1661 	{0x1002, 0x6792, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1662 	{0x1002, 0x6798, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1663 	{0x1002, 0x6799, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1664 	{0x1002, 0x679A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1665 	{0x1002, 0x679B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1666 	{0x1002, 0x679E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1667 	{0x1002, 0x679F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1668 	{0x1002, 0x6800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
1669 	{0x1002, 0x6801, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
1670 	{0x1002, 0x6802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
1671 	{0x1002, 0x6806, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1672 	{0x1002, 0x6808, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1673 	{0x1002, 0x6809, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1674 	{0x1002, 0x6810, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1675 	{0x1002, 0x6811, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1676 	{0x1002, 0x6816, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1677 	{0x1002, 0x6817, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1678 	{0x1002, 0x6818, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1679 	{0x1002, 0x6819, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1680 	{0x1002, 0x6600, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1681 	{0x1002, 0x6601, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1682 	{0x1002, 0x6602, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1683 	{0x1002, 0x6603, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1684 	{0x1002, 0x6604, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1685 	{0x1002, 0x6605, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1686 	{0x1002, 0x6606, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1687 	{0x1002, 0x6607, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1688 	{0x1002, 0x6608, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1689 	{0x1002, 0x6610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1690 	{0x1002, 0x6611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1691 	{0x1002, 0x6613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1692 	{0x1002, 0x6617, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1693 	{0x1002, 0x6620, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1694 	{0x1002, 0x6621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1695 	{0x1002, 0x6623, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1696 	{0x1002, 0x6631, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1697 	{0x1002, 0x6820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1698 	{0x1002, 0x6821, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1699 	{0x1002, 0x6822, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1700 	{0x1002, 0x6823, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1701 	{0x1002, 0x6824, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1702 	{0x1002, 0x6825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1703 	{0x1002, 0x6826, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1704 	{0x1002, 0x6827, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1705 	{0x1002, 0x6828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1706 	{0x1002, 0x6829, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1707 	{0x1002, 0x682A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1708 	{0x1002, 0x682B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1709 	{0x1002, 0x682C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1710 	{0x1002, 0x682D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1711 	{0x1002, 0x682F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1712 	{0x1002, 0x6830, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1713 	{0x1002, 0x6831, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1714 	{0x1002, 0x6835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1715 	{0x1002, 0x6837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1716 	{0x1002, 0x6838, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1717 	{0x1002, 0x6839, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1718 	{0x1002, 0x683B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1719 	{0x1002, 0x683D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1720 	{0x1002, 0x683F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1721 	{0x1002, 0x6660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1722 	{0x1002, 0x6663, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1723 	{0x1002, 0x6664, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1724 	{0x1002, 0x6665, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1725 	{0x1002, 0x6667, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1726 	{0x1002, 0x666F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1730 	{0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1731 	{0x1002, 0x1305, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1732 	{0x1002, 0x1306, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1733 	{0x1002, 0x1307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1734 	{0x1002, 0x1309, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1735 	{0x1002, 0x130A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1736 	{0x1002, 0x130B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1737 	{0x1002, 0x130C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1738 	{0x1002, 0x130D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1739 	{0x1002, 0x130E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1740 	{0x1002, 0x130F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1741 	{0x1002, 0x1310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1742 	{0x1002, 0x1311, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1743 	{0x1002, 0x1312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1744 	{0x1002, 0x1313, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1745 	{0x1002, 0x1315, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1746 	{0x1002, 0x1316, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1747 	{0x1002, 0x1317, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1748 	{0x1002, 0x1318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1749 	{0x1002, 0x131B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1750 	{0x1002, 0x131C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1751 	{0x1002, 0x131D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1753 	{0x1002, 0x6640, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
1754 	{0x1002, 0x6641, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
1755 	{0x1002, 0x6646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
1756 	{0x1002, 0x6647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
1757 	{0x1002, 0x6649, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1758 	{0x1002, 0x6650, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1759 	{0x1002, 0x6651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1760 	{0x1002, 0x6658, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1761 	{0x1002, 0x665c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1762 	{0x1002, 0x665d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1763 	{0x1002, 0x665f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1765 	{0x1002, 0x67A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1766 	{0x1002, 0x67A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1767 	{0x1002, 0x67A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1768 	{0x1002, 0x67A8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1769 	{0x1002, 0x67A9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1770 	{0x1002, 0x67AA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1771 	{0x1002, 0x67B0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1772 	{0x1002, 0x67B1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1773 	{0x1002, 0x67B8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1774 	{0x1002, 0x67B9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1775 	{0x1002, 0x67BA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1776 	{0x1002, 0x67BE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1778 	{0x1002, 0x9830, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1779 	{0x1002, 0x9831, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1780 	{0x1002, 0x9832, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1781 	{0x1002, 0x9833, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1782 	{0x1002, 0x9834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1783 	{0x1002, 0x9835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1784 	{0x1002, 0x9836, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1785 	{0x1002, 0x9837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1786 	{0x1002, 0x9838, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1787 	{0x1002, 0x9839, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1788 	{0x1002, 0x983a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1789 	{0x1002, 0x983b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1790 	{0x1002, 0x983c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1791 	{0x1002, 0x983d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1792 	{0x1002, 0x983e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1793 	{0x1002, 0x983f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1795 	{0x1002, 0x9850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1796 	{0x1002, 0x9851, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1797 	{0x1002, 0x9852, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1798 	{0x1002, 0x9853, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1799 	{0x1002, 0x9854, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1800 	{0x1002, 0x9855, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1801 	{0x1002, 0x9856, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1802 	{0x1002, 0x9857, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1803 	{0x1002, 0x9858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1804 	{0x1002, 0x9859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1805 	{0x1002, 0x985A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1806 	{0x1002, 0x985B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1807 	{0x1002, 0x985C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1808 	{0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1809 	{0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1810 	{0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1813 	{0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
1814 	{0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
1815 	{0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
1816 	{0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
1817 	{0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
1819 	{0x1002, 0x6920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1820 	{0x1002, 0x6921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1821 	{0x1002, 0x6928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1822 	{0x1002, 0x6929, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1823 	{0x1002, 0x692B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1824 	{0x1002, 0x692F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1825 	{0x1002, 0x6930, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1826 	{0x1002, 0x6938, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1827 	{0x1002, 0x6939, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1829 	{0x1002, 0x7300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_FIJI},
1830 	{0x1002, 0x730F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_FIJI},
1832 	{0x1002, 0x9870, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
1833 	{0x1002, 0x9874, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
1834 	{0x1002, 0x9875, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
1835 	{0x1002, 0x9876, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
1836 	{0x1002, 0x9877, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
1838 	{0x1002, 0x98E4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_STONEY|AMD_IS_APU},
1840 	{0x1002, 0x67E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
1841 	{0x1002, 0x67E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
1842 	{0x1002, 0x67E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
1843 	{0x1002, 0x67EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
1844 	{0x1002, 0x67EF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
1845 	{0x1002, 0x67FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
1846 	{0x1002, 0x67E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
1847 	{0x1002, 0x67E7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
1848 	{0x1002, 0x67E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
1850 	{0x1002, 0x67C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1851 	{0x1002, 0x67C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1852 	{0x1002, 0x67C2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1853 	{0x1002, 0x67C4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1854 	{0x1002, 0x67C7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1855 	{0x1002, 0x67D0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1856 	{0x1002, 0x67DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1857 	{0x1002, 0x67C8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1858 	{0x1002, 0x67C9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1859 	{0x1002, 0x67CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1860 	{0x1002, 0x67CC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1861 	{0x1002, 0x67CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1862 	{0x1002, 0x6FDF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1864 	{0x1002, 0x6980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
1865 	{0x1002, 0x6981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
1866 	{0x1002, 0x6985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
1867 	{0x1002, 0x6986, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
1868 	{0x1002, 0x6987, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
1869 	{0x1002, 0x6995, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
1870 	{0x1002, 0x6997, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
1871 	{0x1002, 0x699F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
1873 	{0x1002, 0x694C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGAM},
1874 	{0x1002, 0x694E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGAM},
1875 	{0x1002, 0x694F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGAM},
1877 	{0x1002, 0x6860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1878 	{0x1002, 0x6861, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1879 	{0x1002, 0x6862, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1880 	{0x1002, 0x6863, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1881 	{0x1002, 0x6864, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1882 	{0x1002, 0x6867, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1883 	{0x1002, 0x6868, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1884 	{0x1002, 0x6869, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1885 	{0x1002, 0x686a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1886 	{0x1002, 0x686b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1887 	{0x1002, 0x686c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1888 	{0x1002, 0x686d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1889 	{0x1002, 0x686e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1890 	{0x1002, 0x686f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1891 	{0x1002, 0x687f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
1893 	{0x1002, 0x69A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
1894 	{0x1002, 0x69A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
1895 	{0x1002, 0x69A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
1896 	{0x1002, 0x69A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
1897 	{0x1002, 0x69AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
1899 	{0x1002, 0x66A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
1900 	{0x1002, 0x66A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
1901 	{0x1002, 0x66A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
1902 	{0x1002, 0x66A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
1903 	{0x1002, 0x66A4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
1904 	{0x1002, 0x66A7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
1905 	{0x1002, 0x66AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
1907 	{0x1002, 0x15dd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN|AMD_IS_APU},
1908 	{0x1002, 0x15d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN|AMD_IS_APU},
1910 	{0x1002, 0x738C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
1911 	{0x1002, 0x7388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
1912 	{0x1002, 0x738E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
1913 	{0x1002, 0x7390, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
1915 	{0x1002, 0x7310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
1916 	{0x1002, 0x7312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
1917 	{0x1002, 0x7318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
1918 	{0x1002, 0x7319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
1919 	{0x1002, 0x731A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
1920 	{0x1002, 0x731B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
1921 	{0x1002, 0x731E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
1922 	{0x1002, 0x731F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
1924 	{0x1002, 0x7340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
1925 	{0x1002, 0x7341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
1926 	{0x1002, 0x7347, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
1927 	{0x1002, 0x734F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
1930 	{0x1002, 0x15E7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU},
1931 	{0x1002, 0x1636, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU},
1932 	{0x1002, 0x1638, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU},
1933 	{0x1002, 0x164C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU},
1936 	{0x1002, 0x7360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI12},
1937 	{0x1002, 0x7362, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI12},
1940 	{0x1002, 0x73A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1941 	{0x1002, 0x73A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1942 	{0x1002, 0x73A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1943 	{0x1002, 0x73A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1944 	{0x1002, 0x73A5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1945 	{0x1002, 0x73A8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1946 	{0x1002, 0x73A9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1947 	{0x1002, 0x73AB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1948 	{0x1002, 0x73AC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1949 	{0x1002, 0x73AD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1950 	{0x1002, 0x73AE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1951 	{0x1002, 0x73AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1952 	{0x1002, 0x73BF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1955 	{0x1002, 0x164D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_YELLOW_CARP|AMD_IS_APU},
1956 	{0x1002, 0x1681, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_YELLOW_CARP|AMD_IS_APU},
1959 	{0x1002, 0x73C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1960 	{0x1002, 0x73C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1961 	{0x1002, 0x73C3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1962 	{0x1002, 0x73DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1963 	{0x1002, 0x73DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1964 	{0x1002, 0x73DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1965 	{0x1002, 0x73DD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1966 	{0x1002, 0x73DE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1967 	{0x1002, 0x73DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
1970 	{0x1002, 0x73E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1971 	{0x1002, 0x73E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1972 	{0x1002, 0x73E2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1973 	{0x1002, 0x73E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1974 	{0x1002, 0x73E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1975 	{0x1002, 0x73E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1976 	{0x1002, 0x73EA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1977 	{0x1002, 0x73EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1978 	{0x1002, 0x73EC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1979 	{0x1002, 0x73ED, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1980 	{0x1002, 0x73EF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1981 	{0x1002, 0x73FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
1984 	{0x1002, 0x7408, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ALDEBARAN},
1985 	{0x1002, 0x740C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ALDEBARAN},
1986 	{0x1002, 0x740F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ALDEBARAN},
1987 	{0x1002, 0x7410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ALDEBARAN},
1990 	{0x1002, 0x13FE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYAN_SKILLFISH|AMD_IS_APU},
1991 	{0x1002, 0x143F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYAN_SKILLFISH|AMD_IS_APU},
1994 	{0x1002, 0x7420, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
1995 	{0x1002, 0x7421, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
1996 	{0x1002, 0x7422, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
1997 	{0x1002, 0x7423, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
1998 	{0x1002, 0x7424, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
1999 	{0x1002, 0x743F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
2001 	{ PCI_DEVICE(0x1002, PCI_ANY_ID),
2003 	  .class_mask = 0xffffff,
2006 	{ PCI_DEVICE(0x1002, PCI_ANY_ID),
2008 	  .class_mask = 0xffffff,
2011 	{ PCI_DEVICE(0x1002, PCI_ANY_ID),
2013 	  .class_mask = 0xffffff,
2016 	{0, 0, 0}
2028 	/* 0 - GPU  in amdgpu_get_secondary_funcs()
2051 	int ret, retry = 0, i;  in amdgpu_pci_probe()
2055 	for (i = 0; i < ARRAY_SIZE(amdgpu_unsupported_pciidlist); i++) {  in amdgpu_pci_probe()
2061 		amdgpu_aspm = 0;  in amdgpu_pci_probe()
2073 	if (pdev->device == 0x67FF &&  in amdgpu_pci_probe()
2074 	    (pdev->revision == 0xE3 ||  in amdgpu_pci_probe()
2075 	     pdev->revision == 0xE7 ||  in amdgpu_pci_probe()
2076 	     pdev->revision == 0xF3 ||  in amdgpu_pci_probe()
2077 	     pdev->revision == 0xF7)) {  in amdgpu_pci_probe()
2104 				 "Use radeon.si_support=0 amdgpu.si_support=1 to override.\n"  in amdgpu_pci_probe()
2121 				 "Use radeon.cik_support=0 amdgpu.cik_support=1 to override.\n"  in amdgpu_pci_probe()
2223 	return 0;  in amdgpu_pci_probe()
2244 	if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 2) &&  in amdgpu_pci_remove()
2252 			if (hive->device_remove_count == 0)  in amdgpu_pci_remove()
2267 			memset(&reset_context, 0, sizeof(reset_context));  in amdgpu_pci_remove()
2319 	memset(&reset_context, 0, sizeof(reset_context));  in amdgpu_drv_delayed_reset_work_handler()
2333 	for (i = 0; i < mgpu_info.num_dgpu; i++) {  in amdgpu_drv_delayed_reset_work_handler()
2344 	for (i = 0; i < mgpu_info.num_dgpu; i++) {  in amdgpu_drv_delayed_reset_work_handler()
2351 	for (i = 0; i < mgpu_info.num_dgpu; i++)  in amdgpu_drv_delayed_reset_work_handler()
2356 	for (i = 0; i < mgpu_info.num_dgpu; i++)  in amdgpu_drv_delayed_reset_work_handler()
2371 	for (i = 0; i < mgpu_info.num_dgpu; i++) {  in amdgpu_drv_delayed_reset_work_handler()
2397 	return 0;  in amdgpu_pmops_prepare()
2415 		return 0;  in amdgpu_pmops_suspend()
2427 	return 0;  in amdgpu_pmops_suspend_noirq()
2437 		return 0;  in amdgpu_pmops_resume()
2465 	return 0;  in amdgpu_pmops_freeze()
2498 		int ret = 0;  in amdgpu_runtime_idle_check_display()
2529 				if (ret < 0)  in amdgpu_runtime_idle_check_display()
2553 	return 0;  in amdgpu_runtime_idle_check_display()
2573 	for (i = 0; i < AMDGPU_MAX_RINGS; i++) {  in amdgpu_pmops_runtime_suspend()
2625 	return 0;  in amdgpu_pmops_runtime_suspend()
2672 	return 0;  in amdgpu_pmops_runtime_resume()
2703 	if (ret < 0)  in amdgpu_drm_ioctl()
2738 	return timeout >= 0 ? 0 : timeout;  in amdgpu_flush()
2770 	return 0;  in amdgpu_file_to_fpriv()