Lines Matching refs:adev
208 static int amdgpu_discovery_read_binary_from_sysmem(struct amdgpu_device *adev, uint8_t *binary) in amdgpu_discovery_read_binary_from_sysmem() argument
214 ret = amdgpu_acpi_get_tmr_info(adev, &tmr_offset, &tmr_size); in amdgpu_discovery_read_binary_from_sysmem()
221 discv_regn = memremap(pos, adev->mman.discovery_tmr_size, MEMREMAP_WC); in amdgpu_discovery_read_binary_from_sysmem()
223 memcpy(binary, discv_regn, adev->mman.discovery_tmr_size); in amdgpu_discovery_read_binary_from_sysmem()
231 static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev, in amdgpu_discovery_read_binary_from_mem() argument
239 amdgpu_device_vram_access(adev, pos, (uint32_t *)binary, in amdgpu_discovery_read_binary_from_mem()
240 adev->mman.discovery_tmr_size, false); in amdgpu_discovery_read_binary_from_mem()
242 ret = amdgpu_discovery_read_binary_from_sysmem(adev, binary); in amdgpu_discovery_read_binary_from_mem()
248 static int amdgpu_discovery_read_binary_from_file(struct amdgpu_device *adev, uint8_t *binary) in amdgpu_discovery_read_binary_from_file() argument
259 dev_warn(adev->dev, "amdgpu_discovery is not set properly\n"); in amdgpu_discovery_read_binary_from_file()
263 r = request_firmware(&fw, fw_name, adev->dev); in amdgpu_discovery_read_binary_from_file()
265 dev_err(adev->dev, "can't load firmware \"%s\"\n", in amdgpu_discovery_read_binary_from_file()
301 static void amdgpu_discovery_harvest_config_quirk(struct amdgpu_device *adev) in amdgpu_discovery_harvest_config_quirk() argument
307 if ((adev->ip_versions[UVD_HWIP][1] == IP_VERSION(3, 0, 1)) && in amdgpu_discovery_harvest_config_quirk()
308 (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 2))) { in amdgpu_discovery_harvest_config_quirk()
309 switch (adev->pdev->revision) { in amdgpu_discovery_harvest_config_quirk()
317 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
318 adev->vcn.inst_mask &= ~AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
326 static int amdgpu_discovery_init(struct amdgpu_device *adev) in amdgpu_discovery_init() argument
335 adev->mman.discovery_tmr_size = DISCOVERY_TMR_SIZE; in amdgpu_discovery_init()
336 adev->mman.discovery_bin = kzalloc(adev->mman.discovery_tmr_size, GFP_KERNEL); in amdgpu_discovery_init()
337 if (!adev->mman.discovery_bin) in amdgpu_discovery_init()
342 dev_info(adev->dev, "use ip discovery information from file"); in amdgpu_discovery_init()
343 r = amdgpu_discovery_read_binary_from_file(adev, adev->mman.discovery_bin); in amdgpu_discovery_init()
346 dev_err(adev->dev, "failed to read ip discovery binary from file\n"); in amdgpu_discovery_init()
353 adev, adev->mman.discovery_bin); in amdgpu_discovery_init()
359 if (!amdgpu_discovery_verify_binary_signature(adev->mman.discovery_bin)) { in amdgpu_discovery_init()
360 dev_err(adev->dev, in amdgpu_discovery_init()
366 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_init()
373 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
375 dev_err(adev->dev, "invalid ip discovery binary checksum\n"); in amdgpu_discovery_init()
386 (struct ip_discovery_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
388 dev_err(adev->dev, "invalid ip discovery data table signature\n"); in amdgpu_discovery_init()
393 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
395 dev_err(adev->dev, "invalid ip discovery data table checksum\n"); in amdgpu_discovery_init()
407 (struct gpu_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
410 dev_err(adev->dev, "invalid ip discovery gc table id\n"); in amdgpu_discovery_init()
415 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
417 dev_err(adev->dev, "invalid gc data table checksum\n"); in amdgpu_discovery_init()
429 (struct harvest_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
432 dev_err(adev->dev, "invalid ip discovery harvest table signature\n"); in amdgpu_discovery_init()
437 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
439 dev_err(adev->dev, "invalid harvest data table checksum\n"); in amdgpu_discovery_init()
451 (struct vcn_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
454 dev_err(adev->dev, "invalid ip discovery vcn table id\n"); in amdgpu_discovery_init()
459 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
461 dev_err(adev->dev, "invalid vcn data table checksum\n"); in amdgpu_discovery_init()
473 (struct mall_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
476 dev_err(adev->dev, "invalid ip discovery mall table id\n"); in amdgpu_discovery_init()
481 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
483 dev_err(adev->dev, "invalid mall data table checksum\n"); in amdgpu_discovery_init()
492 kfree(adev->mman.discovery_bin); in amdgpu_discovery_init()
493 adev->mman.discovery_bin = NULL; in amdgpu_discovery_init()
498 static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev);
500 void amdgpu_discovery_fini(struct amdgpu_device *adev) in amdgpu_discovery_fini() argument
502 amdgpu_discovery_sysfs_fini(adev); in amdgpu_discovery_fini()
503 kfree(adev->mman.discovery_bin); in amdgpu_discovery_fini()
504 adev->mman.discovery_bin = NULL; in amdgpu_discovery_fini()
523 static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev, in amdgpu_discovery_read_harvest_bit_per_ip() argument
533 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_read_harvest_bit_per_ip()
534 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_read_harvest_bit_per_ip()
541 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_read_harvest_bit_per_ip()
546 ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); in amdgpu_discovery_read_harvest_bit_per_ip()
556 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN0; in amdgpu_discovery_read_harvest_bit_per_ip()
557 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
559 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
562 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_read_harvest_bit_per_ip()
563 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
565 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
570 adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; in amdgpu_discovery_read_harvest_bit_per_ip()
585 static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev, in amdgpu_discovery_read_from_harvest_table() argument
595 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_read_from_harvest_table()
599 dev_err(adev->dev, "invalid harvest table offset\n"); in amdgpu_discovery_read_from_harvest_table()
603 harvest_info = (struct harvest_table *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_read_from_harvest_table()
612 adev->vcn.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
614 adev->jpeg.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
617 adev->vcn.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
619 adev->jpeg.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
623 adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; in amdgpu_discovery_read_from_harvest_table()
631 adev->gfx.xcc_mask &= in amdgpu_discovery_read_from_harvest_table()
635 adev->sdma.sdma_mask &= in amdgpu_discovery_read_from_harvest_table()
643 adev->umc.active_mask = ((1 << adev->umc.node_inst_num) - 1) & in amdgpu_discovery_read_from_harvest_table()
875 struct amdgpu_device *adev; member
891 struct amdgpu_device *adev = ip_top->adev; in ip_disc_release() local
893 adev->ip_top = NULL; in ip_disc_release()
897 static uint8_t amdgpu_discovery_get_harvest_info(struct amdgpu_device *adev, in amdgpu_discovery_get_harvest_info() argument
905 harvest = ((1 << inst) & adev->vcn.inst_mask) == 0; in amdgpu_discovery_get_harvest_info()
908 if (adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK) in amdgpu_discovery_get_harvest_info()
915 harvest = ((1 << inst) & adev->gfx.xcc_mask) == 0; in amdgpu_discovery_get_harvest_info()
918 harvest = ((1 << inst) & adev->sdma.sdma_mask) == 0; in amdgpu_discovery_get_harvest_info()
927 static int amdgpu_discovery_sysfs_ips(struct amdgpu_device *adev, in amdgpu_discovery_sysfs_ips() argument
947 ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); in amdgpu_discovery_sysfs_ips()
1001 adev, ip_hw_instance->hw_id, in amdgpu_discovery_sysfs_ips()
1030 static int amdgpu_discovery_sysfs_recurse(struct amdgpu_device *adev) in amdgpu_discovery_sysfs_recurse() argument
1035 struct kset *die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_recurse()
1040 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_sysfs_recurse()
1041 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_sysfs_recurse()
1051 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_sysfs_recurse()
1077 amdgpu_discovery_sysfs_ips(adev, ip_die_entry, ip_offset, num_ips, !!ihdr->base_addr_64_bit); in amdgpu_discovery_sysfs_recurse()
1083 static int amdgpu_discovery_sysfs_init(struct amdgpu_device *adev) in amdgpu_discovery_sysfs_init() argument
1088 if (!adev->mman.discovery_bin) in amdgpu_discovery_sysfs_init()
1091 adev->ip_top = kzalloc(sizeof(*adev->ip_top), GFP_KERNEL); in amdgpu_discovery_sysfs_init()
1092 if (!adev->ip_top) in amdgpu_discovery_sysfs_init()
1095 adev->ip_top->adev = adev; in amdgpu_discovery_sysfs_init()
1097 res = kobject_init_and_add(&adev->ip_top->kobj, &ip_discovery_ktype, in amdgpu_discovery_sysfs_init()
1098 &adev->dev->kobj, "ip_discovery"); in amdgpu_discovery_sysfs_init()
1104 die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_init()
1106 die_kset->kobj.parent = &adev->ip_top->kobj; in amdgpu_discovery_sysfs_init()
1108 res = kset_register(&adev->ip_top->die_kset); in amdgpu_discovery_sysfs_init()
1118 res = amdgpu_discovery_sysfs_recurse(adev); in amdgpu_discovery_sysfs_init()
1122 kobject_put(&adev->ip_top->kobj); in amdgpu_discovery_sysfs_init()
1165 static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev) in amdgpu_discovery_sysfs_fini() argument
1170 die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_fini()
1179 kobject_put(&adev->ip_top->die_kset.kobj); in amdgpu_discovery_sysfs_fini()
1180 kobject_put(&adev->ip_top->kobj); in amdgpu_discovery_sysfs_fini()
1185 static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev) in amdgpu_discovery_reg_base_init() argument
1200 r = amdgpu_discovery_init(adev); in amdgpu_discovery_reg_base_init()
1206 adev->gfx.xcc_mask = 0; in amdgpu_discovery_reg_base_init()
1207 adev->sdma.sdma_mask = 0; in amdgpu_discovery_reg_base_init()
1208 adev->vcn.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1209 adev->jpeg.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1210 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_reg_base_init()
1211 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_reg_base_init()
1219 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_reg_base_init()
1233 ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); in amdgpu_discovery_reg_base_init()
1254 adev->vcn.vcn_config[adev->vcn.num_vcn_inst] = in amdgpu_discovery_reg_base_init()
1257 if (adev->vcn.num_vcn_inst < in amdgpu_discovery_reg_base_init()
1259 adev->vcn.num_vcn_inst++; in amdgpu_discovery_reg_base_init()
1260 adev->vcn.inst_mask |= in amdgpu_discovery_reg_base_init()
1262 adev->jpeg.inst_mask |= in amdgpu_discovery_reg_base_init()
1265 dev_err(adev->dev, "Too many VCN instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1266 adev->vcn.num_vcn_inst + 1, in amdgpu_discovery_reg_base_init()
1274 if (adev->sdma.num_instances < in amdgpu_discovery_reg_base_init()
1276 adev->sdma.num_instances++; in amdgpu_discovery_reg_base_init()
1277 adev->sdma.sdma_mask |= in amdgpu_discovery_reg_base_init()
1280 dev_err(adev->dev, "Too many SDMA instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1281 adev->sdma.num_instances + 1, in amdgpu_discovery_reg_base_init()
1287 adev->gmc.num_umc++; in amdgpu_discovery_reg_base_init()
1288 adev->umc.node_inst_num++; in amdgpu_discovery_reg_base_init()
1292 adev->gfx.xcc_mask |= in amdgpu_discovery_reg_base_init()
1322 adev->reg_offset[hw_ip][ip->instance_number] = in amdgpu_discovery_reg_base_init()
1333 adev->ip_versions[hw_ip][ip->instance_number] = in amdgpu_discovery_reg_base_init()
1349 static void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) in amdgpu_discovery_harvest_ip() argument
1359 if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0) && in amdgpu_discovery_harvest_ip()
1360 adev->ip_versions[GC_HWIP][0] != IP_VERSION(9, 4, 3)) { in amdgpu_discovery_harvest_ip()
1361 if ((adev->pdev->device == 0x731E && in amdgpu_discovery_harvest_ip()
1362 (adev->pdev->revision == 0xC6 || in amdgpu_discovery_harvest_ip()
1363 adev->pdev->revision == 0xC7)) || in amdgpu_discovery_harvest_ip()
1364 (adev->pdev->device == 0x7340 && in amdgpu_discovery_harvest_ip()
1365 adev->pdev->revision == 0xC9) || in amdgpu_discovery_harvest_ip()
1366 (adev->pdev->device == 0x7360 && in amdgpu_discovery_harvest_ip()
1367 adev->pdev->revision == 0xC7)) in amdgpu_discovery_harvest_ip()
1368 amdgpu_discovery_read_harvest_bit_per_ip(adev, in amdgpu_discovery_harvest_ip()
1371 amdgpu_discovery_read_from_harvest_table(adev, in amdgpu_discovery_harvest_ip()
1376 amdgpu_discovery_harvest_config_quirk(adev); in amdgpu_discovery_harvest_ip()
1378 if (vcn_harvest_count == adev->vcn.num_vcn_inst) { in amdgpu_discovery_harvest_ip()
1379 adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK; in amdgpu_discovery_harvest_ip()
1380 adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK; in amdgpu_discovery_harvest_ip()
1383 if (umc_harvest_count < adev->gmc.num_umc) { in amdgpu_discovery_harvest_ip()
1384 adev->gmc.num_umc -= umc_harvest_count; in amdgpu_discovery_harvest_ip()
1396 static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) in amdgpu_discovery_get_gfx_info() argument
1402 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_gfx_info()
1407 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_gfx_info()
1413 gc_info = (union gc_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_gfx_info()
1417 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v1.gc_num_se); in amdgpu_discovery_get_gfx_info()
1418 adev->gfx.config.max_cu_per_sh = 2 * (le32_to_cpu(gc_info->v1.gc_num_wgp0_per_sa) + in amdgpu_discovery_get_gfx_info()
1420 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v1.gc_num_sa_per_se); in amdgpu_discovery_get_gfx_info()
1421 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v1.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1422 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v1.gc_num_gl2c); in amdgpu_discovery_get_gfx_info()
1423 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v1.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1424 adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->v1.gc_num_max_gs_thds); in amdgpu_discovery_get_gfx_info()
1425 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->v1.gc_gs_table_depth); in amdgpu_discovery_get_gfx_info()
1426 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->v1.gc_gsprim_buff_depth); in amdgpu_discovery_get_gfx_info()
1427 adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->v1.gc_double_offchip_lds_buffer); in amdgpu_discovery_get_gfx_info()
1428 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v1.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1429 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v1.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1430 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v1.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1431 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v1.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1432 adev->gfx.config.num_sc_per_sh = le32_to_cpu(gc_info->v1.gc_num_sc_per_se) / in amdgpu_discovery_get_gfx_info()
1434 adev->gfx.config.num_packer_per_sc = le32_to_cpu(gc_info->v1.gc_num_packer_per_sc); in amdgpu_discovery_get_gfx_info()
1436 adev->gfx.config.gc_num_tcp_per_sa = le32_to_cpu(gc_info->v1_1.gc_num_tcp_per_sa); in amdgpu_discovery_get_gfx_info()
1437 adev->gfx.config.gc_num_sdp_interface = le32_to_cpu(gc_info->v1_1.gc_num_sdp_interface); in amdgpu_discovery_get_gfx_info()
1438 adev->gfx.config.gc_num_tcps = le32_to_cpu(gc_info->v1_1.gc_num_tcps); in amdgpu_discovery_get_gfx_info()
1441 adev->gfx.config.gc_num_tcp_per_wpg = le32_to_cpu(gc_info->v1_2.gc_num_tcp_per_wpg); in amdgpu_discovery_get_gfx_info()
1442 adev->gfx.config.gc_tcp_l1_size = le32_to_cpu(gc_info->v1_2.gc_tcp_l1_size); in amdgpu_discovery_get_gfx_info()
1443 adev->gfx.config.gc_num_sqc_per_wgp = le32_to_cpu(gc_info->v1_2.gc_num_sqc_per_wgp); in amdgpu_discovery_get_gfx_info()
1444 …adev->gfx.config.gc_l1_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v1_2.gc_l1_instructio… in amdgpu_discovery_get_gfx_info()
1445 …adev->gfx.config.gc_l1_data_cache_size_per_sqc = le32_to_cpu(gc_info->v1_2.gc_l1_data_cache_size_p… in amdgpu_discovery_get_gfx_info()
1446 adev->gfx.config.gc_gl1c_per_sa = le32_to_cpu(gc_info->v1_2.gc_gl1c_per_sa); in amdgpu_discovery_get_gfx_info()
1447 … adev->gfx.config.gc_gl1c_size_per_instance = le32_to_cpu(gc_info->v1_2.gc_gl1c_size_per_instance); in amdgpu_discovery_get_gfx_info()
1448 adev->gfx.config.gc_gl2c_per_gpu = le32_to_cpu(gc_info->v1_2.gc_gl2c_per_gpu); in amdgpu_discovery_get_gfx_info()
1452 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v2.gc_num_se); in amdgpu_discovery_get_gfx_info()
1453 adev->gfx.config.max_cu_per_sh = le32_to_cpu(gc_info->v2.gc_num_cu_per_sh); in amdgpu_discovery_get_gfx_info()
1454 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v2.gc_num_sh_per_se); in amdgpu_discovery_get_gfx_info()
1455 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v2.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1456 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v2.gc_num_tccs); in amdgpu_discovery_get_gfx_info()
1457 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v2.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1458 adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->v2.gc_num_max_gs_thds); in amdgpu_discovery_get_gfx_info()
1459 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->v2.gc_gs_table_depth); in amdgpu_discovery_get_gfx_info()
1460 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->v2.gc_gsprim_buff_depth); in amdgpu_discovery_get_gfx_info()
1461 adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->v2.gc_double_offchip_lds_buffer); in amdgpu_discovery_get_gfx_info()
1462 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v2.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1463 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v2.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1464 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v2.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1465 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v2.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1466 adev->gfx.config.num_sc_per_sh = le32_to_cpu(gc_info->v2.gc_num_sc_per_se) / in amdgpu_discovery_get_gfx_info()
1468 adev->gfx.config.num_packer_per_sc = le32_to_cpu(gc_info->v2.gc_num_packer_per_sc); in amdgpu_discovery_get_gfx_info()
1470 adev->gfx.config.gc_num_tcp_per_sa = le32_to_cpu(gc_info->v2_1.gc_num_tcp_per_sh); in amdgpu_discovery_get_gfx_info()
1471 adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v2_1.gc_tcp_size_per_cu); in amdgpu_discovery_get_gfx_info()
1472 …adev->gfx.config.gc_num_sdp_interface = le32_to_cpu(gc_info->v2_1.gc_num_sdp_interface); /* per XC… in amdgpu_discovery_get_gfx_info()
1473 adev->gfx.config.gc_num_cu_per_sqc = le32_to_cpu(gc_info->v2_1.gc_num_cu_per_sqc); in amdgpu_discovery_get_gfx_info()
1474 …adev->gfx.config.gc_l1_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v2_1.gc_instruction_c… in amdgpu_discovery_get_gfx_info()
1475 …adev->gfx.config.gc_l1_data_cache_size_per_sqc = le32_to_cpu(gc_info->v2_1.gc_scalar_data_cache_si… in amdgpu_discovery_get_gfx_info()
1476 adev->gfx.config.gc_tcc_size = le32_to_cpu(gc_info->v2_1.gc_tcc_size); /* per XCD */ in amdgpu_discovery_get_gfx_info()
1480 dev_err(adev->dev, in amdgpu_discovery_get_gfx_info()
1494 static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev) in amdgpu_discovery_get_mall_info() argument
1502 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_mall_info()
1507 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_mall_info()
1513 mall_info = (union mall_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_mall_info()
1521 for (u = 0; u < adev->gmc.num_umc; u++) { in amdgpu_discovery_get_mall_info()
1529 adev->gmc.mall_size = mall_size; in amdgpu_discovery_get_mall_info()
1530 adev->gmc.m_half_use = half_use; in amdgpu_discovery_get_mall_info()
1534 adev->gmc.mall_size = mall_size_per_umc * adev->gmc.num_umc; in amdgpu_discovery_get_mall_info()
1537 dev_err(adev->dev, in amdgpu_discovery_get_mall_info()
1550 static int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev) in amdgpu_discovery_get_vcn_info() argument
1557 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_vcn_info()
1567 if (adev->vcn.num_vcn_inst > VCN_INFO_TABLE_MAX_NUM_INSTANCES) { in amdgpu_discovery_get_vcn_info()
1568 dev_err(adev->dev, "invalid vcn instances\n"); in amdgpu_discovery_get_vcn_info()
1572 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_vcn_info()
1578 vcn_info = (union vcn_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_vcn_info()
1585 for (v = 0; v < adev->vcn.num_vcn_inst; v++) { in amdgpu_discovery_get_vcn_info()
1586 adev->vcn.vcn_codec_disable_mask[v] = in amdgpu_discovery_get_vcn_info()
1591 dev_err(adev->dev, in amdgpu_discovery_get_vcn_info()
1600 static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_common_ip_blocks() argument
1603 switch (adev->ip_versions[GC_HWIP][0]) { in amdgpu_discovery_set_common_ip_blocks()
1613 amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1628 amdgpu_device_ip_block_add(adev, &nv_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1635 amdgpu_device_ip_block_add(adev, &soc21_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1638 dev_err(adev->dev, in amdgpu_discovery_set_common_ip_blocks()
1640 adev->ip_versions[GC_HWIP][0]); in amdgpu_discovery_set_common_ip_blocks()
1646 static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_gmc_ip_blocks() argument
1649 switch (adev->ip_versions[GC_HWIP][0]) { in amdgpu_discovery_set_gmc_ip_blocks()
1659 amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1674 amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1681 amdgpu_device_ip_block_add(adev, &gmc_v11_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1684 dev_err(adev->dev, in amdgpu_discovery_set_gmc_ip_blocks()
1686 adev->ip_versions[GC_HWIP][0]); in amdgpu_discovery_set_gmc_ip_blocks()
1692 static int amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_ih_ip_blocks() argument
1694 switch (adev->ip_versions[OSSSYS_HWIP][0]) { in amdgpu_discovery_set_ih_ip_blocks()
1700 amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
1706 amdgpu_device_ip_block_add(adev, &vega20_ih_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
1714 amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
1719 amdgpu_device_ip_block_add(adev, &ih_v6_0_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
1722 amdgpu_device_ip_block_add(adev, &ih_v6_1_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
1725 dev_err(adev->dev, in amdgpu_discovery_set_ih_ip_blocks()
1727 adev->ip_versions[OSSSYS_HWIP][0]); in amdgpu_discovery_set_ih_ip_blocks()
1733 static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_psp_ip_blocks() argument
1735 switch (adev->ip_versions[MP0_HWIP][0]) { in amdgpu_discovery_set_psp_ip_blocks()
1737 amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
1741 amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
1753 amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
1756 amdgpu_device_ip_block_add(adev, &psp_v11_0_8_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
1760 amdgpu_device_ip_block_add(adev, &psp_v12_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
1773 amdgpu_device_ip_block_add(adev, &psp_v13_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
1776 amdgpu_device_ip_block_add(adev, &psp_v13_0_4_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
1779 dev_err(adev->dev, in amdgpu_discovery_set_psp_ip_blocks()
1781 adev->ip_versions[MP0_HWIP][0]); in amdgpu_discovery_set_psp_ip_blocks()
1787 static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_smu_ip_blocks() argument
1789 switch (adev->ip_versions[MP1_HWIP][0]) { in amdgpu_discovery_set_smu_ip_blocks()
1794 if (adev->asic_type == CHIP_ARCTURUS) in amdgpu_discovery_set_smu_ip_blocks()
1795 amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
1797 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
1808 amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
1812 amdgpu_device_ip_block_add(adev, &smu_v12_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
1825 amdgpu_device_ip_block_add(adev, &smu_v13_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
1828 dev_err(adev->dev, in amdgpu_discovery_set_smu_ip_blocks()
1830 adev->ip_versions[MP1_HWIP][0]); in amdgpu_discovery_set_smu_ip_blocks()
1837 static void amdgpu_discovery_set_sriov_display(struct amdgpu_device *adev) in amdgpu_discovery_set_sriov_display() argument
1839 amdgpu_device_set_sriov_virtual_display(adev); in amdgpu_discovery_set_sriov_display()
1840 amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block); in amdgpu_discovery_set_sriov_display()
1844 static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_display_ip_blocks() argument
1846 if (adev->enable_virtual_display) { in amdgpu_discovery_set_display_ip_blocks()
1847 amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block); in amdgpu_discovery_set_display_ip_blocks()
1851 if (!amdgpu_device_has_dc_support(adev)) in amdgpu_discovery_set_display_ip_blocks()
1855 if (adev->ip_versions[DCE_HWIP][0]) { in amdgpu_discovery_set_display_ip_blocks()
1856 switch (adev->ip_versions[DCE_HWIP][0]) { in amdgpu_discovery_set_display_ip_blocks()
1874 if (amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_display_ip_blocks()
1875 amdgpu_discovery_set_sriov_display(adev); in amdgpu_discovery_set_display_ip_blocks()
1877 amdgpu_device_ip_block_add(adev, &dm_ip_block); in amdgpu_discovery_set_display_ip_blocks()
1880 dev_err(adev->dev, in amdgpu_discovery_set_display_ip_blocks()
1882 adev->ip_versions[DCE_HWIP][0]); in amdgpu_discovery_set_display_ip_blocks()
1885 } else if (adev->ip_versions[DCI_HWIP][0]) { in amdgpu_discovery_set_display_ip_blocks()
1886 switch (adev->ip_versions[DCI_HWIP][0]) { in amdgpu_discovery_set_display_ip_blocks()
1890 if (amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_display_ip_blocks()
1891 amdgpu_discovery_set_sriov_display(adev); in amdgpu_discovery_set_display_ip_blocks()
1893 amdgpu_device_ip_block_add(adev, &dm_ip_block); in amdgpu_discovery_set_display_ip_blocks()
1896 dev_err(adev->dev, in amdgpu_discovery_set_display_ip_blocks()
1898 adev->ip_versions[DCI_HWIP][0]); in amdgpu_discovery_set_display_ip_blocks()
1906 static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_gc_ip_blocks() argument
1908 switch (adev->ip_versions[GC_HWIP][0]) { in amdgpu_discovery_set_gc_ip_blocks()
1917 amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
1922 amdgpu_device_ip_block_add(adev, &gfx_v9_4_3_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
1937 amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
1944 amdgpu_device_ip_block_add(adev, &gfx_v11_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
1947 dev_err(adev->dev, in amdgpu_discovery_set_gc_ip_blocks()
1949 adev->ip_versions[GC_HWIP][0]); in amdgpu_discovery_set_gc_ip_blocks()
1955 static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_sdma_ip_blocks() argument
1957 switch (adev->ip_versions[SDMA0_HWIP][0]) { in amdgpu_discovery_set_sdma_ip_blocks()
1966 amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
1969 amdgpu_device_ip_block_add(adev, &sdma_v4_4_2_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
1975 amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
1985 amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
1992 amdgpu_device_ip_block_add(adev, &sdma_v6_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
1995 dev_err(adev->dev, in amdgpu_discovery_set_sdma_ip_blocks()
1997 adev->ip_versions[SDMA0_HWIP][0]); in amdgpu_discovery_set_sdma_ip_blocks()
2003 static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_mm_ip_blocks() argument
2005 if (adev->ip_versions[VCE_HWIP][0]) { in amdgpu_discovery_set_mm_ip_blocks()
2006 switch (adev->ip_versions[UVD_HWIP][0]) { in amdgpu_discovery_set_mm_ip_blocks()
2010 if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) in amdgpu_discovery_set_mm_ip_blocks()
2011 amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2014 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2016 adev->ip_versions[UVD_HWIP][0]); in amdgpu_discovery_set_mm_ip_blocks()
2019 switch (adev->ip_versions[VCE_HWIP][0]) { in amdgpu_discovery_set_mm_ip_blocks()
2023 if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) in amdgpu_discovery_set_mm_ip_blocks()
2024 amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2027 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2029 adev->ip_versions[VCE_HWIP][0]); in amdgpu_discovery_set_mm_ip_blocks()
2033 switch (adev->ip_versions[UVD_HWIP][0]) { in amdgpu_discovery_set_mm_ip_blocks()
2036 amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2041 amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2042 if (!amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_mm_ip_blocks()
2043 amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2048 amdgpu_device_ip_block_add(adev, &vcn_v2_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2049 amdgpu_device_ip_block_add(adev, &jpeg_v2_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2052 amdgpu_device_ip_block_add(adev, &vcn_v2_6_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2053 amdgpu_device_ip_block_add(adev, &jpeg_v2_6_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2060 amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2061 if (!amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_mm_ip_blocks()
2062 amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2065 amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2070 amdgpu_device_ip_block_add(adev, &vcn_v4_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2071 amdgpu_device_ip_block_add(adev, &jpeg_v4_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2074 amdgpu_device_ip_block_add(adev, &vcn_v4_0_3_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2075 amdgpu_device_ip_block_add(adev, &jpeg_v4_0_3_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2078 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2080 adev->ip_versions[UVD_HWIP][0]); in amdgpu_discovery_set_mm_ip_blocks()
2087 static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_mes_ip_blocks() argument
2089 switch (adev->ip_versions[GC_HWIP][0]) { in amdgpu_discovery_set_mes_ip_blocks()
2103 amdgpu_device_ip_block_add(adev, &mes_v10_1_ip_block); in amdgpu_discovery_set_mes_ip_blocks()
2104 adev->enable_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2106 adev->enable_mes_kiq = true; in amdgpu_discovery_set_mes_ip_blocks()
2114 amdgpu_device_ip_block_add(adev, &mes_v11_0_ip_block); in amdgpu_discovery_set_mes_ip_blocks()
2115 adev->enable_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2116 adev->enable_mes_kiq = true; in amdgpu_discovery_set_mes_ip_blocks()
2124 static void amdgpu_discovery_init_soc_config(struct amdgpu_device *adev) in amdgpu_discovery_init_soc_config() argument
2126 switch (adev->ip_versions[GC_HWIP][0]) { in amdgpu_discovery_init_soc_config()
2128 aqua_vanjaram_init_soc_config(adev); in amdgpu_discovery_init_soc_config()
2135 int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_ip_blocks() argument
2139 switch (adev->asic_type) { in amdgpu_discovery_set_ip_blocks()
2141 vega10_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2142 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2143 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2144 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2145 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2146 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2147 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2148 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2149 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2150 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 0); in amdgpu_discovery_set_ip_blocks()
2151 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2152 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 0, 0); in amdgpu_discovery_set_ip_blocks()
2153 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2154 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2155 adev->ip_versions[THM_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2156 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2157 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 0, 1); in amdgpu_discovery_set_ip_blocks()
2158 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2159 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2160 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 0); in amdgpu_discovery_set_ip_blocks()
2163 vega10_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2164 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2165 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2166 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 3, 0); in amdgpu_discovery_set_ip_blocks()
2167 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 3, 0); in amdgpu_discovery_set_ip_blocks()
2168 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2169 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2170 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2171 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2172 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2173 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(6, 2, 0); in amdgpu_discovery_set_ip_blocks()
2174 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2175 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2176 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2177 adev->ip_versions[THM_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2178 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 1); in amdgpu_discovery_set_ip_blocks()
2179 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 2, 1); in amdgpu_discovery_set_ip_blocks()
2180 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2181 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2182 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 1); in amdgpu_discovery_set_ip_blocks()
2185 vega10_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2186 adev->sdma.num_instances = 1; in amdgpu_discovery_set_ip_blocks()
2187 adev->vcn.num_vcn_inst = 1; in amdgpu_discovery_set_ip_blocks()
2188 adev->gmc.num_umc = 2; in amdgpu_discovery_set_ip_blocks()
2189 if (adev->apu_flags & AMD_APU_IS_RAVEN2) { in amdgpu_discovery_set_ip_blocks()
2190 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 2, 0); in amdgpu_discovery_set_ip_blocks()
2191 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 2, 0); in amdgpu_discovery_set_ip_blocks()
2192 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2193 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2194 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2195 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 1); in amdgpu_discovery_set_ip_blocks()
2196 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 0, 1); in amdgpu_discovery_set_ip_blocks()
2197 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 5, 0); in amdgpu_discovery_set_ip_blocks()
2198 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2199 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2200 adev->ip_versions[THM_HWIP][0] = IP_VERSION(10, 1, 0); in amdgpu_discovery_set_ip_blocks()
2201 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2202 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 2, 2); in amdgpu_discovery_set_ip_blocks()
2203 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(1, 0, 1); in amdgpu_discovery_set_ip_blocks()
2204 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 1); in amdgpu_discovery_set_ip_blocks()
2206 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2207 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2208 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2209 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2210 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2211 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 0); in amdgpu_discovery_set_ip_blocks()
2212 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2213 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2214 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2215 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2216 adev->ip_versions[THM_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2217 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2218 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2219 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(1, 0, 0); in amdgpu_discovery_set_ip_blocks()
2220 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 0); in amdgpu_discovery_set_ip_blocks()
2224 vega20_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2225 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2226 adev->gmc.num_umc = 8; in amdgpu_discovery_set_ip_blocks()
2227 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2228 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2229 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2230 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2231 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2232 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2233 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 0); in amdgpu_discovery_set_ip_blocks()
2234 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 0); in amdgpu_discovery_set_ip_blocks()
2235 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 1); in amdgpu_discovery_set_ip_blocks()
2236 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2237 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2238 adev->ip_versions[THM_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2239 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2240 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2241 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks()
2242 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks()
2243 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2244 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 1, 0); in amdgpu_discovery_set_ip_blocks()
2247 arct_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2248 adev->sdma.num_instances = 8; in amdgpu_discovery_set_ip_blocks()
2249 adev->vcn.num_vcn_inst = 2; in amdgpu_discovery_set_ip_blocks()
2250 adev->gmc.num_umc = 8; in amdgpu_discovery_set_ip_blocks()
2251 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2252 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2253 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
2254 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
2255 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2256 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2257 adev->ip_versions[SDMA1_HWIP][1] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2258 adev->ip_versions[SDMA1_HWIP][2] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2259 adev->ip_versions[SDMA1_HWIP][3] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2260 adev->ip_versions[SDMA1_HWIP][4] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2261 adev->ip_versions[SDMA1_HWIP][5] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2262 adev->ip_versions[SDMA1_HWIP][6] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2263 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 1); in amdgpu_discovery_set_ip_blocks()
2264 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 1); in amdgpu_discovery_set_ip_blocks()
2265 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 2); in amdgpu_discovery_set_ip_blocks()
2266 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 4); in amdgpu_discovery_set_ip_blocks()
2267 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2268 adev->ip_versions[THM_HWIP][0] = IP_VERSION(11, 0, 3); in amdgpu_discovery_set_ip_blocks()
2269 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 3); in amdgpu_discovery_set_ip_blocks()
2270 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2271 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2272 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2275 aldebaran_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2276 adev->sdma.num_instances = 5; in amdgpu_discovery_set_ip_blocks()
2277 adev->vcn.num_vcn_inst = 2; in amdgpu_discovery_set_ip_blocks()
2278 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2279 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2280 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2281 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2282 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2283 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2284 adev->ip_versions[SDMA0_HWIP][1] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2285 adev->ip_versions[SDMA0_HWIP][2] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2286 adev->ip_versions[SDMA0_HWIP][3] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2287 adev->ip_versions[SDMA0_HWIP][4] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2288 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 2); in amdgpu_discovery_set_ip_blocks()
2289 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 4); in amdgpu_discovery_set_ip_blocks()
2290 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 7, 0); in amdgpu_discovery_set_ip_blocks()
2291 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2292 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2293 adev->ip_versions[THM_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2294 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2295 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2296 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 6, 0); in amdgpu_discovery_set_ip_blocks()
2297 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 6, 0); in amdgpu_discovery_set_ip_blocks()
2298 adev->ip_versions[XGMI_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2301 r = amdgpu_discovery_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2305 amdgpu_discovery_harvest_ip(adev); in amdgpu_discovery_set_ip_blocks()
2306 amdgpu_discovery_get_gfx_info(adev); in amdgpu_discovery_set_ip_blocks()
2307 amdgpu_discovery_get_mall_info(adev); in amdgpu_discovery_set_ip_blocks()
2308 amdgpu_discovery_get_vcn_info(adev); in amdgpu_discovery_set_ip_blocks()
2312 amdgpu_discovery_init_soc_config(adev); in amdgpu_discovery_set_ip_blocks()
2313 amdgpu_discovery_sysfs_init(adev); in amdgpu_discovery_set_ip_blocks()
2315 switch (adev->ip_versions[GC_HWIP][0]) { in amdgpu_discovery_set_ip_blocks()
2322 adev->family = AMDGPU_FAMILY_AI; in amdgpu_discovery_set_ip_blocks()
2327 adev->family = AMDGPU_FAMILY_RV; in amdgpu_discovery_set_ip_blocks()
2338 adev->family = AMDGPU_FAMILY_NV; in amdgpu_discovery_set_ip_blocks()
2341 adev->family = AMDGPU_FAMILY_VGH; in amdgpu_discovery_set_ip_blocks()
2342 adev->apu_flags |= AMD_APU_IS_VANGOGH; in amdgpu_discovery_set_ip_blocks()
2345 adev->family = AMDGPU_FAMILY_YC; in amdgpu_discovery_set_ip_blocks()
2348 adev->family = AMDGPU_FAMILY_GC_10_3_6; in amdgpu_discovery_set_ip_blocks()
2351 adev->family = AMDGPU_FAMILY_GC_10_3_7; in amdgpu_discovery_set_ip_blocks()
2356 adev->family = AMDGPU_FAMILY_GC_11_0_0; in amdgpu_discovery_set_ip_blocks()
2360 adev->family = AMDGPU_FAMILY_GC_11_0_1; in amdgpu_discovery_set_ip_blocks()
2366 switch (adev->ip_versions[GC_HWIP][0]) { in amdgpu_discovery_set_ip_blocks()
2378 adev->flags |= AMD_IS_APU; in amdgpu_discovery_set_ip_blocks()
2384 if (adev->ip_versions[XGMI_HWIP][0] == IP_VERSION(4, 8, 0)) in amdgpu_discovery_set_ip_blocks()
2385 adev->gmc.xgmi.supported = true; in amdgpu_discovery_set_ip_blocks()
2388 switch (adev->ip_versions[NBIO_HWIP][0]) { in amdgpu_discovery_set_ip_blocks()
2391 adev->nbio.funcs = &nbio_v6_1_funcs; in amdgpu_discovery_set_ip_blocks()
2392 adev->nbio.hdp_flush_reg = &nbio_v6_1_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2397 adev->nbio.funcs = &nbio_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
2398 adev->nbio.hdp_flush_reg = &nbio_v7_0_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2403 adev->nbio.funcs = &nbio_v7_4_funcs; in amdgpu_discovery_set_ip_blocks()
2404 adev->nbio.hdp_flush_reg = &nbio_v7_4_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2407 adev->nbio.funcs = &nbio_v7_9_funcs; in amdgpu_discovery_set_ip_blocks()
2408 adev->nbio.hdp_flush_reg = &nbio_v7_9_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2415 adev->nbio.funcs = &nbio_v7_2_funcs; in amdgpu_discovery_set_ip_blocks()
2416 adev->nbio.hdp_flush_reg = &nbio_v7_2_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2426 adev->nbio.funcs = &nbio_v2_3_funcs; in amdgpu_discovery_set_ip_blocks()
2427 adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2431 if (amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_ip_blocks()
2432 adev->nbio.funcs = &nbio_v4_3_sriov_funcs; in amdgpu_discovery_set_ip_blocks()
2434 adev->nbio.funcs = &nbio_v4_3_funcs; in amdgpu_discovery_set_ip_blocks()
2435 adev->nbio.hdp_flush_reg = &nbio_v4_3_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2439 adev->nbio.funcs = &nbio_v7_7_funcs; in amdgpu_discovery_set_ip_blocks()
2440 adev->nbio.hdp_flush_reg = &nbio_v7_7_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2446 switch (adev->ip_versions[HDP_HWIP][0]) { in amdgpu_discovery_set_ip_blocks()
2456 adev->hdp.funcs = &hdp_v4_0_funcs; in amdgpu_discovery_set_ip_blocks()
2464 adev->hdp.funcs = &hdp_v5_0_funcs; in amdgpu_discovery_set_ip_blocks()
2467 adev->hdp.funcs = &hdp_v5_2_funcs; in amdgpu_discovery_set_ip_blocks()
2472 adev->hdp.funcs = &hdp_v6_0_funcs; in amdgpu_discovery_set_ip_blocks()
2478 switch (adev->ip_versions[DF_HWIP][0]) { in amdgpu_discovery_set_ip_blocks()
2482 adev->df.funcs = &df_v3_6_funcs; in amdgpu_discovery_set_ip_blocks()
2489 adev->df.funcs = &df_v1_7_funcs; in amdgpu_discovery_set_ip_blocks()
2492 adev->df.funcs = &df_v4_3_funcs; in amdgpu_discovery_set_ip_blocks()
2498 switch (adev->ip_versions[SMUIO_HWIP][0]) { in amdgpu_discovery_set_ip_blocks()
2504 adev->smuio.funcs = &smuio_v9_0_funcs; in amdgpu_discovery_set_ip_blocks()
2512 adev->smuio.funcs = &smuio_v11_0_funcs; in amdgpu_discovery_set_ip_blocks()
2521 adev->smuio.funcs = &smuio_v11_0_6_funcs; in amdgpu_discovery_set_ip_blocks()
2524 adev->smuio.funcs = &smuio_v13_0_funcs; in amdgpu_discovery_set_ip_blocks()
2527 adev->smuio.funcs = &smuio_v13_0_3_funcs; in amdgpu_discovery_set_ip_blocks()
2528 if (adev->smuio.funcs->get_pkg_type(adev) == AMDGPU_PKG_TYPE_APU) { in amdgpu_discovery_set_ip_blocks()
2529 adev->flags |= AMD_IS_APU; in amdgpu_discovery_set_ip_blocks()
2535 adev->smuio.funcs = &smuio_v13_0_6_funcs; in amdgpu_discovery_set_ip_blocks()
2541 switch (adev->ip_versions[LSDMA_HWIP][0]) { in amdgpu_discovery_set_ip_blocks()
2546 adev->lsdma.funcs = &lsdma_v6_0_funcs; in amdgpu_discovery_set_ip_blocks()
2552 r = amdgpu_discovery_set_common_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2556 r = amdgpu_discovery_set_gmc_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2561 if (amdgpu_sriov_vf(adev)) { in amdgpu_discovery_set_ip_blocks()
2562 r = amdgpu_discovery_set_psp_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2565 r = amdgpu_discovery_set_ih_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2569 r = amdgpu_discovery_set_ih_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2573 if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { in amdgpu_discovery_set_ip_blocks()
2574 r = amdgpu_discovery_set_psp_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2580 if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { in amdgpu_discovery_set_ip_blocks()
2581 r = amdgpu_discovery_set_smu_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2586 r = amdgpu_discovery_set_display_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2590 r = amdgpu_discovery_set_gc_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2594 r = amdgpu_discovery_set_sdma_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2598 if ((adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT && in amdgpu_discovery_set_ip_blocks()
2599 !amdgpu_sriov_vf(adev)) || in amdgpu_discovery_set_ip_blocks()
2600 (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO && amdgpu_dpm == 1)) { in amdgpu_discovery_set_ip_blocks()
2601 r = amdgpu_discovery_set_smu_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2606 r = amdgpu_discovery_set_mm_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
2610 r = amdgpu_discovery_set_mes_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()