115 	struct amdgpu_device		*adev;
291 struct amdgpu_device;
337 void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
339 int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
341 bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev,
370 int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev,
375 amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev,
378 int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
384 bool amdgpu_get_bios(struct amdgpu_device *adev);
385 bool amdgpu_read_bios(struct amdgpu_device *adev);
386 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
448 	struct amdgpu_device		*adev;
491 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
492 void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb);
497 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
541 	bool (*read_disabled_bios)(struct amdgpu_device *adev);
542 	bool (*read_bios_from_rom)(struct amdgpu_device *adev,
544 	int (*read_register)(struct amdgpu_device *adev, u32 se_num,
546 	void (*set_vga_state)(struct amdgpu_device *adev, bool state);
547 	int (*reset)(struct amdgpu_device *adev);
548 	enum amd_reset_method (*reset_method)(struct amdgpu_device *adev);
550 	u32 (*get_xclk)(struct amdgpu_device *adev);
552 	int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
553 	int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
555 	int (*get_pcie_lanes)(struct amdgpu_device *adev);
556 	void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
558 	u32 (*get_config_memsize)(struct amdgpu_device *adev);
560 	void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
562 	void (*invalidate_hdp)(struct amdgpu_device *adev,
565 	bool (*need_full_reset)(struct amdgpu_device *adev);
567 	void (*init_doorbell_index)(struct amdgpu_device *adev);
569 	void (*get_pcie_usage)(struct amdgpu_device *adev, uint64_t *count0,
572 	bool (*need_reset_on_init)(struct amdgpu_device *adev);
574 	uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);
576 	bool (*supports_baco)(struct amdgpu_device *adev);
578 	void (*pre_asic_init)(struct amdgpu_device *adev);
580 	int (*update_umd_stable_pstate)(struct amdgpu_device *adev, bool enter);
582 	int (*query_video_codecs)(struct amdgpu_device *adev, bool encode,
611 struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
617 typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device*, uint32_t);
618 typedef void (*amdgpu_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
620 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device*, uint64_t);
621 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device*, uint64_t, uint32_t);
623 typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device*, uint32_t);
624 typedef void (*amdgpu_wreg64_t)(struct amdgpu_device*, uint32_t, uint64_t);
626 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
627 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t);
684 	int8_t (*logical_to_dev_inst)(struct amdgpu_device *adev,
687 	uint32_t (*logical_to_dev_mask)(struct amdgpu_device *adev,
754 	int (*init_mqd)(struct amdgpu_device *adev, void *mqd,
768 struct amdgpu_device {  struct
1087 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)  in drm_to_adev()  argument
1089 	return container_of(ddev, struct amdgpu_device, ddev);  in drm_to_adev()
1092 static inline struct drm_device *adev_to_drm(struct amdgpu_device *adev)  in adev_to_drm()
1097 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_device *bdev)  in amdgpu_ttm_adev()
1099 	return container_of(bdev, struct amdgpu_device, mman.bdev);  in amdgpu_ttm_adev()
1102 int amdgpu_device_init(struct amdgpu_device *adev,
1104 void amdgpu_device_fini_hw(struct amdgpu_device *adev);
1105 void amdgpu_device_fini_sw(struct amdgpu_device *adev);
1107 int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev);
1109 void amdgpu_device_mm_access(struct amdgpu_device *adev, loff_t pos,
1111 size_t amdgpu_device_aper_access(struct amdgpu_device *adev, loff_t pos,
1114 void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
1116 uint32_t amdgpu_device_wait_on_rreg(struct amdgpu_device *adev,
1119 uint32_t amdgpu_device_rreg(struct amdgpu_device *adev,
1121 u32 amdgpu_device_indirect_rreg_ext(struct amdgpu_device *adev,
1123 void amdgpu_device_wreg(struct amdgpu_device *adev,
1126 void amdgpu_device_indirect_wreg_ext(struct amdgpu_device *adev,
1128 void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
1130 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);
1131 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
1133 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
1135 u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
1137 void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
1139 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
1141 u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev);
1143 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
1145 void amdgpu_device_set_sriov_virtual_display(struct amdgpu_device *adev);
1147 int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
1153 int emu_soc_asic_init(struct amdgpu_device *adev);
1288 bool amdgpu_device_has_job_running(struct amdgpu_device *adev);
1289 bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
1290 int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
1293 void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
1294 int amdgpu_device_pci_reset(struct amdgpu_device *adev);
1295 bool amdgpu_device_need_post(struct amdgpu_device *adev);
1297 bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
1300 void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
1302 int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev);
1303 void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
1307 int amdgpu_device_mode1_reset(struct amdgpu_device *adev);
1313 bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
1314 				      struct amdgpu_device *peer_adev);
1318 void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
1320 void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
1323 void amdgpu_device_halt(struct amdgpu_device *adev);
1324 u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev,
1326 void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,
1328 struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
1330 bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev);
1361 int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags);
1369 int amdgpu_device_ip_suspend(struct amdgpu_device *adev);
1412 int amdgpu_acpi_init(struct amdgpu_device *adev);
1413 void amdgpu_acpi_fini(struct amdgpu_device *adev);
1414 bool amdgpu_acpi_is_pcie_performance_request_supported(struct amdgpu_device *adev);
1416 int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev,
1418 int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
1421 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
1422 int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev, u64 *tmr_offset,
1424 int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, int xcc_id,
1428 bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev);
1432 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }  in amdgpu_acpi_init()
1433 static inline int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev,  in amdgpu_acpi_get_tmr_info()
1438 static inline int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev,  in amdgpu_acpi_get_mem_info()
1444 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }  in amdgpu_acpi_fini()
1445 static inline bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev) { return false; }  in amdgpu_acpi_should_gpu_reset()
1449 static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,  in amdgpu_acpi_power_shift_control()
1456 bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
1457 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1459 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }  in amdgpu_acpi_is_s0ix_active()
1460 static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }  in amdgpu_acpi_is_s3_active()
1464 int amdgpu_dm_display_resume(struct amdgpu_device *adev );
1466 static inline int amdgpu_dm_display_resume(struct amdgpu_device *adev) { return 0; }  in amdgpu_dm_display_resume()
1470 void amdgpu_register_gpu_instance(struct amdgpu_device *adev);
1471 void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev);
1482 bool amdgpu_device_skip_hw_access(struct amdgpu_device *adev);
1484 int amdgpu_device_set_cg_state(struct amdgpu_device *adev,
1486 int amdgpu_device_set_pg_state(struct amdgpu_device *adev,
1489 static inline bool amdgpu_device_has_timeouts_enabled(struct amdgpu_device *adev)  in amdgpu_device_has_timeouts_enabled()
1500 static inline bool amdgpu_is_tmz(struct amdgpu_device *adev)  in amdgpu_is_tmz()
1505 int amdgpu_in_reset(struct amdgpu_device *adev);