17 struct sa1100_gpio_chip {  struct
27 #define sa1100_gpio_chip(x) container_of(x, struct sa1100_gpio_chip, chip)  argument
42 	return readl_relaxed(sa1100_gpio_chip(chip)->membase + R_GPLR) &  in sa1100_gpio_get()
50 	writel_relaxed(BIT(offset), sa1100_gpio_chip(chip)->membase + reg);  in sa1100_gpio_set()
55 	void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;  in sa1100_get_direction()
65 	void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;  in sa1100_direction_input()
77 	void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;  in sa1100_direction_output()
90 	return sa1100_gpio_chip(chip)->irqbase + offset;  in sa1100_to_irq()
93 static struct sa1100_gpio_chip sa1100_gpio_chip = {  variable
114 static void sa1100_update_edge_regs(struct sa1100_gpio_chip *sgc)  in sa1100_update_edge_regs()
128 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_type()
156 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_ack()
163 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_mask()
173 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_unmask()
183 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_wake()
209 	struct sa1100_gpio_chip *sgc = d->host_data;  in sa1100_gpio_irqdomain_map()
232 	struct sa1100_gpio_chip *sgc = irq_desc_get_handler_data(desc);  in sa1100_gpio_handler()
258 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_gpio_suspend()
277 	sa1100_update_edge_regs(&sa1100_gpio_chip);  in sa1100_gpio_resume()
312 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_init_gpio()
320 	gpiochip_add_data(&sa1100_gpio_chip.chip, NULL);  in sa1100_init_gpio()