35 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_get_direction()  local
37 	return r->direction & BIT(offset) ? GPIO_LINE_DIRECTION_IN :  in gpio_reg_get_direction()
44 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_direction_output()  local
46 	if (r->direction & BIT(offset))  in gpio_reg_direction_output()
55 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_direction_input()  local
57 	return r->direction & BIT(offset) ? 0 : -ENOTSUPP;  in gpio_reg_direction_input()
62 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_set()  local
66 	spin_lock_irqsave(&r->lock, flags);  in gpio_reg_set()
67 	val = r->out;  in gpio_reg_set()
72 	r->out = val;  in gpio_reg_set()
73 	writel_relaxed(val, r->reg);  in gpio_reg_set()
74 	spin_unlock_irqrestore(&r->lock, flags);  in gpio_reg_set()
79 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_get()  local
82 	if (r->direction & mask) {  in gpio_reg_get()
87 		readl_relaxed(r->reg);  in gpio_reg_get()
88 		val = readl_relaxed(r->reg);  in gpio_reg_get()
90 		val = r->out;  in gpio_reg_get()
98 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_set_multiple()  local
101 	spin_lock_irqsave(&r->lock, flags);  in gpio_reg_set_multiple()
102 	r->out = (r->out & ~*mask) | (*bits & *mask);  in gpio_reg_set_multiple()
103 	writel_relaxed(r->out, r->reg);  in gpio_reg_set_multiple()
104 	spin_unlock_irqrestore(&r->lock, flags);  in gpio_reg_set_multiple()
109 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_to_irq()  local
110 	int irq = r->irqs[offset];  in gpio_reg_to_irq()
112 	if (irq >= 0 && r->irqdomain)  in gpio_reg_to_irq()
113 		irq = irq_find_mapping(r->irqdomain, irq);  in gpio_reg_to_irq()
143 	struct gpio_reg *r;  in gpio_reg_init()  local
147 		r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);  in gpio_reg_init()
149 		r = kzalloc(sizeof(*r), GFP_KERNEL);  in gpio_reg_init()
151 	if (!r)  in gpio_reg_init()
154 	spin_lock_init(&r->lock);  in gpio_reg_init()
156 	r->gc.label = label;  in gpio_reg_init()
157 	r->gc.get_direction = gpio_reg_get_direction;  in gpio_reg_init()
158 	r->gc.direction_input = gpio_reg_direction_input;  in gpio_reg_init()
159 	r->gc.direction_output = gpio_reg_direction_output;  in gpio_reg_init()
160 	r->gc.set = gpio_reg_set;  in gpio_reg_init()
161 	r->gc.get = gpio_reg_get;  in gpio_reg_init()
162 	r->gc.set_multiple = gpio_reg_set_multiple;  in gpio_reg_init()
164 		r->gc.to_irq = gpio_reg_to_irq;  in gpio_reg_init()
165 	r->gc.base = base;  in gpio_reg_init()
166 	r->gc.ngpio = num;  in gpio_reg_init()
167 	r->gc.names = names;  in gpio_reg_init()
168 	r->direction = direction;  in gpio_reg_init()
169 	r->out = def_out;  in gpio_reg_init()
170 	r->reg = reg;  in gpio_reg_init()
171 	r->irqs = irqs;  in gpio_reg_init()
174 		ret = devm_gpiochip_add_data(dev, &r->gc, r);  in gpio_reg_init()
176 		ret = gpiochip_add_data(&r->gc, r);  in gpio_reg_init()
178 	return ret ? ERR_PTR(ret) : &r->gc;  in gpio_reg_init()
183 	struct gpio_reg *r = to_gpio_reg(gc);  in gpio_reg_resume()  local
186 	spin_lock_irqsave(&r->lock, flags);  in gpio_reg_resume()
187 	writel_relaxed(r->out, r->reg);  in gpio_reg_resume()
188 	spin_unlock_irqrestore(&r->lock, flags);  in gpio_reg_resume()