97 	u32 val = readl_relaxed(reg);  in omap_gpio_rmw()
295 			readl_relaxed(bank->base + bank->regs->leveldetect0);  in omap_set_gpio_trigger()
297 			readl_relaxed(bank->base + bank->regs->leveldetect1);  in omap_set_gpio_trigger()
299 			readl_relaxed(bank->base + bank->regs->risingdetect);  in omap_set_gpio_trigger()
301 			readl_relaxed(bank->base + bank->regs->fallingdetect);  in omap_set_gpio_trigger()
330 		writel_relaxed(readl_relaxed(reg) ^ BIT(gpio), reg);  in omap_toggle_gpio_edge_triggering()
345 		l = readl_relaxed(reg);  in omap_set_gpio_triggering()
363 		l = readl_relaxed(reg);  in omap_set_gpio_triggering()
380 		writel_relaxed(readl_relaxed(reg) | (BIT(offset)), reg);  in omap_enable_gpio_module()
387 		ctrl = readl_relaxed(reg);  in omap_enable_gpio_module()
401 		ctrl = readl_relaxed(reg);  in omap_disable_gpio_module()
413 	return readl_relaxed(reg) & BIT(offset);  in omap_gpio_is_input()
484 	readl_relaxed(reg);  in omap_clear_gpio_irqbank()
500 	l = readl_relaxed(reg);  in omap_get_gpio_irqbank_mask()
580 		isr = readl_relaxed(isr_reg) & enabled;  in omap_gpio_irq_handler()
846 	if (readl_relaxed(bank->base + bank->regs->direction) & BIT(offset))  in omap_gpio_get_direction()
874 	return (readl_relaxed(reg) & BIT(offset)) != 0;  in omap_gpio_get()
897 	direction = readl_relaxed(base + bank->regs->direction);  in omap_gpio_get_multiple()
901 		val |= readl_relaxed(base + bank->regs->datain) & m;  in omap_gpio_get_multiple()
905 		val |= readl_relaxed(base + bank->regs->dataout) & m;  in omap_gpio_get_multiple()
976 	l = (readl_relaxed(reg) & ~*mask) | (*bits & *mask);  in omap_gpio_set_multiple()
1020 	bank->context.oe = readl_relaxed(bank->base + bank->regs->direction);  in omap_gpio_mod_init()
1095 	p->context.sysconfig	= readl_relaxed(base + regs->sysconfig);  in omap_gpio_init_context()
1096 	p->context.ctrl		= readl_relaxed(base + regs->ctrl);  in omap_gpio_init_context()
1097 	p->context.oe		= readl_relaxed(base + regs->direction);  in omap_gpio_init_context()
1098 	p->context.wake_en	= readl_relaxed(base + regs->wkup_en);  in omap_gpio_init_context()
1099 	p->context.leveldetect0	= readl_relaxed(base + regs->leveldetect0);  in omap_gpio_init_context()
1100 	p->context.leveldetect1	= readl_relaxed(base + regs->leveldetect1);  in omap_gpio_init_context()
1101 	p->context.risingdetect	= readl_relaxed(base + regs->risingdetect);  in omap_gpio_init_context()
1102 	p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect);  in omap_gpio_init_context()
1103 	p->context.irqenable1	= readl_relaxed(base + regs->irqenable);  in omap_gpio_init_context()
1104 	p->context.irqenable2	= readl_relaxed(base + regs->irqenable2);  in omap_gpio_init_context()
1105 	p->context.dataout	= readl_relaxed(base + regs->dataout);  in omap_gpio_init_context()
1141 	bank->saved_datain = readl_relaxed(base + bank->regs->datain);  in omap_gpio_idle()
1145 		bank->context.sysconfig = readl_relaxed(base + bank->regs->sysconfig);  in omap_gpio_idle()
1222 	l = readl_relaxed(bank->base + bank->regs->datain);  in omap_gpio_unidle()
1252 		old0 = readl_relaxed(bank->base + bank->regs->leveldetect0);  in omap_gpio_unidle()
1253 		old1 = readl_relaxed(bank->base + bank->regs->leveldetect1);  in omap_gpio_unidle()
1290 		isr = readl_relaxed(bank->base + bank->regs->irqstatus) & mask;  in gpio_omap_cpu_notifier()