Lines Matching refs:KUNIT_EXPECT_EQ
209 KUNIT_EXPECT_EQ(test, ret, 0); in fpga_mgr_test_lock()
212 KUNIT_EXPECT_EQ(test, ret, -EBUSY); in fpga_mgr_test_lock()
230 KUNIT_EXPECT_EQ(test, ret, 0); in fpga_mgr_test_img_load_buf()
235 KUNIT_EXPECT_EQ(test, ctx->stats.op_parse_header_state, FPGA_MGR_STATE_PARSE_HEADER); in fpga_mgr_test_img_load_buf()
236 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_state, FPGA_MGR_STATE_WRITE_INIT); in fpga_mgr_test_img_load_buf()
237 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_state, FPGA_MGR_STATE_WRITE); in fpga_mgr_test_img_load_buf()
238 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_state, FPGA_MGR_STATE_WRITE_COMPLETE); in fpga_mgr_test_img_load_buf()
240 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_seq, ctx->stats.op_parse_header_seq + 1); in fpga_mgr_test_img_load_buf()
241 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_seq, ctx->stats.op_parse_header_seq + 2); in fpga_mgr_test_img_load_buf()
242 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_seq, ctx->stats.op_parse_header_seq + 3); in fpga_mgr_test_img_load_buf()
263 KUNIT_EXPECT_EQ(test, ret, 0); in fpga_mgr_test_img_load_sgt()
268 KUNIT_EXPECT_EQ(test, ctx->stats.op_parse_header_state, FPGA_MGR_STATE_PARSE_HEADER); in fpga_mgr_test_img_load_sgt()
269 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_state, FPGA_MGR_STATE_WRITE_INIT); in fpga_mgr_test_img_load_sgt()
270 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_sg_state, FPGA_MGR_STATE_WRITE); in fpga_mgr_test_img_load_sgt()
271 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_state, FPGA_MGR_STATE_WRITE_COMPLETE); in fpga_mgr_test_img_load_sgt()
273 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_seq, ctx->stats.op_parse_header_seq + 1); in fpga_mgr_test_img_load_sgt()
274 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_sg_seq, ctx->stats.op_parse_header_seq + 2); in fpga_mgr_test_img_load_sgt()
275 KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_seq, ctx->stats.op_parse_header_seq + 3); in fpga_mgr_test_img_load_sgt()