Lines Matching refs:reg_write
527 static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) in reg_write() function
554 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); in read_phy_reg()
580 reg_write(ohci, OHCI1394_PhyControl, in write_phy_reg()
672 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ar_context_link_page()
697 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in ar_context_abort()
1034 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); in ar_context_run()
1035 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); in ar_context_run()
1212 reg_write(ohci, COMMAND_PTR(ctx->regs), in context_run()
1214 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); in context_run()
1215 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); in context_run()
1262 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in context_stop()
1409 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in at_context_queue_packet()
1568 reg_write(ohci, OHCI1394_CSRData, lock_data); in handle_local_lock()
1569 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); in handle_local_lock()
1570 reg_write(ohci, OHCI1394_CSRControl, sel); in handle_local_lock()
1761 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); in update_bus_time()
1909 reg_write(ohci, OHCI1394_LinkControlSet, in bus_reset_work()
2014 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); in bus_reset_work()
2043 reg_write(ohci, OHCI1394_BusOptions, in bus_reset_work()
2046 reg_write(ohci, OHCI1394_ConfigROMhdr, in bus_reset_work()
2051 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); in bus_reset_work()
2052 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); in bus_reset_work()
2083 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2104 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); in irq_handler()
2116 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); in irq_handler()
2132 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2141 reg_write(ohci, OHCI1394_LinkControlSet, in irq_handler()
2174 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); in software_reset()
2240 reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); in configure_1394a_enhancements()
2243 reg_write(ohci, OHCI1394_HCControlClear, in configure_1394a_enhancements()
2297 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2323 reg_write(ohci, OHCI1394_HCControlClear, in ohci_enable()
2326 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); in ohci_enable()
2327 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2331 reg_write(ohci, OHCI1394_ATRetries, in ohci_enable()
2341 reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), in ohci_enable()
2346 reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, in ohci_enable()
2352 reg_write(ohci, OHCI1394_FairnessControl, 0x3f); in ohci_enable()
2354 reg_write(ohci, OHCI1394_FairnessControl, 0); in ohci_enable()
2357 reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); in ohci_enable()
2358 reg_write(ohci, OHCI1394_IntEventClear, ~0); in ohci_enable()
2359 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in ohci_enable()
2407 reg_write(ohci, OHCI1394_ConfigROMhdr, 0); in ohci_enable()
2408 reg_write(ohci, OHCI1394_BusOptions, in ohci_enable()
2410 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_enable()
2412 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); in ohci_enable()
2426 reg_write(ohci, OHCI1394_IntMaskSet, irqs); in ohci_enable()
2428 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2432 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2512 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_set_config_rom()
2609 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); in ohci_enable_phys_dma()
2611 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); in ohci_enable_phys_dma()
2679 reg_write(ohci, OHCI1394_LinkControlClear, in ohci_write_csr()
2689 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_write_csr()
2698 reg_write(ohci, OHCI1394_NodeID, value >> 16); in ohci_write_csr()
2703 reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); in ohci_write_csr()
2704 reg_write(ohci, OHCI1394_IntEventSet, in ohci_write_csr()
2719 reg_write(ohci, OHCI1394_ATRetries, value); in ohci_write_csr()
2724 reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); in ohci_write_csr()
2933 reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); in set_multichannel_mask()
2934 reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); in set_multichannel_mask()
2935 reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); in set_multichannel_mask()
2936 reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); in set_multichannel_mask()
3058 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); in ohci_start_iso()
3059 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); in ohci_start_iso()
3074 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); in ohci_start_iso()
3075 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); in ohci_start_iso()
3076 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); in ohci_start_iso()
3097 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); in ohci_stop_iso()
3103 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); in ohci_stop_iso()
3472 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ohci_flush_queue_iso()
3665 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); in pci_probe()
3668 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); in pci_probe()
3676 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); in pci_probe()
3683 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); in pci_probe()
3739 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in pci_remove()
3794 reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); in pci_resume()
3795 reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); in pci_resume()