Lines Matching refs:ohci
44 #define ohci_info(ohci, f, args...) dev_info(ohci->card.device, f, ##args) argument
45 #define ohci_notice(ohci, f, args...) dev_notice(ohci->card.device, f, ##args) argument
46 #define ohci_err(ohci, f, args...) dev_err(ohci->card.device, f, ##args) argument
88 struct fw_ohci *ohci; member
118 struct fw_ohci *ohci; member
366 static void log_irqs(struct fw_ohci *ohci, u32 evt) in log_irqs() argument
376 ohci_notice(ohci, "IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt, in log_irqs()
415 static void log_selfids(struct fw_ohci *ohci, int generation, int self_id_count) in log_selfids() argument
422 ohci_notice(ohci, "%d selfIDs, generation %d, local node ID %04x\n", in log_selfids()
423 self_id_count, generation, ohci->node_id); in log_selfids()
425 for (s = ohci->self_id_buffer; self_id_count--; ++s) in log_selfids()
427 ohci_notice(ohci, in log_selfids()
434 ohci_notice(ohci, in log_selfids()
471 static void log_ar_at_event(struct fw_ohci *ohci, in log_ar_at_event() argument
484 ohci_notice(ohci, "A%c evt_bus_reset, generation %d\n", in log_ar_at_event()
504 ohci_notice(ohci, "A%c %s, %s\n", in log_ar_at_event()
508 ohci_notice(ohci, "A%c %s, PHY %08x %08x\n", in log_ar_at_event()
512 ohci_notice(ohci, in log_ar_at_event()
519 ohci_notice(ohci, in log_ar_at_event()
527 static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) in reg_write() argument
529 writel(data, ohci->registers + offset); in reg_write()
532 static inline u32 reg_read(const struct fw_ohci *ohci, int offset) in reg_read() argument
534 return readl(ohci->registers + offset); in reg_read()
537 static inline void flush_writes(const struct fw_ohci *ohci) in flush_writes() argument
540 reg_read(ohci, OHCI1394_Version); in flush_writes()
549 static int read_phy_reg(struct fw_ohci *ohci, int addr) in read_phy_reg() argument
554 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); in read_phy_reg()
556 val = reg_read(ohci, OHCI1394_PhyControl); in read_phy_reg()
570 ohci_err(ohci, "failed to read phy reg %d\n", addr); in read_phy_reg()
576 static int write_phy_reg(const struct fw_ohci *ohci, int addr, u32 val) in write_phy_reg() argument
580 reg_write(ohci, OHCI1394_PhyControl, in write_phy_reg()
583 val = reg_read(ohci, OHCI1394_PhyControl); in write_phy_reg()
593 ohci_err(ohci, "failed to write phy reg %d, val %u\n", addr, val); in write_phy_reg()
599 static int update_phy_reg(struct fw_ohci *ohci, int addr, in update_phy_reg() argument
602 int ret = read_phy_reg(ohci, addr); in update_phy_reg()
613 return write_phy_reg(ohci, addr, (ret & ~clear_bits) | set_bits); in update_phy_reg()
616 static int read_paged_phy_reg(struct fw_ohci *ohci, int page, int addr) in read_paged_phy_reg() argument
620 ret = update_phy_reg(ohci, 7, PHY_PAGE_SELECT, page << 5); in read_paged_phy_reg()
624 return read_phy_reg(ohci, addr); in read_paged_phy_reg()
629 struct fw_ohci *ohci = fw_ohci(card); in ohci_read_phy_reg() local
632 mutex_lock(&ohci->phy_reg_mutex); in ohci_read_phy_reg()
633 ret = read_phy_reg(ohci, addr); in ohci_read_phy_reg()
634 mutex_unlock(&ohci->phy_reg_mutex); in ohci_read_phy_reg()
642 struct fw_ohci *ohci = fw_ohci(card); in ohci_update_phy_reg() local
645 mutex_lock(&ohci->phy_reg_mutex); in ohci_update_phy_reg()
646 ret = update_phy_reg(ohci, addr, clear_bits, set_bits); in ohci_update_phy_reg()
647 mutex_unlock(&ohci->phy_reg_mutex); in ohci_update_phy_reg()
672 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ar_context_link_page()
677 struct device *dev = ctx->ohci->card.device; in ar_context_release()
694 struct fw_ohci *ohci = ctx->ohci; in ar_context_abort() local
696 if (reg_read(ohci, CONTROL_CLEAR(ctx->regs)) & CONTEXT_RUN) { in ar_context_abort()
697 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in ar_context_abort()
698 flush_writes(ohci); in ar_context_abort()
700 ohci_err(ohci, "AR error: %s; DMA stopped\n", error_msg); in ar_context_abort()
782 dma_sync_single_for_cpu(ctx->ohci->card.device, in ar_sync_buffers_for_cpu()
788 dma_sync_single_for_cpu(ctx->ohci->card.device, in ar_sync_buffers_for_cpu()
795 (ohci->quirks & QUIRK_BE_HEADERS ? (__force __u32)(v) : le32_to_cpu(v))
802 struct fw_ohci *ohci = ctx->ohci; in handle_ar_packet() local
861 p.generation = ohci->request_generation; in handle_ar_packet()
863 log_ar_at_event(ohci, 'R', p.speed, p.header, evt); in handle_ar_packet()
887 if (!(ohci->quirks & QUIRK_RESET_PACKET)) in handle_ar_packet()
888 ohci->request_generation = (p.header[2] >> 16) & 0xff; in handle_ar_packet()
889 } else if (ctx == &ohci->ar_request_ctx) { in handle_ar_packet()
890 fw_core_handle_request(&ohci->card, &p); in handle_ar_packet()
892 fw_core_handle_response(&ohci->card, &p); in handle_ar_packet()
918 dma_sync_single_for_device(ctx->ohci->card.device, in ar_recycle_buffers()
972 static int ar_context_init(struct ar_context *ctx, struct fw_ohci *ohci, in ar_context_init() argument
975 struct device *dev = ohci->card.device; in ar_context_init()
982 ctx->ohci = ohci; in ar_context_init()
1003 ctx->descriptors = ohci->misc_buffer + descriptors_offset; in ar_context_init()
1004 ctx->descriptors_bus = ohci->misc_buffer_bus + descriptors_offset; in ar_context_init()
1034 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); in ar_context_run()
1035 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); in ar_context_run()
1086 spin_lock_irqsave(&ctx->ohci->lock, flags); in context_tasklet()
1088 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in context_tasklet()
1111 desc = dmam_alloc_coherent(ctx->ohci->card.device, PAGE_SIZE, &bus_addr, GFP_ATOMIC); in context_add_buffer()
1132 static int context_init(struct context *ctx, struct fw_ohci *ohci, in context_init() argument
1135 ctx->ohci = ohci; in context_init()
1167 struct fw_card *card = &ctx->ohci->card; in context_release()
1210 struct fw_ohci *ohci = ctx->ohci; in context_run() local
1212 reg_write(ohci, COMMAND_PTR(ctx->regs), in context_run()
1214 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); in context_run()
1215 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); in context_run()
1217 flush_writes(ohci); in context_run()
1245 if (unlikely(ctx->ohci->quirks & QUIRK_IR_WAKE) && in context_append()
1258 struct fw_ohci *ohci = ctx->ohci; in context_stop() local
1262 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in context_stop()
1266 reg = reg_read(ohci, CONTROL_SET(ctx->regs)); in context_stop()
1273 ohci_err(ohci, "DMA context still active (0x%08x)\n", reg); in context_stop()
1289 struct fw_ohci *ohci = ctx->ohci; in at_context_queue_packet() local
1368 payload_bus = dma_map_single(ohci->card.device, in at_context_queue_packet()
1372 if (dma_mapping_error(ohci->card.device, payload_bus)) { in at_context_queue_packet()
1398 if (ohci->generation != packet->generation) { in at_context_queue_packet()
1400 dma_unmap_single(ohci->card.device, payload_bus, in at_context_queue_packet()
1409 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in at_context_queue_packet()
1433 struct fw_ohci *ohci = context->ohci; in handle_at_packet() local
1447 dma_unmap_single(ohci->card.device, packet->payload_bus, in handle_at_packet()
1453 log_ar_at_event(ohci, 'T', packet->speed, packet->header, evt); in handle_at_packet()
1503 packet->callback(packet, &ohci->card, packet->ack); in handle_at_packet()
1514 static void handle_local_rom(struct fw_ohci *ohci, in handle_local_rom() argument
1535 (void *) ohci->config_rom + i, length); in handle_local_rom()
1538 fw_core_handle_response(&ohci->card, &response); in handle_local_rom()
1541 static void handle_local_lock(struct fw_ohci *ohci, in handle_local_lock() argument
1568 reg_write(ohci, OHCI1394_CSRData, lock_data); in handle_local_lock()
1569 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); in handle_local_lock()
1570 reg_write(ohci, OHCI1394_CSRControl, sel); in handle_local_lock()
1573 if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) { in handle_local_lock()
1574 lock_old = cpu_to_be32(reg_read(ohci, in handle_local_lock()
1582 ohci_err(ohci, "swap not done (CSR lock timeout)\n"); in handle_local_lock()
1586 fw_core_handle_response(&ohci->card, &response); in handle_local_lock()
1593 if (ctx == &ctx->ohci->at_request_ctx) { in handle_local_request()
1595 packet->callback(packet, &ctx->ohci->card, packet->ack); in handle_local_request()
1606 handle_local_rom(ctx->ohci, packet, csr); in handle_local_request()
1612 handle_local_lock(ctx->ohci, packet, csr); in handle_local_request()
1615 if (ctx == &ctx->ohci->at_request_ctx) in handle_local_request()
1616 fw_core_handle_request(&ctx->ohci->card, packet); in handle_local_request()
1618 fw_core_handle_response(&ctx->ohci->card, packet); in handle_local_request()
1622 if (ctx == &ctx->ohci->at_response_ctx) { in handle_local_request()
1624 packet->callback(packet, &ctx->ohci->card, packet->ack); in handle_local_request()
1628 static u32 get_cycle_time(struct fw_ohci *ohci);
1635 spin_lock_irqsave(&ctx->ohci->lock, flags); in at_context_transmit()
1637 if (HEADER_GET_DESTINATION(packet->header[0]) == ctx->ohci->node_id && in at_context_transmit()
1638 ctx->ohci->generation == packet->generation) { in at_context_transmit()
1639 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in at_context_transmit()
1642 packet->timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ctx->ohci)); in at_context_transmit()
1649 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in at_context_transmit()
1653 packet->timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ctx->ohci)); in at_context_transmit()
1655 packet->callback(packet, &ctx->ohci->card, packet->ack); in at_context_transmit()
1659 static void detect_dead_context(struct fw_ohci *ohci, in detect_dead_context() argument
1664 ctl = reg_read(ohci, CONTROL_SET(regs)); in detect_dead_context()
1666 ohci_err(ohci, "DMA context %s has stopped, error code: %s\n", in detect_dead_context()
1670 static void handle_dead_contexts(struct fw_ohci *ohci) in handle_dead_contexts() argument
1675 detect_dead_context(ohci, "ATReq", OHCI1394_AsReqTrContextBase); in handle_dead_contexts()
1676 detect_dead_context(ohci, "ATRsp", OHCI1394_AsRspTrContextBase); in handle_dead_contexts()
1677 detect_dead_context(ohci, "ARReq", OHCI1394_AsReqRcvContextBase); in handle_dead_contexts()
1678 detect_dead_context(ohci, "ARRsp", OHCI1394_AsRspRcvContextBase); in handle_dead_contexts()
1680 if (!(ohci->it_context_support & (1 << i))) in handle_dead_contexts()
1683 detect_dead_context(ohci, name, OHCI1394_IsoXmitContextBase(i)); in handle_dead_contexts()
1686 if (!(ohci->ir_context_support & (1 << i))) in handle_dead_contexts()
1689 detect_dead_context(ohci, name, OHCI1394_IsoRcvContextBase(i)); in handle_dead_contexts()
1720 static u32 get_cycle_time(struct fw_ohci *ohci) in get_cycle_time() argument
1727 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1729 if (ohci->quirks & QUIRK_CYCLE_TIMER) { in get_cycle_time()
1732 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1736 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1756 static u32 update_bus_time(struct fw_ohci *ohci) in update_bus_time() argument
1758 u32 cycle_time_seconds = get_cycle_time(ohci) >> 25; in update_bus_time()
1760 if (unlikely(!ohci->bus_time_running)) { in update_bus_time()
1761 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); in update_bus_time()
1762 ohci->bus_time = (lower_32_bits(ktime_get_seconds()) & ~0x7f) | in update_bus_time()
1764 ohci->bus_time_running = true; in update_bus_time()
1767 if ((ohci->bus_time & 0x40) != (cycle_time_seconds & 0x40)) in update_bus_time()
1768 ohci->bus_time += 0x40; in update_bus_time()
1770 return ohci->bus_time | cycle_time_seconds; in update_bus_time()
1773 static int get_status_for_port(struct fw_ohci *ohci, int port_index) in get_status_for_port() argument
1777 mutex_lock(&ohci->phy_reg_mutex); in get_status_for_port()
1778 reg = write_phy_reg(ohci, 7, port_index); in get_status_for_port()
1780 reg = read_phy_reg(ohci, 8); in get_status_for_port()
1781 mutex_unlock(&ohci->phy_reg_mutex); in get_status_for_port()
1794 static int get_self_id_pos(struct fw_ohci *ohci, u32 self_id, in get_self_id_pos() argument
1801 entry = ohci->self_id_buffer[i]; in get_self_id_pos()
1810 static int initiated_reset(struct fw_ohci *ohci) in initiated_reset() argument
1815 mutex_lock(&ohci->phy_reg_mutex); in initiated_reset()
1816 reg = write_phy_reg(ohci, 7, 0xe0); /* Select page 7 */ in initiated_reset()
1818 reg = read_phy_reg(ohci, 8); in initiated_reset()
1820 reg = write_phy_reg(ohci, 8, reg); /* set PMODE bit */ in initiated_reset()
1822 reg = read_phy_reg(ohci, 12); /* read register 12 */ in initiated_reset()
1831 mutex_unlock(&ohci->phy_reg_mutex); in initiated_reset()
1840 static int find_and_insert_self_id(struct fw_ohci *ohci, int self_id_count) in find_and_insert_self_id() argument
1846 reg = reg_read(ohci, OHCI1394_NodeID); in find_and_insert_self_id()
1848 ohci_notice(ohci, in find_and_insert_self_id()
1854 reg = ohci_read_phy_reg(&ohci->card, 4); in find_and_insert_self_id()
1859 reg = ohci_read_phy_reg(&ohci->card, 1); in find_and_insert_self_id()
1865 status = get_status_for_port(ohci, i); in find_and_insert_self_id()
1871 self_id |= initiated_reset(ohci); in find_and_insert_self_id()
1873 pos = get_self_id_pos(ohci, self_id, self_id_count); in find_and_insert_self_id()
1875 memmove(&(ohci->self_id_buffer[pos+1]), in find_and_insert_self_id()
1876 &(ohci->self_id_buffer[pos]), in find_and_insert_self_id()
1877 (self_id_count - pos) * sizeof(*ohci->self_id_buffer)); in find_and_insert_self_id()
1878 ohci->self_id_buffer[pos] = self_id; in find_and_insert_self_id()
1886 struct fw_ohci *ohci = in bus_reset_work() local
1894 reg = reg_read(ohci, OHCI1394_NodeID); in bus_reset_work()
1896 ohci_notice(ohci, in bus_reset_work()
1901 ohci_notice(ohci, "malconfigured bus\n"); in bus_reset_work()
1904 ohci->node_id = reg & (OHCI1394_NodeID_busNumber | in bus_reset_work()
1908 if (!(ohci->is_root && is_new_root)) in bus_reset_work()
1909 reg_write(ohci, OHCI1394_LinkControlSet, in bus_reset_work()
1911 ohci->is_root = is_new_root; in bus_reset_work()
1913 reg = reg_read(ohci, OHCI1394_SelfIDCount); in bus_reset_work()
1915 ohci_notice(ohci, "self ID receive error\n"); in bus_reset_work()
1927 ohci_notice(ohci, "bad selfIDSize (%08x)\n", reg); in bus_reset_work()
1931 generation = (cond_le32_to_cpu(ohci->self_id[0]) >> 16) & 0xff; in bus_reset_work()
1935 u32 id = cond_le32_to_cpu(ohci->self_id[i]); in bus_reset_work()
1936 u32 id2 = cond_le32_to_cpu(ohci->self_id[i + 1]); in bus_reset_work()
1947 ohci_notice(ohci, "ignoring spurious self IDs\n"); in bus_reset_work()
1952 ohci_notice(ohci, "bad self ID %d/%d (%08x != ~%08x)\n", in bus_reset_work()
1956 ohci->self_id_buffer[j] = id; in bus_reset_work()
1959 if (ohci->quirks & QUIRK_TI_SLLZ059) { in bus_reset_work()
1960 self_id_count = find_and_insert_self_id(ohci, self_id_count); in bus_reset_work()
1962 ohci_notice(ohci, in bus_reset_work()
1969 ohci_notice(ohci, "no self IDs\n"); in bus_reset_work()
1988 new_generation = (reg_read(ohci, OHCI1394_SelfIDCount) >> 16) & 0xff; in bus_reset_work()
1990 ohci_notice(ohci, "new bus reset, discarding self ids\n"); in bus_reset_work()
1995 spin_lock_irq(&ohci->lock); in bus_reset_work()
1997 ohci->generation = -1; /* prevent AT packet queueing */ in bus_reset_work()
1998 context_stop(&ohci->at_request_ctx); in bus_reset_work()
1999 context_stop(&ohci->at_response_ctx); in bus_reset_work()
2001 spin_unlock_irq(&ohci->lock); in bus_reset_work()
2008 at_context_flush(&ohci->at_request_ctx); in bus_reset_work()
2009 at_context_flush(&ohci->at_response_ctx); in bus_reset_work()
2011 spin_lock_irq(&ohci->lock); in bus_reset_work()
2013 ohci->generation = generation; in bus_reset_work()
2014 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); in bus_reset_work()
2016 if (ohci->quirks & QUIRK_RESET_PACKET) in bus_reset_work()
2017 ohci->request_generation = generation; in bus_reset_work()
2028 if (ohci->next_config_rom != NULL) { in bus_reset_work()
2029 if (ohci->next_config_rom != ohci->config_rom) { in bus_reset_work()
2030 free_rom = ohci->config_rom; in bus_reset_work()
2031 free_rom_bus = ohci->config_rom_bus; in bus_reset_work()
2033 ohci->config_rom = ohci->next_config_rom; in bus_reset_work()
2034 ohci->config_rom_bus = ohci->next_config_rom_bus; in bus_reset_work()
2035 ohci->next_config_rom = NULL; in bus_reset_work()
2043 reg_write(ohci, OHCI1394_BusOptions, in bus_reset_work()
2044 be32_to_cpu(ohci->config_rom[2])); in bus_reset_work()
2045 ohci->config_rom[0] = ohci->next_header; in bus_reset_work()
2046 reg_write(ohci, OHCI1394_ConfigROMhdr, in bus_reset_work()
2047 be32_to_cpu(ohci->next_header)); in bus_reset_work()
2051 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); in bus_reset_work()
2052 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); in bus_reset_work()
2055 spin_unlock_irq(&ohci->lock); in bus_reset_work()
2058 dmam_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, free_rom, free_rom_bus); in bus_reset_work()
2060 log_selfids(ohci, generation, self_id_count); in bus_reset_work()
2062 fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, in bus_reset_work()
2063 self_id_count, ohci->self_id_buffer, in bus_reset_work()
2064 ohci->csr_state_setclear_abdicate); in bus_reset_work()
2065 ohci->csr_state_setclear_abdicate = false; in bus_reset_work()
2070 struct fw_ohci *ohci = data; in irq_handler() local
2074 event = reg_read(ohci, OHCI1394_IntEventClear); in irq_handler()
2083 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2085 log_irqs(ohci, event); in irq_handler()
2088 queue_work(selfid_workqueue, &ohci->bus_reset_work); in irq_handler()
2091 tasklet_schedule(&ohci->ar_request_ctx.tasklet); in irq_handler()
2094 tasklet_schedule(&ohci->ar_response_ctx.tasklet); in irq_handler()
2097 tasklet_schedule(&ohci->at_request_ctx.tasklet); in irq_handler()
2100 tasklet_schedule(&ohci->at_response_ctx.tasklet); in irq_handler()
2103 iso_event = reg_read(ohci, OHCI1394_IsoRecvIntEventClear); in irq_handler()
2104 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); in irq_handler()
2109 &ohci->ir_context_list[i].context.tasklet); in irq_handler()
2115 iso_event = reg_read(ohci, OHCI1394_IsoXmitIntEventClear); in irq_handler()
2116 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); in irq_handler()
2121 &ohci->it_context_list[i].context.tasklet); in irq_handler()
2127 ohci_err(ohci, "register access failure\n"); in irq_handler()
2130 reg_read(ohci, OHCI1394_PostedWriteAddressHi); in irq_handler()
2131 reg_read(ohci, OHCI1394_PostedWriteAddressLo); in irq_handler()
2132 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2135 ohci_err(ohci, "PCI posted write error\n"); in irq_handler()
2140 ohci_notice(ohci, "isochronous cycle too long\n"); in irq_handler()
2141 reg_write(ohci, OHCI1394_LinkControlSet, in irq_handler()
2153 ohci_notice(ohci, "isochronous cycle inconsistent\n"); in irq_handler()
2157 handle_dead_contexts(ohci); in irq_handler()
2160 spin_lock(&ohci->lock); in irq_handler()
2161 update_bus_time(ohci); in irq_handler()
2162 spin_unlock(&ohci->lock); in irq_handler()
2164 flush_writes(ohci); in irq_handler()
2169 static int software_reset(struct fw_ohci *ohci) in software_reset() argument
2174 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); in software_reset()
2176 val = reg_read(ohci, OHCI1394_HCControlSet); in software_reset()
2198 static int configure_1394a_enhancements(struct fw_ohci *ohci) in configure_1394a_enhancements() argument
2204 if (!(reg_read(ohci, OHCI1394_HCControlSet) & in configure_1394a_enhancements()
2210 ret = read_phy_reg(ohci, 2); in configure_1394a_enhancements()
2214 ret = read_paged_phy_reg(ohci, 1, 8); in configure_1394a_enhancements()
2221 if (ohci->quirks & QUIRK_NO_1394A) in configure_1394a_enhancements()
2232 ret = update_phy_reg(ohci, 5, clear, set); in configure_1394a_enhancements()
2240 reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); in configure_1394a_enhancements()
2243 reg_write(ohci, OHCI1394_HCControlClear, in configure_1394a_enhancements()
2249 static int probe_tsb41ba3d(struct fw_ohci *ohci) in probe_tsb41ba3d() argument
2255 reg = read_phy_reg(ohci, 2); in probe_tsb41ba3d()
2262 reg = read_paged_phy_reg(ohci, 1, i + 10); in probe_tsb41ba3d()
2274 struct fw_ohci *ohci = fw_ohci(card); in ohci_enable() local
2278 ret = software_reset(ohci); in ohci_enable()
2280 ohci_err(ohci, "failed to reset ohci card\n"); in ohci_enable()
2297 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2300 flush_writes(ohci); in ohci_enable()
2304 lps = reg_read(ohci, OHCI1394_HCControlSet) & in ohci_enable()
2309 ohci_err(ohci, "failed to set Link Power Status\n"); in ohci_enable()
2313 if (ohci->quirks & QUIRK_TI_SLLZ059) { in ohci_enable()
2314 ret = probe_tsb41ba3d(ohci); in ohci_enable()
2318 ohci_notice(ohci, "local TSB41BA3D phy\n"); in ohci_enable()
2320 ohci->quirks &= ~QUIRK_TI_SLLZ059; in ohci_enable()
2323 reg_write(ohci, OHCI1394_HCControlClear, in ohci_enable()
2326 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); in ohci_enable()
2327 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2331 reg_write(ohci, OHCI1394_ATRetries, in ohci_enable()
2337 ohci->bus_time_running = false; in ohci_enable()
2340 if (ohci->ir_context_support & (1 << i)) in ohci_enable()
2341 reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), in ohci_enable()
2344 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; in ohci_enable()
2346 reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, in ohci_enable()
2352 reg_write(ohci, OHCI1394_FairnessControl, 0x3f); in ohci_enable()
2353 ohci->pri_req_max = reg_read(ohci, OHCI1394_FairnessControl) & 0x3f; in ohci_enable()
2354 reg_write(ohci, OHCI1394_FairnessControl, 0); in ohci_enable()
2355 card->priority_budget_implemented = ohci->pri_req_max != 0; in ohci_enable()
2357 reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); in ohci_enable()
2358 reg_write(ohci, OHCI1394_IntEventClear, ~0); in ohci_enable()
2359 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in ohci_enable()
2361 ret = configure_1394a_enhancements(ohci); in ohci_enable()
2390 ohci->next_config_rom = dmam_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, in ohci_enable()
2391 &ohci->next_config_rom_bus, GFP_KERNEL); in ohci_enable()
2392 if (ohci->next_config_rom == NULL) in ohci_enable()
2395 copy_config_rom(ohci->next_config_rom, config_rom, length); in ohci_enable()
2401 ohci->next_config_rom = ohci->config_rom; in ohci_enable()
2402 ohci->next_config_rom_bus = ohci->config_rom_bus; in ohci_enable()
2405 ohci->next_header = ohci->next_config_rom[0]; in ohci_enable()
2406 ohci->next_config_rom[0] = 0; in ohci_enable()
2407 reg_write(ohci, OHCI1394_ConfigROMhdr, 0); in ohci_enable()
2408 reg_write(ohci, OHCI1394_BusOptions, in ohci_enable()
2409 be32_to_cpu(ohci->next_config_rom[2])); in ohci_enable()
2410 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_enable()
2412 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); in ohci_enable()
2426 reg_write(ohci, OHCI1394_IntMaskSet, irqs); in ohci_enable()
2428 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2432 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2436 ar_context_run(&ohci->ar_request_ctx); in ohci_enable()
2437 ar_context_run(&ohci->ar_response_ctx); in ohci_enable()
2439 flush_writes(ohci); in ohci_enable()
2442 fw_schedule_bus_reset(&ohci->card, false, true); in ohci_enable()
2450 struct fw_ohci *ohci; in ohci_set_config_rom() local
2454 ohci = fw_ohci(card); in ohci_set_config_rom()
2483 next_config_rom = dmam_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, in ohci_set_config_rom()
2488 spin_lock_irq(&ohci->lock); in ohci_set_config_rom()
2501 if (ohci->next_config_rom == NULL) { in ohci_set_config_rom()
2502 ohci->next_config_rom = next_config_rom; in ohci_set_config_rom()
2503 ohci->next_config_rom_bus = next_config_rom_bus; in ohci_set_config_rom()
2507 copy_config_rom(ohci->next_config_rom, config_rom, length); in ohci_set_config_rom()
2509 ohci->next_header = config_rom[0]; in ohci_set_config_rom()
2510 ohci->next_config_rom[0] = 0; in ohci_set_config_rom()
2512 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_set_config_rom()
2514 spin_unlock_irq(&ohci->lock); in ohci_set_config_rom()
2518 dmam_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, next_config_rom, in ohci_set_config_rom()
2530 fw_schedule_bus_reset(&ohci->card, true, true); in ohci_set_config_rom()
2537 struct fw_ohci *ohci = fw_ohci(card); in ohci_send_request() local
2539 at_context_transmit(&ohci->at_request_ctx, packet); in ohci_send_request()
2544 struct fw_ohci *ohci = fw_ohci(card); in ohci_send_response() local
2546 at_context_transmit(&ohci->at_response_ctx, packet); in ohci_send_response()
2551 struct fw_ohci *ohci = fw_ohci(card); in ohci_cancel_packet() local
2552 struct context *ctx = &ohci->at_request_ctx; in ohci_cancel_packet()
2562 dma_unmap_single(ohci->card.device, packet->payload_bus, in ohci_cancel_packet()
2565 log_ar_at_event(ohci, 'T', packet->speed, packet->header, 0x20); in ohci_cancel_packet()
2570 packet->timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ohci)); in ohci_cancel_packet()
2572 packet->callback(packet, &ohci->card, packet->ack); in ohci_cancel_packet()
2583 struct fw_ohci *ohci = fw_ohci(card); in ohci_enable_phys_dma() local
2595 spin_lock_irqsave(&ohci->lock, flags); in ohci_enable_phys_dma()
2597 if (ohci->generation != generation) { in ohci_enable_phys_dma()
2609 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); in ohci_enable_phys_dma()
2611 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); in ohci_enable_phys_dma()
2613 flush_writes(ohci); in ohci_enable_phys_dma()
2615 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_enable_phys_dma()
2622 struct fw_ohci *ohci = fw_ohci(card); in ohci_read_csr() local
2629 if (ohci->is_root && in ohci_read_csr()
2630 (reg_read(ohci, OHCI1394_LinkControlSet) & in ohci_read_csr()
2635 if (ohci->csr_state_setclear_abdicate) in ohci_read_csr()
2641 return reg_read(ohci, OHCI1394_NodeID) << 16; in ohci_read_csr()
2644 return get_cycle_time(ohci); in ohci_read_csr()
2652 spin_lock_irqsave(&ohci->lock, flags); in ohci_read_csr()
2653 value = update_bus_time(ohci); in ohci_read_csr()
2654 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_read_csr()
2658 value = reg_read(ohci, OHCI1394_ATRetries); in ohci_read_csr()
2662 return (reg_read(ohci, OHCI1394_FairnessControl) & 0x3f) | in ohci_read_csr()
2663 (ohci->pri_req_max << 8); in ohci_read_csr()
2673 struct fw_ohci *ohci = fw_ohci(card); in ohci_write_csr() local
2678 if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { in ohci_write_csr()
2679 reg_write(ohci, OHCI1394_LinkControlClear, in ohci_write_csr()
2681 flush_writes(ohci); in ohci_write_csr()
2684 ohci->csr_state_setclear_abdicate = false; in ohci_write_csr()
2688 if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { in ohci_write_csr()
2689 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_write_csr()
2691 flush_writes(ohci); in ohci_write_csr()
2694 ohci->csr_state_setclear_abdicate = true; in ohci_write_csr()
2698 reg_write(ohci, OHCI1394_NodeID, value >> 16); in ohci_write_csr()
2699 flush_writes(ohci); in ohci_write_csr()
2703 reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); in ohci_write_csr()
2704 reg_write(ohci, OHCI1394_IntEventSet, in ohci_write_csr()
2706 flush_writes(ohci); in ohci_write_csr()
2710 spin_lock_irqsave(&ohci->lock, flags); in ohci_write_csr()
2711 ohci->bus_time = (update_bus_time(ohci) & 0x40) | in ohci_write_csr()
2713 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_write_csr()
2719 reg_write(ohci, OHCI1394_ATRetries, value); in ohci_write_csr()
2720 flush_writes(ohci); in ohci_write_csr()
2724 reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); in ohci_write_csr()
2725 flush_writes(ohci); in ohci_write_csr()
2788 dma_sync_single_range_for_cpu(context->ohci->card.device, in handle_ir_packet_per_buffer()
2827 dma_sync_single_range_for_cpu(context->ohci->card.device, in handle_ir_buffer_fill()
2844 dma_sync_single_range_for_cpu(ctx->context.ohci->card.device, in flush_ir_buffer_fill()
2882 dma_sync_single_range_for_cpu(context->ohci->card.device, in sync_it_packet_for_cpu()
2929 static void set_multichannel_mask(struct fw_ohci *ohci, u64 channels) in set_multichannel_mask() argument
2933 reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); in set_multichannel_mask()
2934 reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); in set_multichannel_mask()
2935 reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); in set_multichannel_mask()
2936 reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); in set_multichannel_mask()
2937 ohci->mc_channels = channels; in set_multichannel_mask()
2943 struct fw_ohci *ohci = fw_ohci(card); in ohci_allocate_iso_context() local
2950 spin_lock_irq(&ohci->lock); in ohci_allocate_iso_context()
2954 mask = &ohci->it_context_mask; in ohci_allocate_iso_context()
2960 ctx = &ohci->it_context_list[index]; in ohci_allocate_iso_context()
2965 channels = &ohci->ir_context_channels; in ohci_allocate_iso_context()
2966 mask = &ohci->ir_context_mask; in ohci_allocate_iso_context()
2973 ctx = &ohci->ir_context_list[index]; in ohci_allocate_iso_context()
2978 mask = &ohci->ir_context_mask; in ohci_allocate_iso_context()
2980 index = !ohci->mc_allocated ? ffs(*mask) - 1 : -1; in ohci_allocate_iso_context()
2982 ohci->mc_allocated = true; in ohci_allocate_iso_context()
2985 ctx = &ohci->ir_context_list[index]; in ohci_allocate_iso_context()
2994 spin_unlock_irq(&ohci->lock); in ohci_allocate_iso_context()
3006 ret = context_init(&ctx->context, ohci, regs, callback); in ohci_allocate_iso_context()
3011 set_multichannel_mask(ohci, 0); in ohci_allocate_iso_context()
3020 spin_lock_irq(&ohci->lock); in ohci_allocate_iso_context()
3028 ohci->mc_allocated = false; in ohci_allocate_iso_context()
3033 spin_unlock_irq(&ohci->lock); in ohci_allocate_iso_context()
3042 struct fw_ohci *ohci = ctx->context.ohci; in ohci_start_iso() local
3052 index = ctx - ohci->it_context_list; in ohci_start_iso()
3058 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); in ohci_start_iso()
3059 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); in ohci_start_iso()
3067 index = ctx - ohci->ir_context_list; in ohci_start_iso()
3074 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); in ohci_start_iso()
3075 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); in ohci_start_iso()
3076 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); in ohci_start_iso()
3090 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_stop_iso() local
3096 index = ctx - ohci->it_context_list; in ohci_stop_iso()
3097 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); in ohci_stop_iso()
3102 index = ctx - ohci->ir_context_list; in ohci_stop_iso()
3103 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); in ohci_stop_iso()
3106 flush_writes(ohci); in ohci_stop_iso()
3115 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_free_iso_context() local
3124 spin_lock_irqsave(&ohci->lock, flags); in ohci_free_iso_context()
3128 index = ctx - ohci->it_context_list; in ohci_free_iso_context()
3129 ohci->it_context_mask |= 1 << index; in ohci_free_iso_context()
3133 index = ctx - ohci->ir_context_list; in ohci_free_iso_context()
3134 ohci->ir_context_mask |= 1 << index; in ohci_free_iso_context()
3135 ohci->ir_context_channels |= 1ULL << base->channel; in ohci_free_iso_context()
3139 index = ctx - ohci->ir_context_list; in ohci_free_iso_context()
3140 ohci->ir_context_mask |= 1 << index; in ohci_free_iso_context()
3141 ohci->ir_context_channels |= ohci->mc_channels; in ohci_free_iso_context()
3142 ohci->mc_channels = 0; in ohci_free_iso_context()
3143 ohci->mc_allocated = false; in ohci_free_iso_context()
3147 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_free_iso_context()
3152 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_set_iso_channels() local
3159 spin_lock_irqsave(&ohci->lock, flags); in ohci_set_iso_channels()
3162 if (~ohci->ir_context_channels & ~ohci->mc_channels & *channels) { in ohci_set_iso_channels()
3163 *channels = ohci->ir_context_channels; in ohci_set_iso_channels()
3166 set_multichannel_mask(ohci, *channels); in ohci_set_iso_channels()
3170 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_set_iso_channels()
3181 static void ohci_resume_iso_dma(struct fw_ohci *ohci) in ohci_resume_iso_dma() argument
3186 for (i = 0 ; i < ohci->n_ir ; i++) { in ohci_resume_iso_dma()
3187 ctx = &ohci->ir_context_list[i]; in ohci_resume_iso_dma()
3192 for (i = 0 ; i < ohci->n_it ; i++) { in ohci_resume_iso_dma()
3193 ctx = &ohci->it_context_list[i]; in ohci_resume_iso_dma()
3281 dma_sync_single_range_for_device(ctx->context.ohci->card.device, in queue_iso_transmit()
3309 struct device *device = ctx->context.ohci->card.device; in queue_iso_packet_per_buffer()
3427 dma_sync_single_range_for_device(ctx->context.ohci->card.device, in queue_iso_buffer_fill()
3450 spin_lock_irqsave(&ctx->context.ohci->lock, flags); in ohci_queue_iso()
3462 spin_unlock_irqrestore(&ctx->context.ohci->lock, flags); in ohci_queue_iso()
3472 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ohci_flush_queue_iso()
3562 struct fw_ohci *ohci = pci_get_drvdata(pdev); in release_ohci() local
3566 ar_context_release(&ohci->ar_response_ctx); in release_ohci()
3567 ar_context_release(&ohci->ar_request_ctx); in release_ohci()
3575 struct fw_ohci *ohci; in pci_probe() local
3586 ohci = devres_alloc(release_ohci, sizeof(*ohci), GFP_KERNEL); in pci_probe()
3587 if (ohci == NULL) in pci_probe()
3589 fw_card_initialize(&ohci->card, &ohci_driver, &dev->dev); in pci_probe()
3590 pci_set_drvdata(dev, ohci); in pci_probe()
3592 devres_add(&dev->dev, ohci); in pci_probe()
3603 spin_lock_init(&ohci->lock); in pci_probe()
3604 mutex_init(&ohci->phy_reg_mutex); in pci_probe()
3606 INIT_WORK(&ohci->bus_reset_work, bus_reset_work); in pci_probe()
3610 ohci_err(ohci, "invalid MMIO resource\n"); in pci_probe()
3616 ohci_err(ohci, "request and map MMIO resource unavailable\n"); in pci_probe()
3619 ohci->registers = pcim_iomap_table(dev)[0]; in pci_probe()
3627 ohci->quirks = ohci_quirks[i].flags; in pci_probe()
3631 ohci->quirks = param_quirks; in pci_probe()
3640 ohci->misc_buffer = dmam_alloc_coherent(&dev->dev, PAGE_SIZE, &ohci->misc_buffer_bus, in pci_probe()
3642 if (!ohci->misc_buffer) in pci_probe()
3645 err = ar_context_init(&ohci->ar_request_ctx, ohci, 0, in pci_probe()
3650 err = ar_context_init(&ohci->ar_response_ctx, ohci, PAGE_SIZE/4, in pci_probe()
3655 err = context_init(&ohci->at_request_ctx, ohci, in pci_probe()
3660 err = context_init(&ohci->at_response_ctx, ohci, in pci_probe()
3665 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); in pci_probe()
3666 ohci->ir_context_channels = ~0ULL; in pci_probe()
3667 ohci->ir_context_support = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet); in pci_probe()
3668 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); in pci_probe()
3669 ohci->ir_context_mask = ohci->ir_context_support; in pci_probe()
3670 ohci->n_ir = hweight32(ohci->ir_context_mask); in pci_probe()
3671 size = sizeof(struct iso_context) * ohci->n_ir; in pci_probe()
3672 ohci->ir_context_list = devm_kzalloc(&dev->dev, size, GFP_KERNEL); in pci_probe()
3673 if (!ohci->ir_context_list) in pci_probe()
3676 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); in pci_probe()
3677 ohci->it_context_support = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet); in pci_probe()
3679 if (!ohci->it_context_support) { in pci_probe()
3680 ohci_notice(ohci, "overriding IsoXmitIntMask\n"); in pci_probe()
3681 ohci->it_context_support = 0xf; in pci_probe()
3683 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); in pci_probe()
3684 ohci->it_context_mask = ohci->it_context_support; in pci_probe()
3685 ohci->n_it = hweight32(ohci->it_context_mask); in pci_probe()
3686 size = sizeof(struct iso_context) * ohci->n_it; in pci_probe()
3687 ohci->it_context_list = devm_kzalloc(&dev->dev, size, GFP_KERNEL); in pci_probe()
3688 if (!ohci->it_context_list) in pci_probe()
3691 ohci->self_id = ohci->misc_buffer + PAGE_SIZE/2; in pci_probe()
3692 ohci->self_id_bus = ohci->misc_buffer_bus + PAGE_SIZE/2; in pci_probe()
3694 bus_options = reg_read(ohci, OHCI1394_BusOptions); in pci_probe()
3697 guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) << 32) | in pci_probe()
3698 reg_read(ohci, OHCI1394_GUIDLo); in pci_probe()
3700 if (!(ohci->quirks & QUIRK_NO_MSI)) in pci_probe()
3703 pci_dev_msi_enabled(dev) ? 0 : IRQF_SHARED, ohci_driver_name, ohci); in pci_probe()
3705 ohci_err(ohci, "failed to allocate interrupt %d\n", dev->irq); in pci_probe()
3709 err = fw_card_add(&ohci->card, max_receive, link_speed, guid); in pci_probe()
3713 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; in pci_probe()
3714 ohci_notice(ohci, in pci_probe()
3717 version >> 16, version & 0xff, ohci->card.index, in pci_probe()
3718 ohci->n_ir, ohci->n_it, ohci->quirks, in pci_probe()
3719 reg_read(ohci, OHCI1394_PhyUpperBound) ? in pci_probe()
3732 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_remove() local
3738 if (reg_read(ohci, OHCI1394_HCControlSet) & OHCI1394_HCControl_LPS) { in pci_remove()
3739 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in pci_remove()
3740 flush_writes(ohci); in pci_remove()
3742 cancel_work_sync(&ohci->bus_reset_work); in pci_remove()
3743 fw_core_remove_card(&ohci->card); in pci_remove()
3750 software_reset(ohci); in pci_remove()
3760 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_suspend() local
3763 software_reset(ohci); in pci_suspend()
3766 ohci_err(ohci, "pci_save_state failed\n"); in pci_suspend()
3771 ohci_err(ohci, "pci_set_power_state failed with %d\n", err); in pci_suspend()
3779 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_resume() local
3787 ohci_err(ohci, "pci_enable_device failed\n"); in pci_resume()
3792 if (!reg_read(ohci, OHCI1394_GUIDLo) && in pci_resume()
3793 !reg_read(ohci, OHCI1394_GUIDHi)) { in pci_resume()
3794 reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); in pci_resume()
3795 reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); in pci_resume()
3798 err = ohci_enable(&ohci->card, NULL, 0); in pci_resume()
3802 ohci_resume_iso_dma(ohci); in pci_resume()