463 				 pvt->mc_node_id);  in input_addr_to_csrow()
469 		 (unsigned long)input_addr, pvt->mc_node_id);  in input_addr_to_csrow()
498 			 pvt->ext_model, pvt->mc_node_id);  in get_dram_hole_info()
510 			 pvt->mc_node_id);  in get_dram_hole_info()
539 		 pvt->mc_node_id, (unsigned long)*hole_base,  in get_dram_hole_info()
861 	dram_base = get_dram_base(pvt, pvt->mc_node_id);  in sys_addr_to_dram_addr()
1619 		amd_smn_read(pvt->mc_node_id, umc_base + UMCCH_ECC_BAD_SYMBOL, &tmp);  in umc_dump_misc_regs()
1622 		amd_smn_read(pvt->mc_node_id, umc_base + UMCCH_UMC_CAP, &tmp);  in umc_dump_misc_regs()
1637 			amd_smn_read(pvt->mc_node_id,  in umc_dump_misc_regs()
1733 			if (!amd_smn_read(pvt->mc_node_id, base_reg, base))  in umc_read_base_mask()
1737 			if (!amd_smn_read(pvt->mc_node_id, base_reg_sec, base_sec))  in umc_read_base_mask()
1752 			if (!amd_smn_read(pvt->mc_node_id, mask_reg, mask))  in umc_read_base_mask()
1756 			if (!amd_smn_read(pvt->mc_node_id, mask_reg_sec, mask_sec))  in umc_read_base_mask()
3101 	if (umc_normaddr_to_sysaddr(m->addr, pvt->mc_node_id, err.channel, &sys_addr)) {  in decode_umc_error()
3169 	u8 nid = pvt->mc_node_id;  in umc_read_mc_regs()
3353 					pvt->mc_node_id, cs);  in umc_init_csrows()
3383 		 pvt->mc_node_id, val,  in dct_init_csrows()
3402 			    pvt->mc_node_id, i);  in dct_init_csrows()
3597 	u16 nid = pvt->mc_node_id;  in dct_ecc_enabled()
3622 	u16 nid = pvt->mc_node_id;  in umc_ecc_enabled()
3850 				 pvt->mc_node_id, cs);  in gpu_init_csrows()
3907 	u8 nid = pvt->mc_node_id;  in gpu_read_mc_regs()
3933 			if (!amd_smn_read(pvt->mc_node_id, base_reg, base)) {  in gpu_read_base_mask()
3941 			if (!amd_smn_read(pvt->mc_node_id, mask_reg, mask)) {  in gpu_read_base_mask()
4202 	mci = edac_mc_alloc(pvt->mc_node_id, ARRAY_SIZE(layers), layers, 0);  in init_one_instance()
4252 	pvt->mc_node_id	= nid;  in probe_one_instance()
4295 	amd64_info("%s detected (node %d).\n", pvt->ctl_name, pvt->mc_node_id);  in probe_one_instance()