Lines Matching refs:echan
177 struct edma_chan *echan; member
390 static void edma_set_chmap(struct edma_chan *echan, int slot) in edma_set_chmap() argument
392 struct edma_cc *ecc = echan->ecc; in edma_set_chmap()
393 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_set_chmap()
401 static void edma_setup_interrupt(struct edma_chan *echan, bool enable) in edma_setup_interrupt() argument
403 struct edma_cc *ecc = echan->ecc; in edma_setup_interrupt()
404 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_setup_interrupt()
546 static void edma_start(struct edma_chan *echan) in edma_start() argument
548 struct edma_cc *ecc = echan->ecc; in edma_start()
549 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_start()
553 if (!echan->hw_triggered) { in edma_start()
573 static void edma_stop(struct edma_chan *echan) in edma_stop() argument
575 struct edma_cc *ecc = echan->ecc; in edma_stop()
576 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_stop()
600 static void edma_pause(struct edma_chan *echan) in edma_pause() argument
602 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_pause()
604 edma_shadow0_write_array(echan->ecc, SH_EECR, in edma_pause()
610 static void edma_resume(struct edma_chan *echan) in edma_resume() argument
612 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_resume()
614 edma_shadow0_write_array(echan->ecc, SH_EESR, in edma_resume()
619 static void edma_trigger_channel(struct edma_chan *echan) in edma_trigger_channel() argument
621 struct edma_cc *ecc = echan->ecc; in edma_trigger_channel()
622 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_trigger_channel()
632 static void edma_clean_channel(struct edma_chan *echan) in edma_clean_channel() argument
634 struct edma_cc *ecc = echan->ecc; in edma_clean_channel()
635 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_clean_channel()
650 static void edma_assign_channel_eventq(struct edma_chan *echan, in edma_assign_channel_eventq() argument
653 struct edma_cc *ecc = echan->ecc; in edma_assign_channel_eventq()
654 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_assign_channel_eventq()
668 static int edma_alloc_channel(struct edma_chan *echan, in edma_alloc_channel() argument
671 struct edma_cc *ecc = echan->ecc; in edma_alloc_channel()
672 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_alloc_channel()
674 if (!test_bit(echan->ch_num, ecc->channels_mask)) { in edma_alloc_channel()
676 echan->ch_num); in edma_alloc_channel()
685 edma_stop(echan); in edma_alloc_channel()
687 edma_setup_interrupt(echan, true); in edma_alloc_channel()
689 edma_assign_channel_eventq(echan, eventq_no); in edma_alloc_channel()
694 static void edma_free_channel(struct edma_chan *echan) in edma_free_channel() argument
697 edma_stop(echan); in edma_free_channel()
699 edma_setup_interrupt(echan, false); in edma_free_channel()
718 static void edma_execute(struct edma_chan *echan) in edma_execute() argument
720 struct edma_cc *ecc = echan->ecc; in edma_execute()
723 struct device *dev = echan->vchan.chan.device->dev; in edma_execute()
726 if (!echan->edesc) { in edma_execute()
728 vdesc = vchan_next_desc(&echan->vchan); in edma_execute()
732 echan->edesc = to_edma_desc(&vdesc->tx); in edma_execute()
735 edesc = echan->edesc; in edma_execute()
745 edma_write_slot(ecc, echan->slot[i], &edesc->pset[j].param); in edma_execute()
759 j, echan->ch_num, echan->slot[i], in edma_execute()
770 edma_link(ecc, echan->slot[i], echan->slot[i + 1]); in edma_execute()
782 edma_link(ecc, echan->slot[nslots - 1], echan->slot[1]); in edma_execute()
784 edma_link(ecc, echan->slot[nslots - 1], in edma_execute()
785 echan->ecc->dummy_slot); in edma_execute()
788 if (echan->missed) { in edma_execute()
794 dev_dbg(dev, "missed event on channel %d\n", echan->ch_num); in edma_execute()
795 edma_clean_channel(echan); in edma_execute()
796 edma_stop(echan); in edma_execute()
797 edma_start(echan); in edma_execute()
798 edma_trigger_channel(echan); in edma_execute()
799 echan->missed = 0; in edma_execute()
802 echan->ch_num); in edma_execute()
803 edma_start(echan); in edma_execute()
806 echan->ch_num, edesc->processed); in edma_execute()
807 edma_resume(echan); in edma_execute()
813 struct edma_chan *echan = to_edma_chan(chan); in edma_terminate_all() local
817 spin_lock_irqsave(&echan->vchan.lock, flags); in edma_terminate_all()
824 if (echan->edesc) { in edma_terminate_all()
825 edma_stop(echan); in edma_terminate_all()
827 if (!echan->tc && echan->edesc->cyclic) in edma_terminate_all()
828 edma_assign_channel_eventq(echan, EVENTQ_DEFAULT); in edma_terminate_all()
830 vchan_terminate_vdesc(&echan->edesc->vdesc); in edma_terminate_all()
831 echan->edesc = NULL; in edma_terminate_all()
834 vchan_get_all_descriptors(&echan->vchan, &head); in edma_terminate_all()
835 spin_unlock_irqrestore(&echan->vchan.lock, flags); in edma_terminate_all()
836 vchan_dma_desc_free_list(&echan->vchan, &head); in edma_terminate_all()
843 struct edma_chan *echan = to_edma_chan(chan); in edma_synchronize() local
845 vchan_synchronize(&echan->vchan); in edma_synchronize()
851 struct edma_chan *echan = to_edma_chan(chan); in edma_slave_config() local
861 memcpy(&echan->cfg, cfg, sizeof(echan->cfg)); in edma_slave_config()
868 struct edma_chan *echan = to_edma_chan(chan); in edma_dma_pause() local
870 if (!echan->edesc) in edma_dma_pause()
873 edma_pause(echan); in edma_dma_pause()
879 struct edma_chan *echan = to_edma_chan(chan); in edma_dma_resume() local
881 edma_resume(echan); in edma_dma_resume()
901 struct edma_chan *echan = to_edma_chan(chan); in edma_config_pset() local
986 param->opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num)); in edma_config_pset()
1014 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_slave_sg() local
1023 if (unlikely(!echan || !sgl || !sg_len)) in edma_prep_slave_sg()
1027 src_addr = echan->cfg.src_addr; in edma_prep_slave_sg()
1028 dev_width = echan->cfg.src_addr_width; in edma_prep_slave_sg()
1029 burst = echan->cfg.src_maxburst; in edma_prep_slave_sg()
1031 dst_addr = echan->cfg.dst_addr; in edma_prep_slave_sg()
1032 dev_width = echan->cfg.dst_addr_width; in edma_prep_slave_sg()
1033 burst = echan->cfg.dst_maxburst; in edma_prep_slave_sg()
1051 edesc->echan = echan; in edma_prep_slave_sg()
1057 if (echan->slot[i] < 0) { in edma_prep_slave_sg()
1058 echan->slot[i] = in edma_prep_slave_sg()
1059 edma_alloc_slot(echan->ecc, EDMA_SLOT_ANY); in edma_prep_slave_sg()
1060 if (echan->slot[i] < 0) { in edma_prep_slave_sg()
1102 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_slave_sg()
1112 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_dma_memcpy() local
1115 if (unlikely(!echan || !len)) in edma_prep_dma_memcpy()
1168 edesc->echan = echan; in edma_prep_dma_memcpy()
1188 if (echan->slot[1] < 0) { in edma_prep_dma_memcpy()
1189 echan->slot[1] = edma_alloc_slot(echan->ecc, in edma_prep_dma_memcpy()
1191 if (echan->slot[1] < 0) { in edma_prep_dma_memcpy()
1218 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_dma_memcpy()
1227 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_dma_interleaved() local
1273 edesc->echan = echan; in edma_prep_dma_interleaved()
1285 param->opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num)); in edma_prep_dma_interleaved()
1293 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_dma_interleaved()
1301 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_dma_cyclic() local
1310 if (unlikely(!echan || !buf_len || !period_len)) in edma_prep_dma_cyclic()
1314 src_addr = echan->cfg.src_addr; in edma_prep_dma_cyclic()
1316 dev_width = echan->cfg.src_addr_width; in edma_prep_dma_cyclic()
1317 burst = echan->cfg.src_maxburst; in edma_prep_dma_cyclic()
1320 dst_addr = echan->cfg.dst_addr; in edma_prep_dma_cyclic()
1321 dev_width = echan->cfg.dst_addr_width; in edma_prep_dma_cyclic()
1322 burst = echan->cfg.dst_maxburst; in edma_prep_dma_cyclic()
1372 edesc->echan = echan; in edma_prep_dma_cyclic()
1375 __func__, echan->ch_num, nslots, period_len, buf_len); in edma_prep_dma_cyclic()
1379 if (echan->slot[i] < 0) { in edma_prep_dma_cyclic()
1380 echan->slot[i] = in edma_prep_dma_cyclic()
1381 edma_alloc_slot(echan->ecc, EDMA_SLOT_ANY); in edma_prep_dma_cyclic()
1382 if (echan->slot[i] < 0) { in edma_prep_dma_cyclic()
1422 i, echan->ch_num, echan->slot[i], in edma_prep_dma_cyclic()
1447 if (!echan->tc) in edma_prep_dma_cyclic()
1448 edma_assign_channel_eventq(echan, EVENTQ_0); in edma_prep_dma_cyclic()
1450 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_dma_cyclic()
1453 static void edma_completion_handler(struct edma_chan *echan) in edma_completion_handler() argument
1455 struct device *dev = echan->vchan.chan.device->dev; in edma_completion_handler()
1458 spin_lock(&echan->vchan.lock); in edma_completion_handler()
1459 edesc = echan->edesc; in edma_completion_handler()
1463 spin_unlock(&echan->vchan.lock); in edma_completion_handler()
1467 edma_stop(echan); in edma_completion_handler()
1469 echan->edesc = NULL; in edma_completion_handler()
1472 echan->ch_num); in edma_completion_handler()
1475 echan->ch_num); in edma_completion_handler()
1477 edma_pause(echan); in edma_completion_handler()
1484 edma_execute(echan); in edma_completion_handler()
1487 spin_unlock(&echan->vchan.lock); in edma_completion_handler()
1536 static void edma_error_handler(struct edma_chan *echan) in edma_error_handler() argument
1538 struct edma_cc *ecc = echan->ecc; in edma_error_handler()
1539 struct device *dev = echan->vchan.chan.device->dev; in edma_error_handler()
1543 if (!echan->edesc) in edma_error_handler()
1546 spin_lock(&echan->vchan.lock); in edma_error_handler()
1548 err = edma_read_slot(ecc, echan->slot[0], &p); in edma_error_handler()
1564 echan->missed = 1; in edma_error_handler()
1571 edma_clean_channel(echan); in edma_error_handler()
1572 edma_stop(echan); in edma_error_handler()
1573 edma_start(echan); in edma_error_handler()
1574 edma_trigger_channel(echan); in edma_error_handler()
1576 spin_unlock(&echan->vchan.lock); in edma_error_handler()
1667 struct edma_chan *echan = to_edma_chan(chan); in edma_alloc_chan_resources() local
1668 struct edma_cc *ecc = echan->ecc; in edma_alloc_chan_resources()
1673 if (echan->tc) { in edma_alloc_chan_resources()
1674 eventq_no = echan->tc->id; in edma_alloc_chan_resources()
1677 echan->tc = &ecc->tc_list[ecc->info->default_queue]; in edma_alloc_chan_resources()
1678 eventq_no = echan->tc->id; in edma_alloc_chan_resources()
1681 ret = edma_alloc_channel(echan, eventq_no); in edma_alloc_chan_resources()
1685 echan->slot[0] = edma_alloc_slot(ecc, echan->ch_num); in edma_alloc_chan_resources()
1686 if (echan->slot[0] < 0) { in edma_alloc_chan_resources()
1688 EDMA_CHAN_SLOT(echan->ch_num)); in edma_alloc_chan_resources()
1689 ret = echan->slot[0]; in edma_alloc_chan_resources()
1694 edma_set_chmap(echan, echan->slot[0]); in edma_alloc_chan_resources()
1695 echan->alloced = true; in edma_alloc_chan_resources()
1698 EDMA_CHAN_SLOT(echan->ch_num), chan->chan_id, in edma_alloc_chan_resources()
1699 echan->hw_triggered ? "HW" : "SW"); in edma_alloc_chan_resources()
1704 edma_free_channel(echan); in edma_alloc_chan_resources()
1711 struct edma_chan *echan = to_edma_chan(chan); in edma_free_chan_resources() local
1712 struct device *dev = echan->ecc->dev; in edma_free_chan_resources()
1716 edma_stop(echan); in edma_free_chan_resources()
1718 vchan_free_chan_resources(&echan->vchan); in edma_free_chan_resources()
1722 if (echan->slot[i] >= 0) { in edma_free_chan_resources()
1723 edma_free_slot(echan->ecc, echan->slot[i]); in edma_free_chan_resources()
1724 echan->slot[i] = -1; in edma_free_chan_resources()
1729 edma_set_chmap(echan, echan->ecc->dummy_slot); in edma_free_chan_resources()
1732 if (echan->alloced) { in edma_free_chan_resources()
1733 edma_free_channel(echan); in edma_free_chan_resources()
1734 echan->alloced = false; in edma_free_chan_resources()
1737 echan->tc = NULL; in edma_free_chan_resources()
1738 echan->hw_triggered = false; in edma_free_chan_resources()
1741 EDMA_CHAN_SLOT(echan->ch_num), chan->chan_id); in edma_free_chan_resources()
1747 struct edma_chan *echan = to_edma_chan(chan); in edma_issue_pending() local
1750 spin_lock_irqsave(&echan->vchan.lock, flags); in edma_issue_pending()
1751 if (vchan_issue_pending(&echan->vchan) && !echan->edesc) in edma_issue_pending()
1752 edma_execute(echan); in edma_issue_pending()
1753 spin_unlock_irqrestore(&echan->vchan.lock, flags); in edma_issue_pending()
1769 struct edma_chan *echan = edesc->echan; in edma_residue() local
1772 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_residue()
1782 pos = edma_get_position(echan->ecc, echan->slot[0], dst); in edma_residue()
1798 while (edma_shadow0_read_array(echan->ecc, event_reg, idx) & ch_bit) { in edma_residue()
1799 pos = edma_get_position(echan->ecc, echan->slot[0], dst); in edma_residue()
1804 dev_dbg_ratelimited(echan->vchan.chan.device->dev, in edma_residue()
1859 struct edma_chan *echan = to_edma_chan(chan); in edma_tx_status() local
1873 spin_lock_irqsave(&echan->vchan.lock, flags); in edma_tx_status()
1874 if (echan->edesc && echan->edesc->vdesc.tx.cookie == cookie) { in edma_tx_status()
1875 txstate->residue = edma_residue(echan->edesc); in edma_tx_status()
1877 struct virt_dma_desc *vdesc = vchan_find_desc(&echan->vchan, in edma_tx_status()
1891 echan->edesc && echan->edesc->polled && in edma_tx_status()
1892 echan->edesc->vdesc.tx.cookie == cookie) { in edma_tx_status()
1893 edma_stop(echan); in edma_tx_status()
1894 vchan_cookie_complete(&echan->edesc->vdesc); in edma_tx_status()
1895 echan->edesc = NULL; in edma_tx_status()
1896 edma_execute(echan); in edma_tx_status()
1900 spin_unlock_irqrestore(&echan->vchan.lock, flags); in edma_tx_status()
2002 struct edma_chan *echan = &ecc->slave_chans[i]; in edma_dma_init() local
2003 echan->ch_num = EDMA_CTLR_CHAN(ecc->id, i); in edma_dma_init()
2004 echan->ecc = ecc; in edma_dma_init()
2005 echan->vchan.desc_free = edma_desc_free; in edma_dma_init()
2008 vchan_init(&echan->vchan, m_ddev); in edma_dma_init()
2010 vchan_init(&echan->vchan, s_ddev); in edma_dma_init()
2012 INIT_LIST_HEAD(&echan->node); in edma_dma_init()
2014 echan->slot[j] = -1; in edma_dma_init()
2234 struct edma_chan *echan; in of_edma_xlate() local
2241 echan = &ecc->slave_chans[i]; in of_edma_xlate()
2242 if (echan->ch_num == dma_spec->args[0]) { in of_edma_xlate()
2243 chan = &echan->vchan.chan; in of_edma_xlate()
2251 if (echan->ecc->legacy_mode && dma_spec->args_count == 1) in of_edma_xlate()
2254 if (!echan->ecc->legacy_mode && dma_spec->args_count == 2 && in of_edma_xlate()
2255 dma_spec->args[1] < echan->ecc->num_tc) { in of_edma_xlate()
2256 echan->tc = &echan->ecc->tc_list[dma_spec->args[1]]; in of_edma_xlate()
2263 echan->hw_triggered = true; in of_edma_xlate()
2544 struct edma_chan *echan, *_echan; in edma_cleanupp_vchan() local
2546 list_for_each_entry_safe(echan, _echan, in edma_cleanupp_vchan()
2548 list_del(&echan->vchan.chan.device_node); in edma_cleanupp_vchan()
2549 tasklet_kill(&echan->vchan.task); in edma_cleanupp_vchan()
2579 struct edma_chan *echan = ecc->slave_chans; in edma_pm_suspend() local
2583 if (echan[i].alloced) in edma_pm_suspend()
2584 edma_setup_interrupt(&echan[i], false); in edma_pm_suspend()
2593 struct edma_chan *echan = ecc->slave_chans; in edma_pm_resume() local
2608 if (echan[i].alloced) { in edma_pm_resume()
2614 edma_setup_interrupt(&echan[i], true); in edma_pm_resume()
2617 edma_set_chmap(&echan[i], echan[i].slot[0]); in edma_pm_resume()
2658 struct edma_chan *echan = to_edma_chan(chan); in edma_filter_fn() local
2660 if (ch_req == echan->ch_num) { in edma_filter_fn()
2662 echan->hw_triggered = true; in edma_filter_fn()