Lines Matching full:csr

24 /* CSR register */
189 u32 csr; member
290 dev_dbg(tdc2dev(tdc), "CSR %x STA %x CSRE %x SRC %x DST %x\n", in tegra_dma_dump_chan_regs()
452 u32 csr, status; in tegra_dma_disable() local
454 csr = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR); in tegra_dma_disable()
457 csr &= ~TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_disable()
460 csr &= ~TEGRA_GPCDMA_CSR_ENB; in tegra_dma_disable()
461 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr); in tegra_dma_disable()
502 ch_regs->csr | TEGRA_GPCDMA_CSR_ENB); in tegra_dma_configure_next_sg()
534 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, ch_regs->csr); in tegra_dma_start()
538 ch_regs->csr | TEGRA_GPCDMA_CSR_ENB); in tegra_dma_start()
663 u32 status, csr; in tegra_dma_stop_client() local
670 csr = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR); in tegra_dma_stop_client()
671 csr &= ~(TEGRA_GPCDMA_CSR_REQ_SEL_MASK); in tegra_dma_stop_client()
672 csr |= TEGRA_GPCDMA_CSR_REQ_SEL_UNUSED; in tegra_dma_stop_client()
673 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr); in tegra_dma_stop_client()
829 u32 *csr, in get_transfer_param() argument
839 *csr = TEGRA_GPCDMA_CSR_DMA_MEM2IO_FC; in get_transfer_param()
846 *csr = TEGRA_GPCDMA_CSR_DMA_IO2MEM_FC; in get_transfer_param()
863 u32 csr, mc_seq; in tegra_dma_prep_dma_memset() local
872 csr = TEGRA_GPCDMA_CSR_DMA_FIXED_PAT; in tegra_dma_prep_dma_memset()
874 csr |= TEGRA_GPCDMA_CSR_ONCE; in tegra_dma_prep_dma_memset()
876 csr |= TEGRA_GPCDMA_CSR_IRQ_MASK; in tegra_dma_prep_dma_memset()
879 csr |= TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_prep_dma_memset()
881 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1); in tegra_dma_prep_dma_memset()
913 sg_req[0].ch_regs.csr = csr; in tegra_dma_prep_dma_memset()
930 u32 csr, mc_seq; in tegra_dma_prep_dma_memcpy() local
940 csr = TEGRA_GPCDMA_CSR_DMA_MEM2MEM; in tegra_dma_prep_dma_memcpy()
942 csr |= TEGRA_GPCDMA_CSR_ONCE; in tegra_dma_prep_dma_memcpy()
944 csr |= TEGRA_GPCDMA_CSR_IRQ_MASK; in tegra_dma_prep_dma_memcpy()
947 csr |= TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_prep_dma_memcpy()
949 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1); in tegra_dma_prep_dma_memcpy()
983 sg_req[0].ch_regs.csr = csr; in tegra_dma_prep_dma_memcpy()
1000 u32 csr, mc_seq, apb_ptr = 0, mmio_seq = 0; in tegra_dma_prep_slave_sg() local
1021 ret = get_transfer_param(tdc, direction, &apb_ptr, &mmio_seq, &csr, in tegra_dma_prep_slave_sg()
1027 csr |= TEGRA_GPCDMA_CSR_ONCE; in tegra_dma_prep_slave_sg()
1029 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id); in tegra_dma_prep_slave_sg()
1031 csr |= TEGRA_GPCDMA_CSR_IRQ_MASK; in tegra_dma_prep_slave_sg()
1033 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1); in tegra_dma_prep_slave_sg()
1037 csr |= TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_prep_slave_sg()
1102 sg_req[i].ch_regs.csr = csr; in tegra_dma_prep_slave_sg()
1118 u32 csr, mc_seq, apb_ptr = 0, mmio_seq = 0, burst_size; in tegra_dma_prep_dma_cyclic() local
1156 ret = get_transfer_param(tdc, direction, &apb_ptr, &mmio_seq, &csr, in tegra_dma_prep_dma_cyclic()
1162 csr &= ~TEGRA_GPCDMA_CSR_ONCE; in tegra_dma_prep_dma_cyclic()
1164 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id); in tegra_dma_prep_dma_cyclic()
1166 csr |= TEGRA_GPCDMA_CSR_IRQ_MASK; in tegra_dma_prep_dma_cyclic()
1168 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1); in tegra_dma_prep_dma_cyclic()
1172 csr |= TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_prep_dma_cyclic()
1223 sg_req[i].ch_regs.csr = csr; in tegra_dma_prep_dma_cyclic()