196 	void __iomem		*chn_base;  member
254 	u32 orig = readl(schan->chn_base + reg);  in sprd_dma_chn_update()
258 	writel(tmp, schan->chn_base + reg);  in sprd_dma_chn_update()
350 			pause = readl(schan->chn_base + SPRD_DMA_CHN_PAUSE);  in sprd_dma_pause_resume()
368 	u32 cfg = readl(schan->chn_base + SPRD_DMA_CHN_CFG);  in sprd_dma_stop_and_disable()
381 	addr = readl(schan->chn_base + SPRD_DMA_CHN_SRC_ADDR);  in sprd_dma_get_src_addr()
382 	addr_high = readl(schan->chn_base + SPRD_DMA_CHN_WARP_PTR) &  in sprd_dma_get_src_addr()
392 	addr = readl(schan->chn_base + SPRD_DMA_CHN_DES_ADDR);  in sprd_dma_get_dst_addr()
393 	addr_high = readl(schan->chn_base + SPRD_DMA_CHN_WARP_TO) &  in sprd_dma_get_dst_addr()
402 	u32 intc_sts = readl(schan->chn_base + SPRD_DMA_CHN_INTC) &  in sprd_dma_get_int_type()
429 	u32 frag_reg = readl(schan->chn_base + SPRD_DMA_CHN_FRG_LEN);  in sprd_dma_get_req_type()
516 	writel(cfg->pause, schan->chn_base + SPRD_DMA_CHN_PAUSE);  in sprd_dma_set_chn_config()
517 	writel(cfg->cfg, schan->chn_base + SPRD_DMA_CHN_CFG);  in sprd_dma_set_chn_config()
518 	writel(cfg->intc, schan->chn_base + SPRD_DMA_CHN_INTC);  in sprd_dma_set_chn_config()
519 	writel(cfg->src_addr, schan->chn_base + SPRD_DMA_CHN_SRC_ADDR);  in sprd_dma_set_chn_config()
520 	writel(cfg->des_addr, schan->chn_base + SPRD_DMA_CHN_DES_ADDR);  in sprd_dma_set_chn_config()
521 	writel(cfg->frg_len, schan->chn_base + SPRD_DMA_CHN_FRG_LEN);  in sprd_dma_set_chn_config()
522 	writel(cfg->blk_len, schan->chn_base + SPRD_DMA_CHN_BLK_LEN);  in sprd_dma_set_chn_config()
523 	writel(cfg->trsc_len, schan->chn_base + SPRD_DMA_CHN_TRSC_LEN);  in sprd_dma_set_chn_config()
524 	writel(cfg->trsf_step, schan->chn_base + SPRD_DMA_CHN_TRSF_STEP);  in sprd_dma_set_chn_config()
525 	writel(cfg->wrap_ptr, schan->chn_base + SPRD_DMA_CHN_WARP_PTR);  in sprd_dma_set_chn_config()
526 	writel(cfg->wrap_to, schan->chn_base + SPRD_DMA_CHN_WARP_TO);  in sprd_dma_set_chn_config()
527 	writel(cfg->llist_ptr, schan->chn_base + SPRD_DMA_CHN_LLIST_PTR);  in sprd_dma_set_chn_config()
528 	writel(cfg->frg_step, schan->chn_base + SPRD_DMA_CHN_FRAG_STEP);  in sprd_dma_set_chn_config()
529 	writel(cfg->src_blk_step, schan->chn_base + SPRD_DMA_CHN_SRC_BLK_STEP);  in sprd_dma_set_chn_config()
530 	writel(cfg->des_blk_step, schan->chn_base + SPRD_DMA_CHN_DES_BLK_STEP);  in sprd_dma_set_chn_config()
531 	writel(cfg->req, schan->chn_base + SPRD_DMA_CHN_REQ);  in sprd_dma_set_chn_config()
1191 		dma_chn->chn_base = sdev->glb_base + SPRD_DMA_CHN_REG_OFFSET +  in sprd_dma_probe()