Lines Matching refs:DMA_CS
54 #define DMA_CS 0x0018 macro
527 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_cctrl_cfg()
565 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_irq_init()
589 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_set_class()
604 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_on()
621 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_off()
642 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_desc_hw_cfg()
706 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_reset()
732 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_byte_offset_cfg()
748 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_data_endian_cfg()
764 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_desc_endian_cfg()
783 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_hdr_mode_cfg()
799 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_rxwr_np_cfg()
814 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_abc_cfg()
1008 writel(c->nr, d->base + DMA_CS); in ldma_chan_irq_en()
1107 writel(c->nr, d->base + DMA_CS); in dma_chan_irq()