Lines Matching refs:sdmac

393 	struct sdma_channel	*sdmac;  member
691 static int sdma_config_ownership(struct sdma_channel *sdmac, in sdma_config_ownership() argument
694 struct sdma_engine *sdma = sdmac->sdma; in sdma_config_ownership()
695 int channel = sdmac->channel; in sdma_config_ownership()
794 static void sdma_event_enable(struct sdma_channel *sdmac, unsigned int event) in sdma_event_enable() argument
796 struct sdma_engine *sdma = sdmac->sdma; in sdma_event_enable()
797 int channel = sdmac->channel; in sdma_event_enable()
806 if (sdmac->sw_done) { in sdma_event_enable()
814 static void sdma_event_disable(struct sdma_channel *sdmac, unsigned int event) in sdma_event_disable() argument
816 struct sdma_engine *sdma = sdmac->sdma; in sdma_event_disable()
817 int channel = sdmac->channel; in sdma_event_disable()
831 static void sdma_start_desc(struct sdma_channel *sdmac) in sdma_start_desc() argument
833 struct virt_dma_desc *vd = vchan_next_desc(&sdmac->vc); in sdma_start_desc()
835 struct sdma_engine *sdma = sdmac->sdma; in sdma_start_desc()
836 int channel = sdmac->channel; in sdma_start_desc()
839 sdmac->desc = NULL; in sdma_start_desc()
842 sdmac->desc = desc = to_sdma_desc(&vd->tx); in sdma_start_desc()
848 sdma_enable_channel(sdma, sdmac->channel); in sdma_start_desc()
851 static void sdma_update_channel_loop(struct sdma_channel *sdmac) in sdma_update_channel_loop() argument
855 enum dma_status old_status = sdmac->status; in sdma_update_channel_loop()
861 while (sdmac->desc) { in sdma_update_channel_loop()
862 struct sdma_desc *desc = sdmac->desc; in sdma_update_channel_loop()
871 sdmac->status = DMA_ERROR; in sdma_update_channel_loop()
891 spin_unlock(&sdmac->vc.lock); in sdma_update_channel_loop()
893 spin_lock(&sdmac->vc.lock); in sdma_update_channel_loop()
899 sdmac->status = old_status; in sdma_update_channel_loop()
906 if (sdmac->desc && !is_sdma_channel_enabled(sdmac->sdma, sdmac->channel)) { in sdma_update_channel_loop()
907 dev_warn(sdmac->sdma->dev, "restart cyclic channel %d\n", sdmac->channel); in sdma_update_channel_loop()
908 sdma_enable_channel(sdmac->sdma, sdmac->channel); in sdma_update_channel_loop()
914 struct sdma_channel *sdmac = (struct sdma_channel *) data; in mxc_sdma_handle_channel_normal() local
918 sdmac->desc->chn_real_count = 0; in mxc_sdma_handle_channel_normal()
923 for (i = 0; i < sdmac->desc->num_bd; i++) { in mxc_sdma_handle_channel_normal()
924 bd = &sdmac->desc->bd[i]; in mxc_sdma_handle_channel_normal()
928 sdmac->desc->chn_real_count += bd->mode.count; in mxc_sdma_handle_channel_normal()
932 sdmac->status = DMA_ERROR; in mxc_sdma_handle_channel_normal()
934 sdmac->status = DMA_COMPLETE; in mxc_sdma_handle_channel_normal()
949 struct sdma_channel *sdmac = &sdma->channel[channel]; in sdma_int_handler() local
952 spin_lock(&sdmac->vc.lock); in sdma_int_handler()
953 desc = sdmac->desc; in sdma_int_handler()
955 if (sdmac->flags & IMX_DMA_SG_LOOP) { in sdma_int_handler()
956 if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) in sdma_int_handler()
957 sdma_update_channel_loop(sdmac); in sdma_int_handler()
961 mxc_sdma_handle_channel_normal(sdmac); in sdma_int_handler()
963 sdma_start_desc(sdmac); in sdma_int_handler()
967 spin_unlock(&sdmac->vc.lock); in sdma_int_handler()
977 static int sdma_get_pc(struct sdma_channel *sdmac, in sdma_get_pc() argument
980 struct sdma_engine *sdma = sdmac->sdma; in sdma_get_pc()
988 sdmac->pc_from_device = 0; in sdma_get_pc()
989 sdmac->pc_to_device = 0; in sdma_get_pc()
990 sdmac->device_to_device = 0; in sdma_get_pc()
991 sdmac->pc_to_pc = 0; in sdma_get_pc()
992 sdmac->is_ram_script = false; in sdma_get_pc()
1022 if (sdmac->sdma->drvdata->ecspi_fixed) { in sdma_get_pc()
1026 sdmac->is_ram_script = true; in sdma_get_pc()
1039 sdmac->is_ram_script = true; in sdma_get_pc()
1054 sdmac->is_ram_script = true; in sdma_get_pc()
1081 sdmac->is_ram_script = true; in sdma_get_pc()
1089 sdmac->pc_from_device = per_2_emi; in sdma_get_pc()
1090 sdmac->pc_to_device = emi_2_per; in sdma_get_pc()
1091 sdmac->device_to_device = per_2_per; in sdma_get_pc()
1092 sdmac->pc_to_pc = emi_2_emi; in sdma_get_pc()
1097 static int sdma_load_context(struct sdma_channel *sdmac) in sdma_load_context() argument
1099 struct sdma_engine *sdma = sdmac->sdma; in sdma_load_context()
1100 int channel = sdmac->channel; in sdma_load_context()
1107 if (sdmac->direction == DMA_DEV_TO_MEM) in sdma_load_context()
1108 load_address = sdmac->pc_from_device; in sdma_load_context()
1109 else if (sdmac->direction == DMA_DEV_TO_DEV) in sdma_load_context()
1110 load_address = sdmac->device_to_device; in sdma_load_context()
1111 else if (sdmac->direction == DMA_MEM_TO_MEM) in sdma_load_context()
1112 load_address = sdmac->pc_to_pc; in sdma_load_context()
1114 load_address = sdmac->pc_to_device; in sdma_load_context()
1120 dev_dbg(sdma->dev, "wml = 0x%08x\n", (u32)sdmac->watermark_level); in sdma_load_context()
1121 dev_dbg(sdma->dev, "shp_addr = 0x%08x\n", sdmac->shp_addr); in sdma_load_context()
1122 dev_dbg(sdma->dev, "per_addr = 0x%08x\n", sdmac->per_addr); in sdma_load_context()
1123 dev_dbg(sdma->dev, "event_mask0 = 0x%08x\n", (u32)sdmac->event_mask[0]); in sdma_load_context()
1124 dev_dbg(sdma->dev, "event_mask1 = 0x%08x\n", (u32)sdmac->event_mask[1]); in sdma_load_context()
1134 if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { in sdma_load_context()
1135 context->gReg[4] = sdmac->per_addr; in sdma_load_context()
1136 context->gReg[6] = sdmac->shp_addr; in sdma_load_context()
1138 context->gReg[0] = sdmac->event_mask[1]; in sdma_load_context()
1139 context->gReg[1] = sdmac->event_mask[0]; in sdma_load_context()
1140 context->gReg[2] = sdmac->per_addr; in sdma_load_context()
1141 context->gReg[6] = sdmac->shp_addr; in sdma_load_context()
1142 context->gReg[7] = sdmac->watermark_level; in sdma_load_context()
1164 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_disable_channel() local
1165 struct sdma_engine *sdma = sdmac->sdma; in sdma_disable_channel()
1166 int channel = sdmac->channel; in sdma_disable_channel()
1169 sdmac->status = DMA_ERROR; in sdma_disable_channel()
1175 struct sdma_channel *sdmac = container_of(work, struct sdma_channel, in sdma_channel_terminate_work() local
1185 vchan_dma_desc_free_list(&sdmac->vc, &sdmac->terminated); in sdma_channel_terminate_work()
1190 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_terminate_all() local
1193 spin_lock_irqsave(&sdmac->vc.lock, flags); in sdma_terminate_all()
1197 if (sdmac->desc) { in sdma_terminate_all()
1198 vchan_terminate_vdesc(&sdmac->desc->vd); in sdma_terminate_all()
1205 vchan_get_all_descriptors(&sdmac->vc, &sdmac->terminated); in sdma_terminate_all()
1206 sdmac->desc = NULL; in sdma_terminate_all()
1207 schedule_work(&sdmac->terminate_worker); in sdma_terminate_all()
1210 spin_unlock_irqrestore(&sdmac->vc.lock, flags); in sdma_terminate_all()
1217 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_channel_synchronize() local
1219 vchan_synchronize(&sdmac->vc); in sdma_channel_synchronize()
1221 flush_work(&sdmac->terminate_worker); in sdma_channel_synchronize()
1224 static void sdma_set_watermarklevel_for_p2p(struct sdma_channel *sdmac) in sdma_set_watermarklevel_for_p2p() argument
1226 struct sdma_engine *sdma = sdmac->sdma; in sdma_set_watermarklevel_for_p2p()
1228 int lwml = sdmac->watermark_level & SDMA_WATERMARK_LEVEL_LWML; in sdma_set_watermarklevel_for_p2p()
1229 int hwml = (sdmac->watermark_level & SDMA_WATERMARK_LEVEL_HWML) >> 16; in sdma_set_watermarklevel_for_p2p()
1231 set_bit(sdmac->event_id0 % 32, &sdmac->event_mask[1]); in sdma_set_watermarklevel_for_p2p()
1232 set_bit(sdmac->event_id1 % 32, &sdmac->event_mask[0]); in sdma_set_watermarklevel_for_p2p()
1234 if (sdmac->event_id0 > 31) in sdma_set_watermarklevel_for_p2p()
1235 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_LWE; in sdma_set_watermarklevel_for_p2p()
1237 if (sdmac->event_id1 > 31) in sdma_set_watermarklevel_for_p2p()
1238 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_HWE; in sdma_set_watermarklevel_for_p2p()
1246 sdmac->watermark_level &= ~(SDMA_WATERMARK_LEVEL_LWML | in sdma_set_watermarklevel_for_p2p()
1248 sdmac->watermark_level |= hwml; in sdma_set_watermarklevel_for_p2p()
1249 sdmac->watermark_level |= lwml << 16; in sdma_set_watermarklevel_for_p2p()
1250 swap(sdmac->event_mask[0], sdmac->event_mask[1]); in sdma_set_watermarklevel_for_p2p()
1253 if (sdmac->per_address2 >= sdma->spba_start_addr && in sdma_set_watermarklevel_for_p2p()
1254 sdmac->per_address2 <= sdma->spba_end_addr) in sdma_set_watermarklevel_for_p2p()
1255 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_SP; in sdma_set_watermarklevel_for_p2p()
1257 if (sdmac->per_address >= sdma->spba_start_addr && in sdma_set_watermarklevel_for_p2p()
1258 sdmac->per_address <= sdma->spba_end_addr) in sdma_set_watermarklevel_for_p2p()
1259 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_DP; in sdma_set_watermarklevel_for_p2p()
1261 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_CONT; in sdma_set_watermarklevel_for_p2p()
1264 static void sdma_set_watermarklevel_for_sais(struct sdma_channel *sdmac) in sdma_set_watermarklevel_for_sais() argument
1270 if (sdmac->sw_done) in sdma_set_watermarklevel_for_sais()
1271 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_SW_DONE; in sdma_set_watermarklevel_for_sais()
1273 if (sdmac->direction == DMA_DEV_TO_MEM) { in sdma_set_watermarklevel_for_sais()
1274 n_fifos = sdmac->n_fifos_src; in sdma_set_watermarklevel_for_sais()
1275 stride_fifos = sdmac->stride_fifos_src; in sdma_set_watermarklevel_for_sais()
1277 n_fifos = sdmac->n_fifos_dst; in sdma_set_watermarklevel_for_sais()
1278 stride_fifos = sdmac->stride_fifos_dst; in sdma_set_watermarklevel_for_sais()
1281 words_per_fifo = sdmac->words_per_fifo; in sdma_set_watermarklevel_for_sais()
1283 sdmac->watermark_level |= in sdma_set_watermarklevel_for_sais()
1285 sdmac->watermark_level |= in sdma_set_watermarklevel_for_sais()
1288 sdmac->watermark_level |= in sdma_set_watermarklevel_for_sais()
1294 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_config_channel() local
1299 sdmac->event_mask[0] = 0; in sdma_config_channel()
1300 sdmac->event_mask[1] = 0; in sdma_config_channel()
1301 sdmac->shp_addr = 0; in sdma_config_channel()
1302 sdmac->per_addr = 0; in sdma_config_channel()
1304 switch (sdmac->peripheral_type) { in sdma_config_channel()
1306 sdma_config_ownership(sdmac, false, true, true); in sdma_config_channel()
1309 sdma_config_ownership(sdmac, false, true, false); in sdma_config_channel()
1312 sdma_config_ownership(sdmac, true, true, false); in sdma_config_channel()
1316 ret = sdma_get_pc(sdmac, sdmac->peripheral_type); in sdma_config_channel()
1320 if ((sdmac->peripheral_type != IMX_DMATYPE_MEMORY) && in sdma_config_channel()
1321 (sdmac->peripheral_type != IMX_DMATYPE_DSP)) { in sdma_config_channel()
1323 if (sdmac->event_id1) { in sdma_config_channel()
1324 if (sdmac->peripheral_type == IMX_DMATYPE_ASRC_SP || in sdma_config_channel()
1325 sdmac->peripheral_type == IMX_DMATYPE_ASRC) in sdma_config_channel()
1326 sdma_set_watermarklevel_for_p2p(sdmac); in sdma_config_channel()
1328 if (sdmac->peripheral_type == in sdma_config_channel()
1330 sdma_set_watermarklevel_for_sais(sdmac); in sdma_config_channel()
1332 __set_bit(sdmac->event_id0, sdmac->event_mask); in sdma_config_channel()
1336 sdmac->shp_addr = sdmac->per_address; in sdma_config_channel()
1337 sdmac->per_addr = sdmac->per_address2; in sdma_config_channel()
1339 sdmac->watermark_level = 0; /* FIXME: M3_BASE_ADDRESS */ in sdma_config_channel()
1345 static int sdma_set_channel_priority(struct sdma_channel *sdmac, in sdma_set_channel_priority() argument
1348 struct sdma_engine *sdma = sdmac->sdma; in sdma_set_channel_priority()
1349 int channel = sdmac->channel; in sdma_set_channel_priority()
1388 desc->bd = dma_alloc_coherent(desc->sdmac->sdma->dev, bd_size, in sdma_alloc_bd()
1402 dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd, in sdma_free_bd()
1416 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_alloc_chan_resources() local
1431 dev_dbg(sdmac->sdma->dev, "MEMCPY in case?\n"); in sdma_alloc_chan_resources()
1438 ret = sdma_get_pc(sdmac, IMX_DMATYPE_MEMORY); in sdma_alloc_chan_resources()
1456 sdmac->peripheral_type = data->peripheral_type; in sdma_alloc_chan_resources()
1457 sdmac->event_id0 = data->dma_request; in sdma_alloc_chan_resources()
1458 sdmac->event_id1 = data->dma_request2; in sdma_alloc_chan_resources()
1460 ret = clk_enable(sdmac->sdma->clk_ipg); in sdma_alloc_chan_resources()
1463 ret = clk_enable(sdmac->sdma->clk_ahb); in sdma_alloc_chan_resources()
1467 ret = sdma_set_channel_priority(sdmac, prio); in sdma_alloc_chan_resources()
1474 clk_disable(sdmac->sdma->clk_ahb); in sdma_alloc_chan_resources()
1476 clk_disable(sdmac->sdma->clk_ipg); in sdma_alloc_chan_resources()
1482 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_free_chan_resources() local
1483 struct sdma_engine *sdma = sdmac->sdma; in sdma_free_chan_resources()
1489 sdma_event_disable(sdmac, sdmac->event_id0); in sdma_free_chan_resources()
1490 if (sdmac->event_id1) in sdma_free_chan_resources()
1491 sdma_event_disable(sdmac, sdmac->event_id1); in sdma_free_chan_resources()
1493 sdmac->event_id0 = 0; in sdma_free_chan_resources()
1494 sdmac->event_id1 = 0; in sdma_free_chan_resources()
1496 sdma_set_channel_priority(sdmac, 0); in sdma_free_chan_resources()
1502 static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac, in sdma_transfer_init() argument
1507 if (!sdmac->sdma->fw_loaded && sdmac->is_ram_script) { in sdma_transfer_init()
1508 dev_warn_once(sdmac->sdma->dev, "sdma firmware not ready!\n"); in sdma_transfer_init()
1516 sdmac->status = DMA_IN_PROGRESS; in sdma_transfer_init()
1517 sdmac->direction = direction; in sdma_transfer_init()
1518 sdmac->flags = 0; in sdma_transfer_init()
1524 desc->sdmac = sdmac; in sdma_transfer_init()
1532 sdma_config_ownership(sdmac, false, true, false); in sdma_transfer_init()
1534 if (sdma_load_context(sdmac)) in sdma_transfer_init()
1551 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_prep_memcpy() local
1552 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_memcpy()
1553 int channel = sdmac->channel; in sdma_prep_memcpy()
1565 desc = sdma_transfer_init(sdmac, DMA_MEM_TO_MEM, in sdma_prep_memcpy()
1600 return vchan_tx_prep(&sdmac->vc, &desc->vd, flags); in sdma_prep_memcpy()
1608 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_prep_slave_sg() local
1609 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_slave_sg()
1611 int channel = sdmac->channel; in sdma_prep_slave_sg()
1615 sdma_config_write(chan, &sdmac->slave_config, direction); in sdma_prep_slave_sg()
1617 desc = sdma_transfer_init(sdmac, direction, sg_len); in sdma_prep_slave_sg()
1641 if (sdmac->word_size > DMA_SLAVE_BUSWIDTH_4_BYTES) in sdma_prep_slave_sg()
1644 switch (sdmac->word_size) { in sdma_prep_slave_sg()
1678 return vchan_tx_prep(&sdmac->vc, &desc->vd, flags); in sdma_prep_slave_sg()
1683 sdmac->status = DMA_ERROR; in sdma_prep_slave_sg()
1692 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_prep_dma_cyclic() local
1693 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_dma_cyclic()
1695 int channel = sdmac->channel; in sdma_prep_dma_cyclic()
1701 if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) in sdma_prep_dma_cyclic()
1704 sdma_config_write(chan, &sdmac->slave_config, direction); in sdma_prep_dma_cyclic()
1706 desc = sdma_transfer_init(sdmac, direction, num_periods); in sdma_prep_dma_cyclic()
1712 sdmac->flags |= IMX_DMA_SG_LOOP; in sdma_prep_dma_cyclic()
1720 if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) in sdma_prep_dma_cyclic()
1721 return vchan_tx_prep(&sdmac->vc, &desc->vd, flags); in sdma_prep_dma_cyclic()
1731 if (sdmac->word_size > DMA_SLAVE_BUSWIDTH_4_BYTES) in sdma_prep_dma_cyclic()
1733 if (sdmac->word_size == DMA_SLAVE_BUSWIDTH_4_BYTES) in sdma_prep_dma_cyclic()
1736 bd->mode.command = sdmac->word_size; in sdma_prep_dma_cyclic()
1755 return vchan_tx_prep(&sdmac->vc, &desc->vd, flags); in sdma_prep_dma_cyclic()
1760 sdmac->status = DMA_ERROR; in sdma_prep_dma_cyclic()
1768 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_config_write() local
1771 sdmac->per_address = dmaengine_cfg->src_addr; in sdma_config_write()
1772 sdmac->watermark_level = dmaengine_cfg->src_maxburst * in sdma_config_write()
1774 sdmac->word_size = dmaengine_cfg->src_addr_width; in sdma_config_write()
1776 sdmac->per_address2 = dmaengine_cfg->src_addr; in sdma_config_write()
1777 sdmac->per_address = dmaengine_cfg->dst_addr; in sdma_config_write()
1778 sdmac->watermark_level = dmaengine_cfg->src_maxburst & in sdma_config_write()
1780 sdmac->watermark_level |= (dmaengine_cfg->dst_maxburst << 16) & in sdma_config_write()
1782 sdmac->word_size = dmaengine_cfg->dst_addr_width; in sdma_config_write()
1783 } else if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { in sdma_config_write()
1784 sdmac->per_address = dmaengine_cfg->dst_addr; in sdma_config_write()
1785 sdmac->per_address2 = dmaengine_cfg->src_addr; in sdma_config_write()
1786 sdmac->watermark_level = 0; in sdma_config_write()
1788 sdmac->per_address = dmaengine_cfg->dst_addr; in sdma_config_write()
1789 sdmac->watermark_level = dmaengine_cfg->dst_maxburst * in sdma_config_write()
1791 sdmac->word_size = dmaengine_cfg->dst_addr_width; in sdma_config_write()
1793 sdmac->direction = direction; in sdma_config_write()
1800 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_config() local
1801 struct sdma_engine *sdma = sdmac->sdma; in sdma_config()
1803 memcpy(&sdmac->slave_config, dmaengine_cfg, sizeof(*dmaengine_cfg)); in sdma_config()
1813 sdmac->n_fifos_src = sdmacfg->n_fifos_src; in sdma_config()
1814 sdmac->n_fifos_dst = sdmacfg->n_fifos_dst; in sdma_config()
1815 sdmac->stride_fifos_src = sdmacfg->stride_fifos_src; in sdma_config()
1816 sdmac->stride_fifos_dst = sdmacfg->stride_fifos_dst; in sdma_config()
1817 sdmac->words_per_fifo = sdmacfg->words_per_fifo; in sdma_config()
1818 sdmac->sw_done = sdmacfg->sw_done; in sdma_config()
1822 if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events) in sdma_config()
1824 sdma_event_enable(sdmac, sdmac->event_id0); in sdma_config()
1826 if (sdmac->event_id1) { in sdma_config()
1827 if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events) in sdma_config()
1829 sdma_event_enable(sdmac, sdmac->event_id1); in sdma_config()
1839 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_tx_status() local
1850 spin_lock_irqsave(&sdmac->vc.lock, flags); in sdma_tx_status()
1852 vd = vchan_find_desc(&sdmac->vc, cookie); in sdma_tx_status()
1855 else if (sdmac->desc && sdmac->desc->vd.tx.cookie == cookie) in sdma_tx_status()
1856 desc = sdmac->desc; in sdma_tx_status()
1859 if (sdmac->flags & IMX_DMA_SG_LOOP) in sdma_tx_status()
1868 spin_unlock_irqrestore(&sdmac->vc.lock, flags); in sdma_tx_status()
1873 return sdmac->status; in sdma_tx_status()
1878 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_issue_pending() local
1881 spin_lock_irqsave(&sdmac->vc.lock, flags); in sdma_issue_pending()
1882 if (vchan_issue_pending(&sdmac->vc) && !sdmac->desc) in sdma_issue_pending()
1883 sdma_start_desc(sdmac); in sdma_issue_pending()
1884 spin_unlock_irqrestore(&sdmac->vc.lock, flags); in sdma_issue_pending()
2148 struct sdma_channel *sdmac = to_sdma_chan(chan); in sdma_filter_fn() local
2154 sdmac->data = *data; in sdma_filter_fn()
2155 chan->private = &sdmac->data; in sdma_filter_fn()
2261 struct sdma_channel *sdmac = &sdma->channel[i]; in sdma_probe() local
2263 sdmac->sdma = sdma; in sdma_probe()
2265 sdmac->channel = i; in sdma_probe()
2266 sdmac->vc.desc_free = sdma_desc_free; in sdma_probe()
2267 INIT_LIST_HEAD(&sdmac->terminated); in sdma_probe()
2268 INIT_WORK(&sdmac->terminate_worker, in sdma_probe()
2276 vchan_init(&sdmac->vc, &sdma->dma_device); in sdma_probe()
2373 struct sdma_channel *sdmac = &sdma->channel[i]; in sdma_remove() local
2375 tasklet_kill(&sdmac->vc.task); in sdma_remove()
2376 sdma_free_chan_resources(&sdmac->vc.chan); in sdma_remove()