237 static void imx_dmav1_writel(struct imxdma_engine *imxdma, unsigned val,  in imx_dmav1_writel()  function
273 		imx_dmav1_writel(imxdma, sg->dma_address,  in imxdma_sg_next()
276 		imx_dmav1_writel(imxdma, sg->dma_address,  in imxdma_sg_next()
279 	imx_dmav1_writel(imxdma, now, DMA_CNTR(imxdmac->channel));  in imxdma_sg_next()
299 	imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);  in imxdma_enable_hw()
300 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) &  in imxdma_enable_hw()
302 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) |  in imxdma_enable_hw()
312 			imx_dmav1_writel(imxdma, tmp | CCR_RPT | CCR_ACRPT,  in imxdma_enable_hw()
332 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) |  in imxdma_disable_hw()
334 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) &  in imxdma_disable_hw()
336 	imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);  in imxdma_disable_hw()
346 	imx_dmav1_writel(imxdma, 0, DMA_CCR(channel));  in imxdma_watchdog()
371 	imx_dmav1_writel(imxdma, disr & err_mask, DMA_DISR);  in imxdma_err_handler()
379 			imx_dmav1_writel(imxdma, 1 << i, DMA_DBTOSR);  in imxdma_err_handler()
383 			imx_dmav1_writel(imxdma, 1 << i, DMA_DRTOSR);  in imxdma_err_handler()
387 			imx_dmav1_writel(imxdma, 1 << i, DMA_DSESR);  in imxdma_err_handler()
391 			imx_dmav1_writel(imxdma, 1 << i, DMA_DBOSR);  in imxdma_err_handler()
442 				imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));  in dma_irq_handle_channel()
444 				imx_dmav1_writel(imxdma, tmp & ~CCR_CEN,  in dma_irq_handle_channel()
449 			imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));  in dma_irq_handle_channel()
465 	imx_dmav1_writel(imxdma, 0, DMA_CCR(chno));  in dma_irq_handle_channel()
482 	imx_dmav1_writel(imxdma, disr, DMA_DISR);  in dma_irq_handler()
525 			imx_dmav1_writel(imxdma, d->x, DMA_XSRA);  in imxdma_xfer_desc()
526 			imx_dmav1_writel(imxdma, d->y, DMA_YSRA);  in imxdma_xfer_desc()
527 			imx_dmav1_writel(imxdma, d->w, DMA_WSRA);  in imxdma_xfer_desc()
531 			imx_dmav1_writel(imxdma, d->x, DMA_XSRB);  in imxdma_xfer_desc()
532 			imx_dmav1_writel(imxdma, d->y, DMA_YSRB);  in imxdma_xfer_desc()
533 			imx_dmav1_writel(imxdma, d->w, DMA_WSRB);  in imxdma_xfer_desc()
541 		imx_dmav1_writel(imxdma, d->src, DMA_SAR(imxdmac->channel));  in imxdma_xfer_desc()
542 		imx_dmav1_writel(imxdma, d->dest, DMA_DAR(imxdmac->channel));  in imxdma_xfer_desc()
543 		imx_dmav1_writel(imxdma, d->config_mem | (d->config_port << 2),  in imxdma_xfer_desc()
546 		imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel));  in imxdma_xfer_desc()
559 			imx_dmav1_writel(imxdma, imxdmac->per_address,  in imxdma_xfer_desc()
561 			imx_dmav1_writel(imxdma, imxdmac->ccr_from_device,  in imxdma_xfer_desc()
570 			imx_dmav1_writel(imxdma, imxdmac->per_address,  in imxdma_xfer_desc()
572 			imx_dmav1_writel(imxdma, imxdmac->ccr_to_device,  in imxdma_xfer_desc()
697 	imx_dmav1_writel(imxdma, imxdmac->dma_request,  in imxdma_config_write()
701 	imx_dmav1_writel(imxdma, imxdmac->watermark_level *  in imxdma_config_write()
1074 	imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);  in imxdma_probe()
1101 	imx_dmav1_writel(imxdma, DCR_DEN, DMA_DCR);  in imxdma_probe()
1104 	imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);  in imxdma_probe()
1107 	imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);  in imxdma_probe()