113 	list_for_each_entry_safe(chan, _chan, &fsl_edma->dma_dev.channels, device_node) {  in fsl_edma_xlate()
148 	list_for_each_entry_safe(chan, _chan, &fsl_edma->dma_dev.channels,  in fsl_edma3_xlate()
518 	INIT_LIST_HEAD(&fsl_edma->dma_dev.channels);  in fsl_edma_probe()
542 		vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev);  in fsl_edma_probe()
552 	dma_cap_set(DMA_PRIVATE, fsl_edma->dma_dev.cap_mask);  in fsl_edma_probe()
553 	dma_cap_set(DMA_SLAVE, fsl_edma->dma_dev.cap_mask);  in fsl_edma_probe()
554 	dma_cap_set(DMA_CYCLIC, fsl_edma->dma_dev.cap_mask);  in fsl_edma_probe()
555 	dma_cap_set(DMA_MEMCPY, fsl_edma->dma_dev.cap_mask);  in fsl_edma_probe()
557 	fsl_edma->dma_dev.dev = &pdev->dev;  in fsl_edma_probe()
558 	fsl_edma->dma_dev.device_alloc_chan_resources  in fsl_edma_probe()
560 	fsl_edma->dma_dev.device_free_chan_resources  in fsl_edma_probe()
562 	fsl_edma->dma_dev.device_tx_status = fsl_edma_tx_status;  in fsl_edma_probe()
563 	fsl_edma->dma_dev.device_prep_slave_sg = fsl_edma_prep_slave_sg;  in fsl_edma_probe()
564 	fsl_edma->dma_dev.device_prep_dma_cyclic = fsl_edma_prep_dma_cyclic;  in fsl_edma_probe()
565 	fsl_edma->dma_dev.device_prep_dma_memcpy = fsl_edma_prep_memcpy;  in fsl_edma_probe()
566 	fsl_edma->dma_dev.device_config = fsl_edma_slave_config;  in fsl_edma_probe()
567 	fsl_edma->dma_dev.device_pause = fsl_edma_pause;  in fsl_edma_probe()
568 	fsl_edma->dma_dev.device_resume = fsl_edma_resume;  in fsl_edma_probe()
569 	fsl_edma->dma_dev.device_terminate_all = fsl_edma_terminate_all;  in fsl_edma_probe()
570 	fsl_edma->dma_dev.device_synchronize = fsl_edma_synchronize;  in fsl_edma_probe()
571 	fsl_edma->dma_dev.device_issue_pending = fsl_edma_issue_pending;  in fsl_edma_probe()
573 	fsl_edma->dma_dev.src_addr_widths = FSL_EDMA_BUSWIDTHS;  in fsl_edma_probe()
574 	fsl_edma->dma_dev.dst_addr_widths = FSL_EDMA_BUSWIDTHS;  in fsl_edma_probe()
577 		fsl_edma->dma_dev.src_addr_widths |= BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);  in fsl_edma_probe()
578 		fsl_edma->dma_dev.dst_addr_widths |= BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);  in fsl_edma_probe()
581 	fsl_edma->dma_dev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);  in fsl_edma_probe()
583 		fsl_edma->dma_dev.directions |= BIT(DMA_DEV_TO_DEV);  in fsl_edma_probe()
585 	fsl_edma->dma_dev.copy_align = drvdata->flags & FSL_EDMA_DRV_ALIGN_64BYTE ?  in fsl_edma_probe()
590 	dma_set_max_seg_size(fsl_edma->dma_dev.dev, 0x3fff);  in fsl_edma_probe()
592 	fsl_edma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;  in fsl_edma_probe()
596 	ret = dma_async_device_register(&fsl_edma->dma_dev);  in fsl_edma_probe()
609 		dma_async_device_unregister(&fsl_edma->dma_dev);  in fsl_edma_probe()
626 	fsl_edma_cleanup_vchan(&fsl_edma->dma_dev);  in fsl_edma_remove()
628 	dma_async_device_unregister(&fsl_edma->dma_dev);  in fsl_edma_remove()