1256 	alg->halg.base.cra_priority = ATMEL_SHA_PRIORITY;  in atmel_sha_alg_init()
1257 	alg->halg.base.cra_flags = CRYPTO_ALG_ASYNC;  in atmel_sha_alg_init()
1258 	alg->halg.base.cra_ctxsize = sizeof(struct atmel_sha_ctx);  in atmel_sha_alg_init()
1259 	alg->halg.base.cra_module = THIS_MODULE;  in atmel_sha_alg_init()
1260 	alg->halg.base.cra_init = atmel_sha_cra_init;  in atmel_sha_alg_init()
1262 	alg->halg.statesize = sizeof(struct atmel_sha_reqctx);  in atmel_sha_alg_init()
1275 	.halg.base.cra_name		= "sha1",
1276 	.halg.base.cra_driver_name	= "atmel-sha1",
1277 	.halg.base.cra_blocksize	= SHA1_BLOCK_SIZE,
1279 	.halg.digestsize = SHA1_DIGEST_SIZE,
1282 	.halg.base.cra_name		= "sha256",
1283 	.halg.base.cra_driver_name	= "atmel-sha256",
1284 	.halg.base.cra_blocksize	= SHA256_BLOCK_SIZE,
1286 	.halg.digestsize = SHA256_DIGEST_SIZE,
1291 	.halg.base.cra_name		= "sha224",
1292 	.halg.base.cra_driver_name	= "atmel-sha224",
1293 	.halg.base.cra_blocksize	= SHA224_BLOCK_SIZE,
1295 	.halg.digestsize = SHA224_DIGEST_SIZE,
1300 	.halg.base.cra_name		= "sha384",
1301 	.halg.base.cra_driver_name	= "atmel-sha384",
1302 	.halg.base.cra_blocksize	= SHA384_BLOCK_SIZE,
1303 	.halg.base.cra_alignmask	= 0x3,
1305 	.halg.digestsize = SHA384_DIGEST_SIZE,
1308 	.halg.base.cra_name		= "sha512",
1309 	.halg.base.cra_driver_name	= "atmel-sha512",
1310 	.halg.base.cra_blocksize	= SHA512_BLOCK_SIZE,
1311 	.halg.base.cra_alignmask	= 0x3,
1313 	.halg.digestsize = SHA512_DIGEST_SIZE,
2045 	alg->halg.base.cra_priority = ATMEL_SHA_PRIORITY;  in atmel_sha_hmac_alg_init()
2046 	alg->halg.base.cra_flags = CRYPTO_ALG_ASYNC;  in atmel_sha_hmac_alg_init()
2047 	alg->halg.base.cra_ctxsize = sizeof(struct atmel_sha_hmac_ctx);  in atmel_sha_hmac_alg_init()
2048 	alg->halg.base.cra_module = THIS_MODULE;  in atmel_sha_hmac_alg_init()
2049 	alg->halg.base.cra_init	= atmel_sha_hmac_cra_init;  in atmel_sha_hmac_alg_init()
2050 	alg->halg.base.cra_exit	= atmel_sha_hmac_cra_exit;  in atmel_sha_hmac_alg_init()
2052 	alg->halg.statesize = sizeof(struct atmel_sha_reqctx);  in atmel_sha_hmac_alg_init()
2065 	.halg.base.cra_name		= "hmac(sha1)",
2066 	.halg.base.cra_driver_name	= "atmel-hmac-sha1",
2067 	.halg.base.cra_blocksize	= SHA1_BLOCK_SIZE,
2069 	.halg.digestsize = SHA1_DIGEST_SIZE,
2072 	.halg.base.cra_name		= "hmac(sha224)",
2073 	.halg.base.cra_driver_name	= "atmel-hmac-sha224",
2074 	.halg.base.cra_blocksize	= SHA224_BLOCK_SIZE,
2076 	.halg.digestsize = SHA224_DIGEST_SIZE,
2079 	.halg.base.cra_name		= "hmac(sha256)",
2080 	.halg.base.cra_driver_name	= "atmel-hmac-sha256",
2081 	.halg.base.cra_blocksize	= SHA256_BLOCK_SIZE,
2083 	.halg.digestsize = SHA256_DIGEST_SIZE,
2086 	.halg.base.cra_name		= "hmac(sha384)",
2087 	.halg.base.cra_driver_name	= "atmel-hmac-sha384",
2088 	.halg.base.cra_blocksize	= SHA384_BLOCK_SIZE,
2090 	.halg.digestsize = SHA384_DIGEST_SIZE,
2093 	.halg.base.cra_name		= "hmac(sha512)",
2094 	.halg.base.cra_driver_name	= "atmel-hmac-sha512",
2095 	.halg.base.cra_blocksize	= SHA512_BLOCK_SIZE,
2097 	.halg.digestsize = SHA512_DIGEST_SIZE,