Lines Matching +full:hardware +full:- +full:protected
1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Hardware crypto devices"
7 Say Y here to get to see options for hardware crypto devices and
39 called padlock-aes.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
95 tristate "Kernel API for protected key handling"
100 for creation and handling of protected keys. Other parts of the
106 Please note that creation of protected keys from secure keys
118 This is the s390 hardware accelerated implementation of the
119 AES cipher algorithms for use with protected key.
122 for example to use protected key encrypted devices.
131 and uses triple-DES to generate secure random numbers like the
132 ANSI X9.17 standard. User-space programs access the
133 pseudo-random-number device through the char device /dev/prandom.
149 sub-units. One set provides the Modular Arithmetic Unit,
250 This option provides the kernel-side support for the TRNG hardware
319 This driver provides kernel-side support through the
320 cryptographic API for the pseudo random number generator hardware
324 module will be called exynos-rng.
349 needed for small and zero-size messages.
357 This enables support for the NX hardware cryptographic accelerator
390 will be called atmel-aes.
403 will be called atmel-tdes.
416 will be called atmel-sha.
434 will be called atmel-ecc.
449 will be called atmel-sha204a.
473 co-processor on the die.
476 will be called mxs-dcp.
496 hardware. To compile this driver as a module, choose M here. The
528 (default), hashes-only, or skciphers-only.
531 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
535 algorithms, sharing the load with the CPU. Enabling skciphers-only
545 - AES (CBC, CTR, ECB, XTS)
546 - 3DES (CBC, ECB)
547 - DES (CBC, ECB)
548 - SHA1, HMAC-SHA1
549 - SHA256, HMAC-SHA256
552 bool "Symmetric-key ciphers only"
555 Enable symmetric-key ciphers only:
556 - AES (CBC, CTR, ECB, XTS)
557 - 3DES (ECB, CBC)
558 - DES (ECB, CBC)
565 - SHA1, HMAC-SHA1
566 - SHA256, HMAC-SHA256
573 - authenc()
574 - ccm(aes)
575 - rfc4309(ccm(aes))
587 Small blocks are processed faster in software than hardware.
588 Considering the 256-bit ciphers, software is 2-3 times faster than
589 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
590 With 128-bit keys, the break-even point would be around 1024-bytes.
593 cost in CPU usage. The minimum recommended setting is 16-bytes
594 (1 AES block), since AES-GCM will fail if you set it lower.
595 Setting this to zero will send all requests to the hardware.
597 Note that 192-bit keys are not supported by the hardware and are
599 are done by the hardware.
607 Generator hardware found on Qualcomm SoCs.
610 module will be called qcom-rng. If unsure, say N.
621 tristate "Imagination Technologies hardware hash accelerator"
629 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
649 This driver interfaces with the hardware crypto accelerator.
669 Xilinx ZynqMP has AES-GCM engine used for symmetric key
675 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"
680 This driver interfaces with SHA3 hardware engine.
722 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
726 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
729 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
742 Enables the driver for the on-chip crypto accelerator
772 Choose this if you wish to use hardware acceleration of
794 used for crypto offload. Select this if you want to use hardware