Lines Matching +full:signal +full:- +full:id
1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Encoder and Counter driver
9 * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
15 #include <linux/mfd/stm32-lptimer.h>
37 ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val); in stm32_lptim_is_enabled()
51 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val); in stm32_lptim_set_enable_state()
56 clk_disable(priv->clk); in stm32_lptim_set_enable_state()
57 priv->enabled = false; in stm32_lptim_set_enable_state()
62 ret = regmap_write(priv->regmap, STM32_LPTIM_ARR, priv->ceiling); in stm32_lptim_set_enable_state()
66 ret = regmap_write(priv->regmap, STM32_LPTIM_CMP, 0); in stm32_lptim_set_enable_state()
71 ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val, in stm32_lptim_set_enable_state()
77 ret = regmap_write(priv->regmap, STM32_LPTIM_ICR, in stm32_lptim_set_enable_state()
82 ret = clk_enable(priv->clk); in stm32_lptim_set_enable_state()
84 regmap_write(priv->regmap, STM32_LPTIM_CR, 0); in stm32_lptim_set_enable_state()
87 priv->enabled = true; in stm32_lptim_set_enable_state()
90 return regmap_update_bits(priv->regmap, STM32_LPTIM_CR, in stm32_lptim_set_enable_state()
101 if (priv->quadrature_mode) in stm32_lptim_setup()
105 val |= FIELD_PREP(STM32_LPTIM_CKPOL, enable ? priv->polarity : 0); in stm32_lptim_setup()
107 return regmap_update_bits(priv->regmap, STM32_LPTIM_CFGR, mask, val); in stm32_lptim_setup()
111 * In non-quadrature mode, device counts up on active edge.
113 * +---------+----------+--------------------+--------------------+
114 * | Active | Level on | IN1 signal | IN2 signal |
115 * | edge | opposite +----------+---------+----------+---------+
116 * | | signal | Rising | Falling | Rising | Falling |
117 * +---------+----------+----------+---------+----------+---------+
118 * | Rising | High -> | Down | - | Up | - |
119 * | edge | Low -> | Up | - | Down | - |
120 * +---------+----------+----------+---------+----------+---------+
121 * | Falling | High -> | - | Up | - | Down |
122 * | edge | Low -> | - | Down | - | Up |
123 * +---------+----------+----------+---------+----------+---------+
124 * | Both | High -> | Down | Up | Up | Down |
125 * | edges | Low -> | Up | Down | Down | Up |
126 * +---------+----------+----------+---------+----------+---------+
147 ret = regmap_read(priv->regmap, STM32_LPTIM_CNT, &cnt); in stm32_lptim_cnt_read()
162 if (!priv->quadrature_mode) { in stm32_lptim_cnt_function_read()
167 if (priv->polarity == STM32_LPTIM_CKPOL_BOTH_EDGES) { in stm32_lptim_cnt_function_read()
172 return -EINVAL; in stm32_lptim_cnt_function_read()
182 return -EBUSY; in stm32_lptim_cnt_function_write()
186 priv->quadrature_mode = 0; in stm32_lptim_cnt_function_write()
189 priv->quadrature_mode = 1; in stm32_lptim_cnt_function_write()
190 priv->polarity = STM32_LPTIM_CKPOL_BOTH_EDGES; in stm32_lptim_cnt_function_write()
194 return -EINVAL; in stm32_lptim_cnt_function_write()
226 return -EBUSY; in stm32_lptim_cnt_enable_write()
245 *ceiling = priv->ceiling; in stm32_lptim_cnt_ceiling_read()
257 return -EBUSY; in stm32_lptim_cnt_ceiling_write()
260 return -ERANGE; in stm32_lptim_cnt_ceiling_write()
262 priv->ceiling = ceiling; in stm32_lptim_cnt_ceiling_write()
289 /* LP Timer acts as up-counter on input 1 */ in stm32_lptim_cnt_action_read()
290 if (synapse->signal->id != count->synapses[0].signal->id) { in stm32_lptim_cnt_action_read()
295 switch (priv->polarity) { in stm32_lptim_cnt_action_read()
307 return -EINVAL; in stm32_lptim_cnt_action_read()
314 return -EINVAL; in stm32_lptim_cnt_action_read()
328 return -EBUSY; in stm32_lptim_cnt_action_write()
336 || synapse->signal->id != count->synapses[0].signal->id) in stm32_lptim_cnt_action_write()
337 return -EINVAL; in stm32_lptim_cnt_action_write()
341 priv->polarity = STM32_LPTIM_CKPOL_RISING_EDGE; in stm32_lptim_cnt_action_write()
344 priv->polarity = STM32_LPTIM_CKPOL_FALLING_EDGE; in stm32_lptim_cnt_action_write()
347 priv->polarity = STM32_LPTIM_CKPOL_BOTH_EDGES; in stm32_lptim_cnt_action_write()
350 return -EINVAL; in stm32_lptim_cnt_action_write()
364 .id = 0,
368 .id = 1,
377 .signal = &stm32_lptim_cnt_signals[0]
382 .signal = &stm32_lptim_cnt_signals[1]
388 .id = 0,
400 .id = 0,
412 struct stm32_lptimer *ddata = dev_get_drvdata(pdev->dev.parent); in stm32_lptim_cnt_probe()
418 return -EINVAL; in stm32_lptim_cnt_probe()
420 counter = devm_counter_alloc(&pdev->dev, sizeof(*priv)); in stm32_lptim_cnt_probe()
422 return -ENOMEM; in stm32_lptim_cnt_probe()
425 priv->dev = &pdev->dev; in stm32_lptim_cnt_probe()
426 priv->regmap = ddata->regmap; in stm32_lptim_cnt_probe()
427 priv->clk = ddata->clk; in stm32_lptim_cnt_probe()
428 priv->ceiling = STM32_LPTIM_MAX_ARR; in stm32_lptim_cnt_probe()
431 counter->name = dev_name(&pdev->dev); in stm32_lptim_cnt_probe()
432 counter->parent = &pdev->dev; in stm32_lptim_cnt_probe()
433 counter->ops = &stm32_lptim_cnt_ops; in stm32_lptim_cnt_probe()
434 if (ddata->has_encoder) { in stm32_lptim_cnt_probe()
435 counter->counts = &stm32_lptim_enc_counts; in stm32_lptim_cnt_probe()
436 counter->num_signals = ARRAY_SIZE(stm32_lptim_cnt_signals); in stm32_lptim_cnt_probe()
438 counter->counts = &stm32_lptim_in1_counts; in stm32_lptim_cnt_probe()
439 counter->num_signals = 1; in stm32_lptim_cnt_probe()
441 counter->num_counts = 1; in stm32_lptim_cnt_probe()
442 counter->signals = stm32_lptim_cnt_signals; in stm32_lptim_cnt_probe()
446 ret = devm_counter_add(&pdev->dev, counter); in stm32_lptim_cnt_probe()
448 return dev_err_probe(&pdev->dev, ret, "Failed to add counter\n"); in stm32_lptim_cnt_probe()
460 if (priv->enabled) { in stm32_lptim_cnt_suspend()
470 priv->enabled = true; in stm32_lptim_cnt_suspend()
485 if (priv->enabled) { in stm32_lptim_cnt_resume()
486 priv->enabled = false; in stm32_lptim_cnt_resume()
504 { .compatible = "st,stm32-lptimer-counter", },
512 .name = "stm32-lptimer-counter",
520 MODULE_ALIAS("platform:stm32-lptimer-counter");