75 	writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR);  in lpc32xx_clkevt_next_event()
76 	writel_relaxed(delta, ddata->base + LPC32XX_TIMER_MR0);  in lpc32xx_clkevt_next_event()
77 	writel_relaxed(LPC32XX_TIMER_TCR_CEN, ddata->base + LPC32XX_TIMER_TCR);  in lpc32xx_clkevt_next_event()
88 	writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR);  in lpc32xx_clkevt_shutdown()
102 	writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR);  in lpc32xx_clkevt_oneshot()
105 	writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R |  in lpc32xx_clkevt_oneshot()
116 	writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R,  in lpc32xx_clkevt_periodic()
123 	writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR);  in lpc32xx_clkevt_periodic()
124 	writel_relaxed(ddata->ticks_per_jiffy, ddata->base + LPC32XX_TIMER_MR0);  in lpc32xx_clkevt_periodic()
125 	writel_relaxed(LPC32XX_TIMER_TCR_CEN, ddata->base + LPC32XX_TIMER_TCR);  in lpc32xx_clkevt_periodic()
135 	writel_relaxed(LPC32XX_TIMER_IR_MR0INT, ddata->base + LPC32XX_TIMER_IR);  in lpc32xx_clock_event_handler()
186 	writel_relaxed(LPC32XX_TIMER_TCR_CRST, base + LPC32XX_TIMER_TCR);  in lpc32xx_clocksource_init()
187 	writel_relaxed(0, base + LPC32XX_TIMER_PR);  in lpc32xx_clocksource_init()
188 	writel_relaxed(0, base + LPC32XX_TIMER_MCR);  in lpc32xx_clocksource_init()
189 	writel_relaxed(0, base + LPC32XX_TIMER_CTCR);  in lpc32xx_clocksource_init()
190 	writel_relaxed(LPC32XX_TIMER_TCR_CEN, base + LPC32XX_TIMER_TCR);  in lpc32xx_clocksource_init()
253 	writel_relaxed(0, base + LPC32XX_TIMER_TCR);  in lpc32xx_clockevent_init()
254 	writel_relaxed(0, base + LPC32XX_TIMER_PR);  in lpc32xx_clockevent_init()
255 	writel_relaxed(0, base + LPC32XX_TIMER_CTCR);  in lpc32xx_clockevent_init()
256 	writel_relaxed(LPC32XX_TIMER_IR_MR0INT, base + LPC32XX_TIMER_IR);  in lpc32xx_clockevent_init()