26 	u16 reg_sel[SYSCTRL_MAX_NUM_PARENTS];  member
40 	ret = ab8500_sysctrl_write(clk->reg_sel[0], clk->reg_mask[0],  in clk_sysctrl_prepare()
53 	if (ab8500_sysctrl_clear(clk->reg_sel[0], clk->reg_mask[0]))  in clk_sysctrl_unprepare()
71 	if (clk->reg_sel[old_index]) {  in clk_sysctrl_set_parent()
72 		ret = ab8500_sysctrl_clear(clk->reg_sel[old_index],  in clk_sysctrl_set_parent()
78 	if (clk->reg_sel[index]) {  in clk_sysctrl_set_parent()
79 		ret = ab8500_sysctrl_write(clk->reg_sel[index],  in clk_sysctrl_set_parent()
83 			if (clk->reg_sel[old_index])  in clk_sysctrl_set_parent()
84 				ab8500_sysctrl_write(clk->reg_sel[old_index],  in clk_sysctrl_set_parent()
122 				u16 *reg_sel,  in clk_reg_sysctrl()  argument
148 	clk->reg_sel[0] = reg_sel[0];  in clk_reg_sysctrl()
154 		clk->reg_sel[i] = reg_sel[i];  in clk_reg_sysctrl()
181 				u16 reg_sel,  in clk_reg_sysctrl_gate()  argument
191 			&reg_sel, &reg_mask, &reg_bits, 0, enable_delay_us,  in clk_reg_sysctrl_gate()
198 					u16 reg_sel,  in clk_reg_sysctrl_gate_fixed_rate()  argument
209 			&reg_sel, &reg_mask, &reg_bits,  in clk_reg_sysctrl_gate_fixed_rate()
218 				u16 *reg_sel,  in clk_reg_sysctrl_set_parent()  argument
224 			reg_sel, reg_mask, reg_bits, 0, 0, flags,  in clk_reg_sysctrl_set_parent()