Lines Matching refs:con_id
809 { .con_id = "clk_m", .dt_id = TEGRA114_CLK_CLK_M },
810 { .con_id = "pll_ref", .dt_id = TEGRA114_CLK_PLL_REF },
811 { .con_id = "clk_32k", .dt_id = TEGRA114_CLK_CLK_32K },
812 { .con_id = "osc", .dt_id = TEGRA114_CLK_OSC },
813 { .con_id = "osc_div2", .dt_id = TEGRA114_CLK_OSC_DIV2 },
814 { .con_id = "osc_div4", .dt_id = TEGRA114_CLK_OSC_DIV4 },
815 { .con_id = "pll_c", .dt_id = TEGRA114_CLK_PLL_C },
816 { .con_id = "pll_c_out1", .dt_id = TEGRA114_CLK_PLL_C_OUT1 },
817 { .con_id = "pll_c2", .dt_id = TEGRA114_CLK_PLL_C2 },
818 { .con_id = "pll_c3", .dt_id = TEGRA114_CLK_PLL_C3 },
819 { .con_id = "pll_p", .dt_id = TEGRA114_CLK_PLL_P },
820 { .con_id = "pll_p_out1", .dt_id = TEGRA114_CLK_PLL_P_OUT1 },
821 { .con_id = "pll_p_out2", .dt_id = TEGRA114_CLK_PLL_P_OUT2 },
822 { .con_id = "pll_p_out3", .dt_id = TEGRA114_CLK_PLL_P_OUT3 },
823 { .con_id = "pll_p_out4", .dt_id = TEGRA114_CLK_PLL_P_OUT4 },
824 { .con_id = "pll_m", .dt_id = TEGRA114_CLK_PLL_M },
825 { .con_id = "pll_m_out1", .dt_id = TEGRA114_CLK_PLL_M_OUT1 },
826 { .con_id = "pll_x", .dt_id = TEGRA114_CLK_PLL_X },
827 { .con_id = "pll_x_out0", .dt_id = TEGRA114_CLK_PLL_X_OUT0 },
828 { .con_id = "pll_u", .dt_id = TEGRA114_CLK_PLL_U },
829 { .con_id = "pll_u_480M", .dt_id = TEGRA114_CLK_PLL_U_480M },
830 { .con_id = "pll_u_60M", .dt_id = TEGRA114_CLK_PLL_U_60M },
831 { .con_id = "pll_u_48M", .dt_id = TEGRA114_CLK_PLL_U_48M },
832 { .con_id = "pll_u_12M", .dt_id = TEGRA114_CLK_PLL_U_12M },
833 { .con_id = "pll_d", .dt_id = TEGRA114_CLK_PLL_D },
834 { .con_id = "pll_d_out0", .dt_id = TEGRA114_CLK_PLL_D_OUT0 },
835 { .con_id = "pll_d2", .dt_id = TEGRA114_CLK_PLL_D2 },
836 { .con_id = "pll_d2_out0", .dt_id = TEGRA114_CLK_PLL_D2_OUT0 },
837 { .con_id = "pll_a", .dt_id = TEGRA114_CLK_PLL_A },
838 { .con_id = "pll_a_out0", .dt_id = TEGRA114_CLK_PLL_A_OUT0 },
839 { .con_id = "pll_re_vco", .dt_id = TEGRA114_CLK_PLL_RE_VCO },
840 { .con_id = "pll_re_out", .dt_id = TEGRA114_CLK_PLL_RE_OUT },
841 { .con_id = "pll_e_out0", .dt_id = TEGRA114_CLK_PLL_E_OUT0 },
842 { .con_id = "spdif_in_sync", .dt_id = TEGRA114_CLK_SPDIF_IN_SYNC },
843 { .con_id = "i2s0_sync", .dt_id = TEGRA114_CLK_I2S0_SYNC },
844 { .con_id = "i2s1_sync", .dt_id = TEGRA114_CLK_I2S1_SYNC },
845 { .con_id = "i2s2_sync", .dt_id = TEGRA114_CLK_I2S2_SYNC },
846 { .con_id = "i2s3_sync", .dt_id = TEGRA114_CLK_I2S3_SYNC },
847 { .con_id = "i2s4_sync", .dt_id = TEGRA114_CLK_I2S4_SYNC },
848 { .con_id = "vimclk_sync", .dt_id = TEGRA114_CLK_VIMCLK_SYNC },
849 { .con_id = "audio0", .dt_id = TEGRA114_CLK_AUDIO0 },
850 { .con_id = "audio1", .dt_id = TEGRA114_CLK_AUDIO1 },
851 { .con_id = "audio2", .dt_id = TEGRA114_CLK_AUDIO2 },
852 { .con_id = "audio3", .dt_id = TEGRA114_CLK_AUDIO3 },
853 { .con_id = "audio4", .dt_id = TEGRA114_CLK_AUDIO4 },
854 { .con_id = "spdif", .dt_id = TEGRA114_CLK_SPDIF },
855 { .con_id = "audio0_2x", .dt_id = TEGRA114_CLK_AUDIO0_2X },
856 { .con_id = "audio1_2x", .dt_id = TEGRA114_CLK_AUDIO1_2X },
857 { .con_id = "audio2_2x", .dt_id = TEGRA114_CLK_AUDIO2_2X },
858 { .con_id = "audio3_2x", .dt_id = TEGRA114_CLK_AUDIO3_2X },
859 { .con_id = "audio4_2x", .dt_id = TEGRA114_CLK_AUDIO4_2X },
860 { .con_id = "spdif_2x", .dt_id = TEGRA114_CLK_SPDIF_2X },
861 { .con_id = "extern1", .dt_id = TEGRA114_CLK_EXTERN1 },
862 { .con_id = "extern2", .dt_id = TEGRA114_CLK_EXTERN2 },
863 { .con_id = "extern3", .dt_id = TEGRA114_CLK_EXTERN3 },
864 { .con_id = "cclk_g", .dt_id = TEGRA114_CLK_CCLK_G },
865 { .con_id = "cclk_lp", .dt_id = TEGRA114_CLK_CCLK_LP },
866 { .con_id = "sclk", .dt_id = TEGRA114_CLK_SCLK },
867 { .con_id = "hclk", .dt_id = TEGRA114_CLK_HCLK },
868 { .con_id = "pclk", .dt_id = TEGRA114_CLK_PCLK },
869 { .con_id = "fuse", .dt_id = TEGRA114_CLK_FUSE },