clk-pll.c - OpenGrok cross reference for /Linux-v6.6/drivers/clk/samsung/clk-pll.c

Lines Matching refs:enable_offs

28 	unsigned short		enable_offs;  member
122 	tmp |= BIT(pll->enable_offs);  in samsung_pll3xxx_enable()
134 	tmp &= ~BIT(pll->enable_offs);  in samsung_pll3xxx_disable()
288 	if (tmp & BIT(pll->enable_offs))  in samsung_pll35xx_set_rate()
400 	if (pll_con0 & BIT(pll->enable_offs))  in samsung_pll36xx_set_rate()
483 	if (pll_con3 & BIT(pll->enable_offs))  in samsung_pll0822x_set_rate()
580 	if (pll_con3 & BIT(pll->enable_offs))  in samsung_pll0831x_set_rate()
1309 		pll->enable_offs = PLL35XX_ENABLE_SHIFT;  in _samsung_clk_register_pll()
1319 		pll->enable_offs = PLL0822X_ENABLE_SHIFT;  in _samsung_clk_register_pll()
1339 		pll->enable_offs = PLL36XX_ENABLE_SHIFT;  in _samsung_clk_register_pll()
1347 		pll->enable_offs = PLL0831X_ENABLE_SHIFT;  in _samsung_clk_register_pll()