Lines Matching full:21
429 CLK_CON_GAT_GATE_CLKCMU_CORE_BUS, 21, 0, 0),
431 CLK_CON_GAT_GATE_CLKCMU_CORE_CCI, 21, 0, 0),
433 CLK_CON_GAT_GATE_CLKCMU_CORE_MMC_EMBD, 21, 0, 0),
435 CLK_CON_GAT_GATE_CLKCMU_CORE_SSS, 21, 0, 0),
439 "mout_clkcmu_apm_bus", CLK_CON_GAT_GATE_CLKCMU_APM_BUS, 21, 0, 0),
443 CLK_CON_GAT_GATE_CLKCMU_AUD, 21, 0, 0),
447 CLK_CON_GAT_GATE_CLKCMU_DPU, 21, 0, 0),
451 CLK_CON_GAT_GATE_CLKCMU_G3D_SWITCH, 21, 0, 0),
455 CLK_CON_GAT_GATE_CLKCMU_HSI_BUS, 21, 0, 0),
457 CLK_CON_GAT_GATE_CLKCMU_HSI_MMC_CARD, 21, 0, 0),
459 CLK_CON_GAT_GATE_CLKCMU_HSI_USB20DRD, 21, 0, 0),
464 CLK_CON_GAT_GATE_CLKCMU_IS_BUS, 21, CLK_IS_CRITICAL, 0),
466 CLK_CON_GAT_GATE_CLKCMU_IS_ITP, 21, CLK_IS_CRITICAL, 0),
468 CLK_CON_GAT_GATE_CLKCMU_IS_VRA, 21, CLK_IS_CRITICAL, 0),
470 CLK_CON_GAT_GATE_CLKCMU_IS_GDC, 21, CLK_IS_CRITICAL, 0),
475 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_MFC, 21, CLK_IS_CRITICAL, 0),
477 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_M2M, 21, CLK_IS_CRITICAL, 0),
479 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_MCSC, 21, CLK_IS_CRITICAL, 0),
481 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_JPEG, 21, CLK_IS_CRITICAL, 0),
485 CLK_CON_GAT_GATE_CLKCMU_PERI_BUS, 21, 0, 0),
487 CLK_CON_GAT_GATE_CLKCMU_PERI_UART, 21, 0, 0),
489 CLK_CON_GAT_GATE_CLKCMU_PERI_IP, 21, 0, 0),
608 CLK_CON_GAT_CLKCMU_CMGP_BUS, 21, 0, 0),
611 CLK_CON_GAT_GATE_CLKCMU_CHUB_BUS, 21, 0, 0),
613 CLK_CON_GAT_GOUT_APM_APBIF_RTC_PCLK, 21, 0, 0),
615 CLK_CON_GAT_GOUT_APM_APBIF_TOP_RTC_PCLK, 21, 0, 0),
617 CLK_CON_GAT_GOUT_APM_I3C_APM_PMIC_I_PCLK, 21, 0, 0),
619 CLK_CON_GAT_GOUT_APM_I3C_APM_PMIC_I_SCLK, 21, 0, 0),
621 CLK_CON_GAT_GOUT_APM_SPEEDY_APM_PCLK, 21, 0, 0),
624 CLK_CON_GAT_GOUT_APM_APBIF_GPIO_ALIVE_PCLK, 21, CLK_IGNORE_UNUSED,
627 CLK_CON_GAT_GOUT_APM_APBIF_PMU_ALIVE_PCLK, 21, CLK_IS_CRITICAL, 0),
629 CLK_CON_GAT_GOUT_APM_SYSREG_APM_PCLK, 21, 0, 0),
867 CLK_CON_GAT_CLK_AUD_CMU_AUD_PCLK, 21, CLK_IGNORE_UNUSED, 0),
869 CLK_CON_GAT_GOUT_AUD_ABOX_CCLK_CA32, 21, 0, 0),
871 CLK_CON_GAT_GOUT_AUD_ABOX_CCLK_ASB, 21, 0, 0),
873 CLK_CON_GAT_GOUT_AUD_ABOX_CCLK_DAP, 21, 0, 0),
876 CLK_CON_GAT_GOUT_AUD_ABOX_ACLK, 21, CLK_IGNORE_UNUSED, 0),
878 CLK_CON_GAT_GOUT_AUD_GPIO_PCLK, 21, 0, 0),
880 CLK_CON_GAT_GOUT_AUD_PPMU_ACLK, 21, 0, 0),
882 CLK_CON_GAT_GOUT_AUD_PPMU_PCLK, 21, 0, 0),
884 CLK_CON_GAT_GOUT_AUD_SYSMMU_CLK_S1, 21, 0, 0),
886 CLK_CON_GAT_GOUT_AUD_SYSREG_PCLK, 21, 0, 0),
888 CLK_CON_GAT_GOUT_AUD_WDT_PCLK, 21, 0, 0),
890 CLK_CON_GAT_GOUT_AUD_TZPC_PCLK, 21, 0, 0),
892 CLK_CON_GAT_GOUT_AUD_CODEC_MCLK, 21, 0, 0),
894 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_CNT, 21, 0, 0),
896 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF0, 21, 0, 0),
898 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF1, 21, 0, 0),
900 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF2, 21, 0, 0),
902 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF3, 21, 0, 0),
904 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF4, 21, 0, 0),
906 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF5, 21, 0, 0),
908 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF6, 21, 0, 0),
910 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_SPDY, 21, 0, 0),
995 CLK_CON_GAT_GOUT_CMGP_ADC_PCLK_S0, 21, 0, 0),
998 CLK_CON_GAT_GOUT_CMGP_ADC_PCLK_S1, 21, 0, 0),
1002 CLK_CON_GAT_GOUT_CMGP_GPIO_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1004 CLK_CON_GAT_GOUT_CMGP_USI_CMGP0_IPCLK, 21, 0, 0),
1007 CLK_CON_GAT_GOUT_CMGP_USI_CMGP0_PCLK, 21, 0, 0),
1009 CLK_CON_GAT_GOUT_CMGP_USI_CMGP1_IPCLK, 21, 0, 0),
1012 CLK_CON_GAT_GOUT_CMGP_USI_CMGP1_PCLK, 21, 0, 0),
1015 CLK_CON_GAT_GOUT_CMGP_SYSREG_CMGP_PCLK, 21, 0, 0),
1098 CLK_CON_GAT_CLK_G3D_CMU_G3D_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1100 CLK_CON_GAT_CLK_G3D_GPU_CLK, 21, 0, 0),
1102 CLK_CON_GAT_GOUT_G3D_TZPC_PCLK, 21, 0, 0),
1105 CLK_CON_GAT_GOUT_G3D_GRAY2BIN_CLK, 21, 0, 0),
1107 CLK_CON_GAT_GOUT_G3D_BUSD_CLK, 21, 0, 0),
1109 CLK_CON_GAT_GOUT_G3D_BUSP_CLK, 21, 0, 0),
1111 CLK_CON_GAT_GOUT_G3D_SYSREG_PCLK, 21, 0, 0),
1191 CLK_CON_GAT_CLK_HSI_CMU_HSI_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1193 CLK_CON_GAT_HSI_USB20DRD_TOP_I_RTC_CLK__ALV, 21, 0, 0),
1195 CLK_CON_GAT_HSI_USB20DRD_TOP_I_REF_CLK_50, 21, 0, 0),
1197 CLK_CON_GAT_HSI_USB20DRD_TOP_I_PHY_REFCLK_26, 21, 0, 0),
1200 CLK_CON_GAT_GOUT_HSI_GPIO_HSI_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1202 CLK_CON_GAT_GOUT_HSI_MMC_CARD_I_ACLK, 21, 0, 0),
1205 CLK_CON_GAT_GOUT_HSI_MMC_CARD_SDCLKIN, 21, CLK_SET_RATE_PARENT, 0),
1207 CLK_CON_GAT_GOUT_HSI_PPMU_ACLK, 21, 0, 0),
1209 CLK_CON_GAT_GOUT_HSI_PPMU_PCLK, 21, 0, 0),
1212 CLK_CON_GAT_GOUT_HSI_SYSREG_HSI_PCLK, 21, 0, 0),
1214 CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_ACLK_PHYCTRL_20, 21, 0, 0),
1217 CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_BUS_CLK_EARLY, 21, 0, 0),
1308 CLK_CON_GAT_CLK_IS_CMU_IS_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1310 CLK_CON_GAT_GOUT_IS_CSIS0_ACLK, 21, 0, 0),
1312 CLK_CON_GAT_GOUT_IS_CSIS1_ACLK, 21, 0, 0),
1314 CLK_CON_GAT_GOUT_IS_CSIS2_ACLK, 21, 0, 0),
1316 CLK_CON_GAT_GOUT_IS_TZPC_PCLK, 21, 0, 0),
1319 CLK_CON_GAT_GOUT_IS_CLK_CSIS_DMA, 21, 0, 0),
1321 CLK_CON_GAT_GOUT_IS_CLK_GDC, 21, 0, 0),
1323 CLK_CON_GAT_GOUT_IS_CLK_IPP, 21, 0, 0),
1325 CLK_CON_GAT_GOUT_IS_CLK_ITP, 21, 0, 0),
1327 CLK_CON_GAT_GOUT_IS_CLK_MCSC, 21, 0, 0),
1329 CLK_CON_GAT_GOUT_IS_CLK_VRA, 21, 0, 0),
1332 CLK_CON_GAT_GOUT_IS_PPMU_IS0_ACLK, 21, 0, 0),
1334 CLK_CON_GAT_GOUT_IS_PPMU_IS0_PCLK, 21, 0, 0),
1337 CLK_CON_GAT_GOUT_IS_PPMU_IS1_ACLK, 21, 0, 0),
1339 CLK_CON_GAT_GOUT_IS_PPMU_IS1_PCLK, 21, 0, 0),
1342 CLK_CON_GAT_GOUT_IS_SYSMMU_IS0_CLK_S1, 21, 0, 0),
1345 CLK_CON_GAT_GOUT_IS_SYSMMU_IS1_CLK_S1, 21, 0, 0),
1347 CLK_CON_GAT_GOUT_IS_SYSREG_PCLK, 21, 0, 0),
1429 21, CLK_IGNORE_UNUSED, 0),
1432 21, 0, 0),
1435 21, 0, 0),
1438 21, 0, 0),
1441 21, 0, 0),
1444 21, 0, 0),
1447 21, 0, 0),
1450 21, 0, 0),
1453 21, 0, 0),
1456 21, 0, 0),
1577 CLK_CON_GAT_GATE_CLK_PERI_HSI2C_0, 21, 0, 0),
1579 CLK_CON_GAT_GATE_CLK_PERI_HSI2C_1, 21, 0, 0),
1581 CLK_CON_GAT_GATE_CLK_PERI_HSI2C_2, 21, 0, 0),
1583 CLK_CON_GAT_GOUT_PERI_HSI2C_0_IPCLK, 21, 0, 0),
1585 CLK_CON_GAT_GOUT_PERI_HSI2C_0_PCLK, 21, 0, 0),
1587 CLK_CON_GAT_GOUT_PERI_HSI2C_1_IPCLK, 21, 0, 0),
1589 CLK_CON_GAT_GOUT_PERI_HSI2C_1_PCLK, 21, 0, 0),
1591 CLK_CON_GAT_GOUT_PERI_HSI2C_2_IPCLK, 21, 0, 0),
1593 CLK_CON_GAT_GOUT_PERI_HSI2C_2_PCLK, 21, 0, 0),
1595 CLK_CON_GAT_GOUT_PERI_I2C_0_PCLK, 21, 0, 0),
1597 CLK_CON_GAT_GOUT_PERI_I2C_1_PCLK, 21, 0, 0),
1599 CLK_CON_GAT_GOUT_PERI_I2C_2_PCLK, 21, 0, 0),
1601 CLK_CON_GAT_GOUT_PERI_I2C_3_PCLK, 21, 0, 0),
1603 CLK_CON_GAT_GOUT_PERI_I2C_4_PCLK, 21, 0, 0),
1605 CLK_CON_GAT_GOUT_PERI_I2C_5_PCLK, 21, 0, 0),
1607 CLK_CON_GAT_GOUT_PERI_I2C_6_PCLK, 21, 0, 0),
1609 CLK_CON_GAT_GOUT_PERI_MCT_PCLK, 21, 0, 0),
1612 CLK_CON_GAT_GOUT_PERI_PWM_MOTOR_PCLK, 21, 0, 0),
1614 CLK_CON_GAT_GOUT_PERI_SPI_0_IPCLK, 21, 0, 0),
1616 CLK_CON_GAT_GOUT_PERI_SPI_0_PCLK, 21, 0, 0),
1619 CLK_CON_GAT_GOUT_PERI_SYSREG_PERI_PCLK, 21, 0, 0),
1621 CLK_CON_GAT_GOUT_PERI_UART_IPCLK, 21, 0, 0),
1623 CLK_CON_GAT_GOUT_PERI_UART_PCLK, 21, 0, 0),
1625 CLK_CON_GAT_GOUT_PERI_WDT_0_PCLK, 21, 0, 0),
1627 CLK_CON_GAT_GOUT_PERI_WDT_1_PCLK, 21, 0, 0),
1631 CLK_CON_GAT_GOUT_PERI_GPIO_PERI_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1720 CLK_CON_GAT_GOUT_CORE_CCI_550_ACLK, 21, CLK_IS_CRITICAL, 0),
1723 CLK_CON_GAT_GOUT_CORE_GIC_CLK, 21, CLK_IS_CRITICAL, 0),
1725 CLK_CON_GAT_GOUT_CORE_MMC_EMBD_I_ACLK, 21, 0, 0),
1728 21, CLK_SET_RATE_PARENT, 0),
1730 CLK_CON_GAT_GOUT_CORE_SSS_I_ACLK, 21, 0, 0),
1732 CLK_CON_GAT_GOUT_CORE_SSS_I_PCLK, 21, 0, 0),
1735 CLK_CON_GAT_GOUT_CORE_GPIO_CORE_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1738 CLK_CON_GAT_GOUT_CORE_SYSREG_CORE_PCLK, 21, 0, 0),
1798 CLK_CON_GAT_CLK_DPU_CMU_DPU_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1800 CLK_CON_GAT_GOUT_DPU_ACLK_DECON0, 21, 0, 0),
1802 CLK_CON_GAT_GOUT_DPU_ACLK_DMA, 21, 0, 0),
1804 CLK_CON_GAT_GOUT_DPU_ACLK_DPP, 21, 0, 0),
1806 CLK_CON_GAT_GOUT_DPU_PPMU_ACLK, 21, 0, 0),
1808 CLK_CON_GAT_GOUT_DPU_PPMU_PCLK, 21, 0, 0),
1810 CLK_CON_GAT_GOUT_DPU_SMMU_CLK, 21, 0, 0),
1812 CLK_CON_GAT_GOUT_DPU_SYSREG_PCLK, 21, 0, 0),