Lines Matching full:21
294 CLK_CON_GAT_GATE_CLKCMU_CORE_BUS, 21, 0, 0),
296 CLK_CON_GAT_GATE_CLKCMU_CORE_CCI, 21, 0, 0),
298 CLK_CON_GAT_GATE_CLKCMU_CORE_G3D, 21, 0, 0),
302 CLK_CON_GAT_GATE_CLKCMU_PERI_BUS, 21, 0, 0),
304 CLK_CON_GAT_GATE_CLKCMU_PERI_SPI0, 21, 0, 0),
306 CLK_CON_GAT_GATE_CLKCMU_PERI_SPI1, 21, 0, 0),
308 CLK_CON_GAT_GATE_CLKCMU_PERI_UART0, 21, 0, 0),
310 CLK_CON_GAT_GATE_CLKCMUC_PERI_UART1, 21, 0, 0),
312 CLK_CON_GAT_GATE_CLKCMU_PERI_UART2, 21, 0, 0),
314 CLK_CON_GAT_GATE_CLKCMU_PERI_USI0, 21, 0, 0),
316 CLK_CON_GAT_GATE_CLKCMU_PERI_USI1, 21, 0, 0),
318 CLK_CON_GAT_GATE_CLKCMU_PERI_USI2, 21, 0, 0),
322 CLK_CON_GAT_GATE_CLKCMU_FSYS_BUS, 21, 0, 0),
324 CLK_CON_GAT_GATE_CLKCMU_FSYS_MMC_CARD, 21, 0, 0),
326 CLK_CON_GAT_GATE_CLKCMU_FSYS_MMC_EMBD, 21, 0, 0),
328 CLK_CON_GAT_GATE_CLKCMU_FSYS_MMC_SDIO, 21, 0, 0),
330 CLK_CON_GAT_GATE_CLKCMU_FSYS_USB30DRD, 21, 0, 0),
485 CLK_CON_GAT_GOUT_PERI_GPIO_TOP_PCLK, 21, CLK_IGNORE_UNUSED, 0),
487 CLK_CON_GAT_GOUT_PERI_HSI2C_0_PCLK, 21, 0, 0),
489 CLK_CON_GAT_GOUT_PERI_HSI2C_1_PCLK, 21, 0, 0),
491 CLK_CON_GAT_GOUT_PERI_HSI2C_2_PCLK, 21, 0, 0),
493 CLK_CON_GAT_GOUT_PERI_HSI2C_3_PCLK, 21, 0, 0),
495 CLK_CON_GAT_GOUT_PERI_I2C_0_PCLK, 21, 0, 0),
497 CLK_CON_GAT_GOUT_PERI_I2C_1_PCLK, 21, 0, 0),
499 CLK_CON_GAT_GOUT_PERI_I2C_2_PCLK, 21, 0, 0),
501 CLK_CON_GAT_GOUT_PERI_I2C_3_PCLK, 21, 0, 0),
503 CLK_CON_GAT_GOUT_PERI_I2C_4_PCLK, 21, 0, 0),
505 CLK_CON_GAT_GOUT_PERI_I2C_5_PCLK, 21, 0, 0),
507 CLK_CON_GAT_GOUT_PERI_I2C_6_PCLK, 21, 0, 0),
509 CLK_CON_GAT_GOUT_PERI_I2C_7_PCLK, 21, 0, 0),
512 CLK_CON_GAT_GOUT_PERI_PWM_MOTOR_PCLK, 21, 0, 0),
514 CLK_CON_GAT_GOUT_PERI_SPI_0_PCLK, 21, 0, 0),
516 CLK_CON_GAT_GOUT_PERI_SPI_0_EXT_CLK, 21, 0, 0),
518 CLK_CON_GAT_GOUT_PERI_SPI_1_PCLK, 21, 0, 0),
520 CLK_CON_GAT_GOUT_PERI_SPI_1_EXT_CLK, 21, 0, 0),
522 CLK_CON_GAT_GOUT_PERI_UART_0_EXT_UCLK, 21, 0, 0),
524 CLK_CON_GAT_GOUT_PERI_UART_0_PCLK, 21, 0, 0),
526 CLK_CON_GAT_GOUT_PERI_UART_1_EXT_UCLK, 21, 0, 0),
528 CLK_CON_GAT_GOUT_PERI_UART_1_PCLK, 21, 0, 0),
530 CLK_CON_GAT_GOUT_PERI_UART_2_EXT_UCLK, 21, 0, 0),
532 CLK_CON_GAT_GOUT_PERI_UART_2_PCLK, 21, 0, 0),
534 CLK_CON_GAT_GOUT_PERI_USI0_PCLK, 21, 0, 0),
536 CLK_CON_GAT_GOUT_PERI_USI0_SCLK, 21, 0, 0),
538 CLK_CON_GAT_GOUT_PERI_USI1_PCLK, 21, 0, 0),
540 CLK_CON_GAT_GOUT_PERI_USI1_SCLK, 21, 0, 0),
542 CLK_CON_GAT_GOUT_PERI_USI2_PCLK, 21, 0, 0),
544 CLK_CON_GAT_GOUT_PERI_USI2_SCLK, 21, 0, 0),
546 CLK_CON_GAT_GOUT_PERI_MCT_PCLK, 21, 0, 0),
549 CLK_CON_GAT_GOUT_PERI_SYSREG_PERI_PCLK, 21, 0, 0),
551 CLK_CON_GAT_GOUT_PERI_WDT_CLUSTER0_PCLK, 21, 0, 0),
553 CLK_CON_GAT_GOUT_PERI_WDT_CLUSTER1_PCLK, 21, 0, 0),
636 CLK_CON_GAT_GOUT_CORE_CCI_550_ACLK, 21, CLK_IS_CRITICAL, 0),
639 CLK_CON_GAT_GOUT_CORE_GIC400_CLK, 21, CLK_IS_CRITICAL, 0),
645 CLK_CON_GAT_GOUT_CORE_TREX_D_CORE_ACLK, 21, CLK_IS_CRITICAL, 0),
647 CLK_CON_GAT_GOUT_CORE_TREX_D_CORE_GCLK, 21, CLK_IS_CRITICAL, 0),
649 CLK_CON_GAT_GOUT_CORE_TREX_D_CORE_PCLK, 21, CLK_IS_CRITICAL, 0),
651 "mout_core_bus_user", CLK_CON_GAT_GOUT_CORE_TREX_P_CORE_ACLK_P_CORE, 21,
654 "mout_core_cci_user", CLK_CON_GAT_GOUT_CORE_TREX_P_CORE_CCLK_P_CORE, 21,
657 CLK_CON_GAT_GOUT_CORE_TREX_P_CORE_PCLK, 21, CLK_IS_CRITICAL, 0),
659 "dout_core_busp", CLK_CON_GAT_GOUT_CORE_TREX_P_CORE_PCLK_P_CORE, 21,
731 CLK_CON_GAT_GOUT_FSYS_MMC_CARD_I_ACLK, 21, 0, 0),
734 21, CLK_SET_RATE_PARENT, 0),
736 CLK_CON_GAT_GOUT_FSYS_MMC_EMBD_I_ACLK, 21, 0, 0),
739 21, CLK_SET_RATE_PARENT, 0),
741 CLK_CON_GAT_GOUT_FSYS_MMC_SDIO_I_ACLK, 21, 0, 0),
744 21, CLK_SET_RATE_PARENT, 0),